935294197115 [NXP]

TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQCC32, 5 X 5 MM, 0.85 MM, PLASTIC, SOT617-1, MO-220, HVQFN-32;
935294197115
型号: 935294197115
厂家: NXP    NXP
描述:

TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQCC32, 5 X 5 MM, 0.85 MM, PLASTIC, SOT617-1, MO-220, HVQFN-32

蜂窝 电信 电信集成电路
文件: 总30页 (文件大小:2826K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BGA7210  
HVQFN32  
700 MHz to 3800 MHz high linearity variable gain amplifier  
Rev. 4 — 28 January 2013  
Product data sheet  
1. Product profile  
1.1 General description  
The BGA7210 MMIC is an extremely linear Variable Gain Amplifier (VGA), operating from  
0.7 GHz to 3.8 GHz. The maximum gain is 30 dB. It has an attenuation range of 31.5 dB.  
At its minimum attenuation setting it has a maximum output power of 21 dBm, an IP3O of  
39 dBm and a noise figure of 6.5 dB.  
The current consumption can be optimized per attenuation setting allowing for optimized  
overall system performance. The current consumption and attenuation level are controlled  
through a Serial Peripheral Interface (SPI). The current can be reduced to 120 mA.  
Optimal linearity performance is obtained at 185 mA. The BGA7210 has a fast switching  
power-down pin to further reduce current consumption during idle time.  
The BGA7210 has been designed and qualified for the severe mission profile of cellular  
base stations, but its outstanding RF performance and interfacing flexibility make it  
suitable for a wide variety of applications.  
The BGA7210 is housed in a 32 pins 5 mm 5 mm leadless HVQFN32 package.  
1.2 Features and benefits  
Operating frequency range from 0.7 GHz to 3.8 GHz  
High gain of 30 dB  
High IP3O of 39 dBm  
Attenuation range of 31.5 dB with 0.5 dB step (6 bit)  
Maximum output power of 21 dBm  
Noise figure of 6.5 dB at maximum gain  
ESD protection on all pins (HBM 4 kV; CDM 2 kV)  
Fast switching power-save mode  
Moisture sensitivity level 1  
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances  
(RoHS)  
1.3 Applications  
IF and RF applications  
WiMAX and cellular base stations  
Cable modem termination systems  
Temperature compensation circuits  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
1.4 Quick reference data  
Table 1.  
Quick reference data  
4.75 V VSUP 5.25 V; 40 C Tamb +85 C; maximum current; input and output is terminated with 50 ;  
unless otherwise specified.  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
4.75 5.0 5.25 V  
160 195 230 mA  
[1]  
[2]  
VSUP  
supply voltage  
ICC(tot)  
total supply current  
maximum current  
optimized current  
minimum current  
power-down current  
-
-
-
185  
120  
15  
-
-
-
mA  
mA  
mA  
Tamb  
Gp  
ambient temperature  
power gain  
40 +25 +85 C  
minimum attenuation  
700 MHz f 1400 MHz  
1400 MHz f 1700 MHz  
1700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
minimum attenuation  
26  
26  
26  
25  
22  
28  
27  
26  
30  
33  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
29.5 33  
29  
28  
26  
33  
31  
30  
range  
attenuation range  
noise figure  
31.5 35  
30.5 34  
29.5 33  
NF  
700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
maximum attenuation  
-
-
-
6.5 8.5 dB  
7
8
9
dB  
dB  
10  
700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
minimum attenuation  
-
-
-
27.5 30.5 dB  
28  
31  
dB  
dB  
28.5 32  
[3]  
IP3O  
output third-order intercept point  
700 MHz f 1400 MHz  
1400 MHz f 1700 MHz  
1700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
2200 MHz f 2800 MHz; Csh = 0.68 pF  
3400 MHz f 3800 MHz  
maximum attenuation  
34  
32  
30  
28  
30  
24  
39  
37  
35  
34  
35  
30  
-
-
-
-
-
-
dBm  
dBm  
dBm  
dBm  
dBm  
dBm  
[4]  
[3]  
700 MHz f 1400 MHz  
1400 MHz f 1700 MHz  
1700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
2200 MHz f 2800 MHz; Csh = 0.68 pF  
3400 MHz f 3800 MHz  
-
-
-
-
-
-
35  
33  
31  
30  
30  
25  
-
-
-
-
-
-
dBm  
dBm  
dBm  
dBm  
dBm  
dBm  
[4]  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
2 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
Table 1.  
Quick reference data …continued  
4.75 V VSUP 5.25 V; 40 C Tamb +85 C; maximum current; input and output is terminated with 50 ;  
unless otherwise specified.  
Symbol Parameter  
PL(1dB) output power at 1 dB gain compression minimum attenuation  
700 MHz f 2800 MHz  
Conditions  
Min Typ Max Unit  
18  
20  
16  
21  
23  
19  
-
-
-
dBm  
dBm  
dBm  
[4]  
2200 MHz f 2800 MHz; Csh = 0.68 pF  
3400 MHz f 3800 MHz  
[1] Supply voltage on pins RF_OUT, VCC2, VDDA, VCC1 and VDDD  
.
[2] See Section 9.2.  
[3] Pi = 23 dBm per tone; f = 10 MHz.  
[4] See Section 11.  
2. Pinning information  
2.1 Pinning  
terminal 1  
index area  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
PUPMXG/PWRDN  
CLK  
SER_IN  
SS  
BGA7210  
SER_OUT  
V
DDD  
GND  
V
CC1  
aaa-000658  
Transparent top view  
Transparent top view  
Fig 1. Pin configuration  
2.2 Pin description  
Table 2.  
Pin description  
Pin  
Symbol  
Description  
GND  
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 13, Ground  
14, 18, 25, 26, 27, 28, 31, 32  
n.c.  
11, 30  
12  
not connected  
RF_OUT  
VCC2  
RF output and supply to amplifier 2  
Supply voltage to amplifier 2  
Analog supply voltage to DSA  
15  
VDDA  
16  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
3 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
Table 2.  
Pin description …continued  
Symbol  
VCC1  
Pin  
17  
19  
20  
21  
22  
23  
Description  
Supply voltage to amplifier 1  
Digital supply voltage to digital controller  
SPI data output  
VDDD  
SER_OUT  
SS  
SPI slave select (0 = select; 1 = deselect)  
SPI data input  
SER_IN  
CLK  
SPI clock input  
PUPMXG/PWRDN 24  
Power-up gain attenuation / power down  
RF input  
RF_IN  
29  
3. Ordering information  
Table 3.  
Ordering information  
Type number Package  
Name  
Description  
Version  
BGA7210  
HVQFN32 plastic thermal enhanced very thin quad flat package;  
SOT617-3  
no leads; 32 terminals; body 5 5 0.85 mm  
4. Marking  
Table 4.  
Marking  
Type number  
Marking code  
BGA7210  
7210  
5. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min Max Unit  
[1]  
[2]  
[3]  
[4]  
[5]  
VSUP  
VI  
supply voltage  
0.6 +8  
0.6 +8  
0.6 +8  
V
V
V
input voltage  
VO  
output voltage  
II  
input current  
20 +20 mA  
20 +20 mA  
IO  
output current  
PRFIN  
Tstg  
Tj  
power on pin RF_IN  
storage temperature  
junction temperature  
-
30  
dBm  
65 +150 C  
-
-
150 C  
VESD  
electrostatic  
discharge voltage  
Human Body Model (HBM); According  
to JEDEC standard 22-A114E  
4
kV  
Charged Device Model (CDM); According  
to JEDEC standard 22-C101B  
-
2
kV  
[1] Absolute maximum DC voltage on pins RF_OUT, VCC2, VDDA, VCC1, VDDD and RF_IN.  
[2] Absolute maximum DC voltage on pins SS, SER_IN, CLK and PUPMXG/PWRDN.  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
4 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
[3] Absolute maximum DC voltage on pin SER_OUT.  
[4] Absolute maximum DC current through pins SS, SER_IN, CLK and PUPMXG/PWRDN.  
[5] Absolute maximum DC current through pin SER_OUT.  
6. Thermal characteristics  
Table 6.  
Thermal characteristics  
Symbol Parameter  
Conditions  
Typ  
Unit  
[1]  
Rth(j-sp)  
thermal resistance from junction to solder point  
Tsp 85 C  
16  
K/W  
[1] Tsp is the temperature at the solder point.  
7. Static characteristics  
Table 7.  
Static characteristics  
Symbol Parameter  
Conditions  
Min Typ Max  
4.75 5.0 5.25  
160 195 230  
Unit  
V
[1]  
[2]  
VSUP  
supply voltage  
ICC(tot)  
total supply current  
maximum  
mA  
mA  
mA  
mA  
C  
optimized current  
minimum current  
power-down current  
-
-
-
185  
120  
15  
-
-
-
Tamb  
ICC  
ambient temperature  
supply current  
40 +25 +85  
on pin RF_OUT  
on pin VCC2  
on pin VDDA  
on pin VCC1  
on pin VDDD  
-
85  
45  
5
-
mA  
mA  
mA  
mA  
mA  
V
supply current  
-
-
supply current  
-
-
supply current  
-
55  
5
-
supply current  
-
-
[3]  
[3]  
[4]  
[4]  
[4]  
[4]  
VIL  
LOW-level input voltage  
HIGH-level input voltage  
LOW-level output voltage  
HIGH-level output voltage  
LOW-level output current  
HIGH-level output current  
0.1  
2
0
+0.8  
VIH  
VOL  
VOH  
IOL  
3.3 VSUP + 0.1  
+0.8  
V
0.1  
0
V
2.5 3.3 3.4  
V
15  
-
-
0
mA  
mA  
IOH  
0
15  
[1] Supply voltage on pins RF_OUT, VCC2, VDDA, VCC1 and VDDD  
.
[2] See Section 9.2.  
[3] Digital input pins are: SS, SER_IN, CLK and PUPMXG/PWRDN.  
[4] Digital output pin is: SER_OUT.  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
5 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
8. Dynamic characteristics  
Table 8.  
Dynamic characteristics  
4.75 V VSUP 5.25 V; 40 C Tamb +85 C; maximum current; input and output terminated with 50 ,  
unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Gp  
power gain  
minimum attenuation  
700 MHz f 1400 MHz  
1400 MHz f 1700 MHz  
1700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
26  
30  
33  
33  
33  
31  
30  
dB  
26  
29.5  
29  
dB  
26  
dB  
25  
28  
dB  
22  
26  
dB  
G/T  
gain variation with  
temperature  
0.03  
0.006 0  
dB/C  
G/VSUP gain variation with  
0.2  
-
+0.2  
dB/V  
supply voltage  
range  
attenuation range  
700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
700 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
28  
27  
26  
0
31.5  
30.5  
29.5  
0.5  
0.5  
-
35  
34  
33  
1
dB  
dB  
dB  
dB  
dB  
dB  
dB  
step  
attenuation step  
0
1.2  
+1.5  
[1]  
[2]  
Gp  
power gain variation 700 MHz f 3800 MHz  
700 MHz f 2200 MHz  
1.5  
(0.5 +  
-
+(0.5 +  
0.025 i)  
0.025 i)  
[2]  
[2]  
2200 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
(0.3 +  
0.025 i)  
-
-
+(0.3 +  
0.025 i)  
dB  
dB  
(0.5 +  
+(0.5 +  
0.025 i)  
0.025 i)  
Gp(flat)  
RLin  
power gain flatness 700 MHz f 3800 MHz; per 200 MHz  
-
-
-
-
-
1
-
dB  
dB  
dB  
dB  
input return loss  
output return loss  
700 MHz f 3800 MHz  
700 MHz f 3800 MHz  
2200 MHz f 2800 MHz; Csh = 0.68 pF  
minimum attenuation  
10  
7
RLout  
-
10  
-
NF  
noise figure  
700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
maximum attenuation  
-
-
-
6.5  
7
8.5  
9
dB  
dB  
dB  
8
10  
700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
3400 MHz f 3800 MHz  
-
-
-
27.5  
28  
30.5  
31  
dB  
dB  
dB  
28.5  
32  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
6 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
Table 8.  
Dynamic characteristics …continued  
4.75 V VSUP 5.25 V; 40 C Tamb +85 C; maximum current; input and output terminated with 50 ,  
unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
[3]  
IP3O  
output third-order  
intercept point  
minimum attenuation  
700 MHz f 1400 MHz  
1400 MHz f 1700 MHz  
1700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
2200 MHz f 2800 MHz; Csh = 0.68 pF  
3400 MHz f 3800 MHz  
maximum attenuation  
34  
32  
30  
28  
30  
24  
39  
37  
35  
33  
35  
27  
-
-
-
-
-
-
dBm  
dBm  
dBm  
dBm  
dBm  
dBm  
[4]  
[3]  
700 MHz f 1400 MHz  
1400 MHz f 1700 MHz  
1700 MHz f 2200 MHz  
2200 MHz f 2800 MHz  
2200 MHz f 2800 MHz; Csh = 0.68 pF  
3400 MHz f 3800 MHz  
minimum attenuation  
-
-
-
-
-
-
35  
33  
31  
30  
30  
25  
-
-
-
-
-
-
dBm  
dBm  
dBm  
dBm  
dBm  
dBm  
[4]  
[4]  
[4]  
PL(1dB)  
output power at  
1 dB  
gain compression  
700 MHz f 2800 MHz  
2200 MHz f 2800 MHz; Csh = 0.68 pF  
3400 MHz f 3800 MHz  
maximum attenuation  
18  
20  
16  
21  
23  
19  
-
-
-
dBm  
dBm  
dBm  
700 MHz f 2800 MHz  
2200 MHz f 2800 MHz; Csh = 0.68 pF  
3400 MHz f 3800 MHz  
-
-
-
-
20  
-
-
-
-
dBm  
dBm  
dBm  
ns  
20  
16  
[5]  
[5]  
td(pd)  
power-down delay  
time  
100  
td(pu)  
power-up delay time  
-
-
5
-
-
s  
[5][  
6]  
tresp()  
attenuation  
response time  
100  
ns  
[1] Normalized to maximum gain and attenuation.  
[2] ispecifies the decimal attenuation step, ranging from 0 to 63.  
[3] Pi = 23 dBm per tone; f = 10 MHz.  
[4] See Section 11.  
[5] To within 0.1 dB of final gain state.  
[6] After last SPI bit is clocked in.  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
7 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
9. Serial Peripheral Interface  
9.1 Command word format  
The Serial Peripheral Interface (SPI) operates in mode 0. This means that when the SPI is  
inactive the clock pin is logically LOW. When the SPI interface is active the data is clocked  
in at the rising edge of the clock pulse; data is clocked out at the negative edge. The  
control word length is 12 bits (see Figure 2), however the word length can be extended  
appropriately with trailing zeros (see Figure 3).  
CLK  
SS  
SERIN  
SEROUT  
C1  
C1  
C0  
C0  
D7  
D7  
D6  
D6  
D5  
D5  
D4  
D4  
D3  
D3  
D2  
D2  
D1  
D1  
D0  
D0  
D9  
D9  
D8  
D8  
OLD CURRENT AND ATTENUATION STATE  
NEW STATE  
aaa-000659  
Fig 2. Timing diagram for 12-bit word  
CLK  
SS  
SERIN  
C1  
C1  
C0  
C0  
D7  
D7  
D6  
D6  
D5  
D5  
D4  
D4  
D3  
D3  
D2  
D2  
D1  
D1  
D0  
D0  
D9  
D9  
D8  
D8  
SEROUT  
OLD CURRENT AND ATTENUATION STATE  
NEW STATE  
aaa-000660  
Fig 3. Timing diagram for 12-bit word length followed by four ignored trailing bits  
The word written on the input (SER_IN) will be replicated on the output (SER_OUT)  
9.2 Setting current and attenuation  
The current and attenuation are set by bits D9 to D0 and are preceded by the command  
bits C0 and C1, which are always set to logic LOW, see Figure 4. If all bits are set to logic  
LOW (0x000) then current is at maximum and attenuation is at minimum; if all bits are set  
to logic HIGH (0x3FF) then current is at minimum and attenuation is at maximum.  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
8 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
CLK  
SERIN/OUT  
SET  
C1  
C0  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
D9  
D8  
00  
command  
00 ... 11  
00 ... 11  
000000 ... 111111  
attenuation  
I
I
aaa-000661  
amp1  
amp2  
Fig 4. Command to set current of the first amplifier (D9, D8); second amplifier (D7, D6) and  
attenuation (D5, ... , D2)  
Depending on the attenuation setting the current through the first amplifier and the second  
amplifier can be optimized, without compromising on linearity. At attenuations less than  
9 dB the current in the first amplifier can be reduced with 10 mA; at attenuations equal or  
larger than 9 dB the current in the second amplifier can be reduced by 15 mA.  
Table 9.  
D9, D8  
0x0  
Current first amplifier truth table  
Current reduction (mA)  
0
0x1  
10  
20  
30  
0x2  
0x3  
Table 10. Current second amplifier truth table  
D7, D6  
0x0  
Current reduction (mA)  
0
0x1  
15  
30  
45  
0x2  
0x3  
Table 11. Attenuation truth table; major states only  
D5, D4, D3, D2, D1, D0  
Attenuation (dB)  
0x00  
0x01  
0x02  
0x04  
0x08  
0x10  
0x20  
0x3F  
0
0.5  
1
2
4
8
16  
31.5  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
9 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
9.3 SPI timing  
CLK  
SERIN/OUT  
C1  
C0  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
D9  
D8  
t
su  
t
h
SS  
t
t
h(SS)  
aaa-000662  
su(SS)  
Fig 5. Timing diagram  
Table 12. SPI timing  
4.75 V VSUP 5.25 V; 40 C Tamb +85 C unless otherwise specified.  
Symbol  
fSPI  
Parameter  
Conditions  
Min  
Typ Max Unit  
SPI frequency  
set-up time  
0.1  
-
-
-
-
-
20  
-
MHz  
ns  
tsu  
10  
th  
hold time  
10  
-
ns  
tsu(SS)  
th(SS)  
set-up time on pin SS  
hold time on pin SS  
10  
-
ns  
10 + 11 / fSPI  
-
ns  
10. Power-up and power save  
The PUPMXG/PWRDN pin determines the attenuation and currents at start-up of the chip  
(see Table 13). After start-up it can be used to power-down the device.  
PUPMXG/  
PWRDN  
POR  
UNDEFINED  
UNDEFINED  
PUPMXG = 1  
ON  
OFF  
ON  
OFF  
ON  
STATE  
PUPMXG/  
PWRDN  
POR  
STATE  
PUPMXG = 0  
OFF  
ON  
OFF  
ON  
OFF  
aaa-000664  
Fig 6. PUPMXG/PWRDN  
Table 13. Power-up truth table  
PUPMXG/PWRDN  
Current  
(mA)  
120  
Attenuation  
(dB)  
31.5  
0
0
1
195  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
10 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
11. Application information  
11.1 Application board  
A customer application board is available from NXP upon request. It includes USB  
interface circuitry and customer software to facilitate evaluation of the BGA7210.  
The final application shall be terminated with 50 and decoupled as depicted in Figure 7.  
The ground leads and exposed paddle should be connected directly to the ground plane.  
A sufficient number of via holes should be provided to connect the top and bottom ground  
planes in the final application board. Sufficient cooling should be provided that the  
temperature of the exposed die pad does not exceed 85 C.  
V
SUP  
C23  
L1  
C22  
C26  
C25  
C24  
C12  
PUPMXG/  
PWRDN  
24  
C14  
V
V
CC1  
DDD  
CLK SERIN SS SEROUT  
23 22 21 20  
19  
17  
V
DDA  
16  
C18  
C17  
V
CC2  
15  
L2  
C27  
C1  
RF_IN  
RF_OUT  
29  
12  
RF_OUT  
Csh  
aaa-000665  
See Table 14 for list of components.  
Fig 7. Schematic representation of the customer evaluation board  
Table 14. List of components  
See Figure 7 for schematics.  
Component Description  
Value  
Remarks  
C1, C27  
C12  
DC blocking capacitor  
100 pF  
100 nF  
100 nF  
100 nF  
100 nF  
10 F  
Murata GRM  
decoupling capacitor  
close to pin 19  
C14  
decoupling capacitor  
close to pin 17  
C17  
decoupling capacitor  
close to pin 15  
C18  
decoupling capacitor  
close to pin 16  
C22  
optional decoupling capacitor  
optional decoupling capacitor  
decoupling capacitor  
part of optional ripple filter  
part of optional ripple filter  
C23  
10 F  
C24  
100 pF  
100 nF  
C25  
decoupling capacitor  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
11 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
Table 14. List of components …continued  
See Figure 7 for schematics.  
Component Description  
Value  
Remarks  
C26  
Csh  
decoupling capacitor  
4.7 F  
0.68 pF  
optional matching capacitor to improve  
linearity at 2.2 GHz to 2.8 GHz  
Murata GRM; shall be located 5.5 mm from pin  
RF-OUT when using FR4 PCB described below.  
L1  
L2  
optional inductor  
inductor  
820 nH  
22 nH  
part of optional ripple filter  
Murata LQW 18  
The recommended FR4 PCB layer stack is described in Figure 8. A 50 coplanar  
grounded wave guide can be implemented by a 0.48 mm RF track and a clearance  
between the track and the ground planes of 1 mm on both sides.  
through via  
RF and analog routing  
0.28 mm FR4  
RF and analog ground  
0.30 mm core  
analog routing  
0.28 mm FR4  
RF and analog ground  
aaa-000666  
r = 4.5; interconnect 35 m copper.  
Fig 8. Printed-Circuit Board (PCB) layer stack  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
12 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
11.2 Characteristics  
aaa-000667  
aaa-000668  
34  
34  
S
S
21  
(dB)  
21  
(dB)  
30  
30  
(1)  
(2)  
(3)  
(1)  
(2)  
(3)  
26  
22  
26  
22  
0
1
2
3
4
5
0
2
3
4
5
1
f (GHz)  
f (GHz)  
VSUP = 5 V; maximum current setting.  
Tamb = 40 C  
VSUP = 5 V; maximum current setting and shunt  
capacitor (Csh).  
(1)  
(1) Tamb = 40 C  
(2) Tamb = +25 C  
(2) Tamb = +25 C  
(3) Tamb = +85 C  
(3)  
Tamb = +85 C  
Fig 9. Maximum power gain as a function of  
frequency; typical values  
Fig 10. Maximum power gain with shunt capacitor as a  
function of frequency; typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
13 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000669  
aaa-000670  
35  
40  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
S
21  
∆G  
p
(dB)  
(dB)  
25  
30  
(1)  
(2)  
(3)  
15  
5
20  
-5  
10  
0
16  
32  
48  
64  
0
1
2
3
4
5
attenuation (decimal)  
f (GHz)  
VSUP = 5 V; Tamb = 25 C; maximum current setting.  
VSUP = 5 V; maximum current setting.  
(1) Tamb = 40 C  
(2) Tamb = +25 C  
(3) amb = +85 C  
(1) f = 0.7 GHz  
(2) f = 1.4 GHz  
(3) f = 1.7 GHz  
T
(4) f = 2.2 GHz  
(5) f = 2.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
Fig 11. Power gain as a function of attenuation state;  
typical values  
Fig 12. Power gain range as a function of frequency;  
typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
14 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000671  
aaa-000672  
0.0  
2
gain step size  
(dB)  
gain accuracy  
(dB)  
(8)  
(6)  
(4)  
(3)  
(2)  
-0.2  
-0.4  
1
0
-0.6  
(1)  
(2)  
(3)  
-1  
(1)  
(5)  
(7)  
(4)  
(5)  
(6)  
(7)  
-0.8  
-1.0  
-2  
0
0
16  
32  
48  
64  
16  
32  
48  
64  
attenuation (decimal)  
attenuation (decimal)  
VSUP = 5 V; Tamb = 25 C; maximum current setting.  
VSUP = 5 V; Tamb = 25 C; maximum current setting.  
(1) f = 0.7 GHz; range = 31.5 dB  
(2) f = 1.4 GHz; range = 31.5 dB  
(3) f = 1.7 GHz; range = 31.5 dB  
(4) f = 2.2 GHz; range = 31.5 dB  
(5) f = 2.2 GHz; range = 30.5 dB  
(6) f = 2.8 GHz; range = 30.5 dB  
(7) f = 2.8 GHz; range = 29.5 dB  
(8) f = 3.8 GHz; range = 29.5 dB  
(1) f = 0.7 GHz  
(2) f = 1.4 GHz  
(3) f = 1.7 GHz  
(4) f = 2.2 GHz  
(5) f = 2.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
Fig 13. Gain step size as a function of attenuation  
state; typical values  
Fig 14. Power gain accuracy as a function of  
attenuation state; typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
15 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000673  
aaa-000674  
-5  
-5  
S
S
22  
(dB)  
11  
(dB)  
-15  
-15  
(1)  
(2)  
(3)  
-25  
-35  
-25  
-35  
(1)  
(2)  
(3)  
0
1
2
3
4
5
0
1
2
3
4
5
f (GHz)  
f (GHz)  
VSUP = 5 V; maximum current setting;  
minimum attenuation.  
V
SUP = 5 V; maximum current setting;  
minimum attenuation.  
(1) Tamb = 40 C  
(2) amb = +25 C  
(3) Tamb = +85 C  
(1) Tamb = 40 C  
(2) amb = +25 C  
(3) Tamb = +85 C  
T
T
Fig 15. Input return loss as a function of frequency;  
typical values  
Fig 16. Output return loss as a function of frequency;  
typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
16 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000675  
aaa-000676  
0
0
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(8)  
S
S
22  
11  
(dB)  
(dB)  
-10  
-10  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(8)  
-20  
-30  
-40  
-50  
-20  
-30  
-40  
-50  
0
1
2
3
4
5
0
1
2
3
4
5
f (GHz)  
f (GHz)  
VSUP = 5 V; Tamb = 25 C; maximum current setting.  
VSUP = 5 V; Tamb = 25 C; maximum current setting.  
(1) attenuation = 0x00 (minimum)  
(2) attenuation = 0x01  
(1) attenuation = 0x00 (minimum)  
(2) attenuation = 0x01  
(3) attenuation = 0x02  
(3) attenuation = 0x02  
(4) attenuation = 0x04  
(4) attenuation = 0x04  
(5) attenuation = 0x08  
(5) attenuation = 0x08  
(6) attenuation = 0x10  
(6) attenuation = 0x10  
(7) attenuation = 0x20  
(7) attenuation = 0x20  
(8) attenuation = 0x3F (maximum)  
(8) attenuation = 0x3F (maximum)  
Fig 17. Input return loss as a function of frequency;  
typical values  
Fig 18. Output return loss as a function of frequency;  
typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
17 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000677  
aaa-000678  
0
0
S
S
22  
(dB)  
11  
(dB)  
-10  
-10  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(8)  
-20  
-30  
-40  
-50  
-20  
-30  
-40  
-50  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(8)  
0
1
2
3
4
5
0
1
2
3
4
5
f (GHz)  
f (GHz)  
VSUP = 5 V; Tamb = 25 C; maximum current setting and  
VSUP = 5 V; Tamb = 25 C; maximum current setting and  
shunt capacitor (Csh).  
shunt capacitor (Csh).  
(1) attenuation = 0x00 (minimum)  
(2) attenuation = 0x01  
(1) attenuation = 0x00 (minimum)  
(2) attenuation = 0x01  
(3) attenuation = 0x02  
(3) attenuation = 0x02  
(4) attenuation = 0x04  
(4) attenuation = 0x04  
(5) attenuation = 0x08  
(5) attenuation = 0x08  
(6) attenuation = 0x10  
(6) attenuation = 0x10  
(7) attenuation = 0x20  
(7) attenuation = 0x20  
(8) attenuation = 0x3F (maximum)  
(8) attenuation = 0x3F (maximum)  
Fig 19. Input return loss with shunt capacitor as a  
function of frequency; typical values  
Fig 20. Output return loss with shunt capacitor as a  
function of frequency; typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
18 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000679  
aaa-000680  
45  
45  
IP3  
IP3  
o
(dBm)  
o
(dBm)  
35  
35  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
25  
15  
25  
15  
0
16  
32  
48  
64  
0
16  
32  
48  
64  
attenuation (decimal)  
attenuation (decimal)  
VSUP = 5 V; Tamb = 40 C; maximum current setting.  
VSUP = 5 V; Tamb = 25 C; maximum current setting.  
(1) f = 0.7 GHz  
(1) f = 0.7 GHz  
(2) f = 1.4 GHz  
(2) f = 1.4 GHz  
(3) f = 1.7 GHz  
(3) f = 1.7 GHz  
(4) f = 2.2 GHz  
(4) f = 2.2 GHz  
(5) f = 2.8 GHz  
(5) f = 2.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
Fig 21. Output third-order intercept point as a function  
of attenuation state; typical values  
Fig 22. Output third-order intercept point as a function  
of attenuation state; typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
19 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000682  
aaa-000683  
45  
45  
IP3  
o
IP3  
o
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(dBm)  
(dBm)  
35  
35  
(1)  
25  
25  
15  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
15  
0
16  
32  
48  
64  
0
16  
32  
48  
64  
attenuation (decimal)  
attenuation (decimal)  
VSUP = 5 V; Tamb = 85 C; maximum current setting.  
(1) f = 0.7 GHz  
VSUP = 5 V; Tamb = 25 C; minimal current setting.  
(1) f = 0.7 GHz  
(2) f = 1.4 GHz  
(2) f = 1.4 GHz  
(3) f = 1.7 GHz  
(3) f = 1.7 GHz  
(4) f = 2.2 GHz  
(4) f = 2.2 GHz  
(5) f = 2.8 GHz  
(5) f = 2.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
Fig 23. Output third-order intercept point as a function  
of attenuation state; typical values  
Fig 24. Output third-order intercept point as a function  
of attenuation state; typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
20 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000685  
aaa-000687  
45  
45  
IP3  
IP3  
o
(dBm)  
o
(dBm)  
35  
35  
(1)  
(2)  
(3)  
(6)  
(4)  
(5)  
(7)  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
25  
15  
25  
15  
-30  
-20  
-10  
0
-50  
-40  
-30  
-20  
-10  
0
relative current through first amplifier (mA)  
relative current through second amplifier (mA)  
VSUP = 5 V; Tamb = 25 C; maximum gain;  
VSUP = 5 V; Tamb = 25 C; maximum gain;  
maximum current through second amplifier.  
maximum current through first amplifier.  
(1) f = 0.7 GHz  
(1) f = 0.7 GHz  
(2) f = 1.4 GHz  
(2) f = 1.4 GHz  
(3) f = 1.7 GHz  
(3) f = 1.7 GHz  
(4) f = 2.2 GHz  
(4) f = 2.2 GHz  
(5) f = 2.8 GHz  
(5) f = 2.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
Fig 25. Output third-order intercept point as a function  
of relative current through first amplifier;  
typical values  
Fig 26. Output third-order intercept point as a function  
of relative current through second amplifier;  
typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
21 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000689  
aaa-000690  
45  
45  
(1)  
IP3  
IP3  
o
o
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(dBm)  
(dBm)  
(1)  
35  
35  
(2)  
(3)  
(6)  
(4)  
(5)  
25  
15  
25  
15  
(7)  
-30  
-20  
-10  
0
-50  
-40  
-30  
-20  
-10  
0
relative current through first amplifier (mA)  
relative current through second amplifier (mA)  
VSUP = 5 V; Tamb = 25 C; minimum gain;  
VSUP = 5 V; Tamb = 25 C; minimum gain;  
maximum current through second amplifier.  
maximum current through first amplifier.  
(1) f = 0.7 GHz  
(1) f = 0.7 GHz  
(2) f = 1.4 GHz  
(2) f = 1.4 GHz  
(3) f = 1.7 GHz  
(3) f = 1.7 GHz  
(4) f = 2.2 GHz  
(4) f = 2.2 GHz  
(5) f = 2.8 GHz  
(5) f = 2.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
Fig 27. Output third-order intercept point as a function  
of relative current through first amplifier;  
typical values  
Fig 28. Output third-order intercept point as a function  
of relative current through second amplifier;  
typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
22 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000692  
aaa-000693  
200  
45  
I
tot  
IP3  
o
(mA)  
(1)  
(2)  
(3)  
(dBm)  
190  
(2)  
35  
(1)  
(4)  
180  
170  
160  
25  
15  
0
16  
32  
48  
64  
0
16  
32  
48  
64  
attenuation (decimal)  
attenuation (decimal)  
VSUP = 5 V; Tamb = 25 C.  
VSUP = 5 V; Tamb = 25 C; f = 2.8 GHz.  
(1) IAMP1 / IAMP2 = 0 mA / 15 mA  
(2) IAMP1 / IAMP2 = 10 mA / 0 mA  
(1) IAMP1 / IAMP2 = Iopt  
(2) IAMP1 / IAMP2 = 0 mA / 0 mA  
(3) IAMP1 / IAMP2 = 0 mA / 15 mA  
(4) IAMP1 / IAMP2 = 10 mA / 0 mA  
Fig 29. Total current as a function of attenuation state  
optimized for IP3O; typical values  
Fig 30. Output third-order intercept point as a function  
of attenuation state; typical values  
aaa-000694  
aaa-000695  
200  
200  
I
I
tot  
tot  
(mA)  
(mA)  
(1)  
(2)  
(3)  
(4)  
(1)  
(2)  
(3)  
190  
190  
180  
170  
160  
150  
180  
170  
160  
150  
(4)  
-40  
-15  
10  
35  
60  
85  
(°C)  
-40  
-15  
10  
35  
60  
85  
(°C)  
T
amb  
T
amb  
VSUP = 5 V; maximum current through second amplifier.  
VSUP = 5 V; maximum current through first amplifier.  
(1) IAMP1 = 0 mA  
(1) IAMP2 = 0 mA  
(2) IAMP1 = 10 mA  
(2) IAMP2 = 10 mA  
(3)  
I
AMP1 = 20 mA  
(3) IAMP2 = 20 mA  
(4) IAMP1 = 30 mA  
(4) IAMP2 = 30 mA  
Fig 31. Total current as a function of ambient  
temperature; typical values  
Fig 32. Total current as a function of ambient  
temperature; typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
23 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000696  
aaa-000697  
25  
40  
(8)  
P
relative phase  
(deg)  
L(1dB)  
(dBm)  
23  
30  
21  
19  
17  
15  
20  
(7)  
10  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(6)  
(5)  
(4)  
0
(1)  
(2)  
(3)  
-10  
0
16  
32  
48  
64  
0
1
2
3
4
5
attenuation (decimal)  
f (GHz)  
VSUP = 5 V; Tamb = 85 C; maximum current setting;  
attenuation states 0, 7, 15, 23, 31, 39, 47, 55 and 63 are  
depicted.  
V
SUP = 5 V; Tamb = 25 C; maximum current setting.  
(1) attenuation = 0x00 (minimum)  
(2) attenuation = 0x01  
(1) f = 0.7 GHz  
(3) attenuation = 0x02  
(2) f = 1.4 GHz  
(4) attenuation = 0x04  
(3) f = 1.7 GHz  
(5) attenuation = 0x08  
(4) f = 2.2 GHz  
(6) attenuation = 0x10  
(5) f = 2.8 GHz  
(7) attenuation = 0x20  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
(8) attenuation = 0x3F (maximum)  
Fig 33. Output power at 1 dB gain compression as a  
function of attenuation state; typical values  
Fig 34. Relative phase as a function of frequency;  
typical values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
24 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
aaa-000698  
aaa-000699  
35  
10  
NF  
(dB)  
NF  
(dB)  
8
25  
15  
5
6
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(1)  
(2)  
(3)  
4
2
0
-5  
0
16  
32  
48  
64  
0
1
2
3
4
5
attenuation (decimal)  
f (GHz)  
VSUP = 5 V; Tamb = 25 C; maximum current setting.  
(1) f = 0.7 GHz  
VSUP = 5 V; maximum gain and maximum current  
setting.  
(1) Tamb = 40 C  
(2) amb = +25 C  
(2) f = 1.4 GHz  
T
(3) f = 1.7 GHz  
(3) Tamb = +85 C  
(4) f = 2.2 GHz  
(5) f = 2.8 GHz  
(6) f = 2.8 GHz and Csh used  
(7) f = 3.8 GHz  
Fig 35. Noise figure as a function of attenuation state;  
typical values  
Fig 36. Noise figure as a function of frequency; typical  
values  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
25 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
12. Package outline  
HVQFN32: plastic thermal enhanced very thin quad flat package; no leads;  
32 terminals; body 5 x 5 x 0.85 mm  
SOT617-3  
D
B
A
terminal 1  
index area  
A
A
1
E
detail X  
C
e
1
y
y
v
w
C
C
A
B
C
1
e
1/2 e  
b
9
16  
L
17  
8
e
e
E
h
2
1/2 e  
24  
1
terminal 1  
index area  
32  
25  
X
D
h
0
2.5  
scale  
5 mm  
Dimensions  
(1)  
(1)  
(1)  
(1)  
Unit  
A
A
1
b
c
D
D
E
E
h
e
e
e
L
v
w
y
y
1
h
1
2
max  
0.05 0.30  
5.1 3.75 5.1 3.75  
0.5  
mm nom 0.85  
min  
0.2  
0.5 3.5 3.5  
0.1 0.05 0.05 0.1  
0.00 0.18  
4.9 3.45 4.9 3.45  
0.3  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
sot617-3_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
11-06-14  
11-06-21  
SOT617-3  
MO-220  
Fig 37. Package outline SOT617-3 (HVQFN32)  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
26 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
13. Packing information  
The BGA7210 will be delivered in reel pack SMD 7”, 1500 pieces per reel.  
aaa-000870  
Fig 38. Carrier tape  
14. Abbreviations  
Table 15. Abbreviations  
Acronym  
CDM  
ESD  
DSA  
HBM  
IF  
Description  
Charged Device Model  
ElectroStatic Discharge  
Digital Step Attenuator  
Human Body Model  
Intermediate Frequency  
Monolithic Microwave Integrated Circuit  
Power-On Reset  
MMIC  
POR  
RF  
Radio Frequency  
SPI  
Serial Peripheral Interface  
Universal Serial Bus  
USB  
WiMAX  
Worldwide Interoperability for Microwave Access  
15. Revision history  
Table 16. Revision history  
Document ID  
BGA7210 v.4  
Modifications:  
BGA7210 v.3  
BGA7210 v.2  
BGA7210 v.1  
Release date  
20130128  
Data sheet status  
Change notice  
Supersedes  
Product data sheet  
-
BGA7210 v.3  
Table 4: updated.  
20121224  
20120104  
20111213  
Product data sheet  
-
-
-
BGA7210 v.2  
BGA7210 v.1  
-
Product data sheet  
Preliminary data sheet  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
27 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
16. Legal information  
16.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
Suitability for use — NXP Semiconductors products are not designed,  
16.2 Definitions  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
16.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
28 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
non-automotive qualified products in automotive equipment or applications.  
16.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
17. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
BGA7210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2013. All rights reserved.  
Product data sheet  
Rev. 4 — 28 January 2013  
29 of 30  
BGA7210  
NXP Semiconductors  
700 MHz to 3800 MHz high linearity variable gain amplifier  
18. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
General description . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits. . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . 2  
1.1  
1.2  
1.3  
1.4  
2
2.1  
2.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
3
4
5
6
7
8
Ordering information. . . . . . . . . . . . . . . . . . . . . 4  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Thermal characteristics . . . . . . . . . . . . . . . . . . 5  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6  
9
Serial Peripheral Interface . . . . . . . . . . . . . . . . 8  
Command word format. . . . . . . . . . . . . . . . . . . 8  
Setting current and attenuation . . . . . . . . . . . . 8  
SPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
9.1  
9.2  
9.3  
10  
Power-up and power save. . . . . . . . . . . . . . . . 10  
11  
11.1  
11.2  
Application information. . . . . . . . . . . . . . . . . . 11  
Application board . . . . . . . . . . . . . . . . . . . . . . 11  
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 13  
12  
13  
14  
15  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 26  
Packing information . . . . . . . . . . . . . . . . . . . . 27  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 27  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 27  
16  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 28  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 28  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
16.1  
16.2  
16.3  
16.4  
17  
18  
Contact information. . . . . . . . . . . . . . . . . . . . . 29  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2013.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 28 January 2013  
Document identifier: BGA7210  

相关型号:

935294197515

TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQCC32, 5 X 5 MM, 0.85 MM, PLASTIC, SOT617-1, MO-220, HVQFN-32
NXP

935294212118

Interface Circuit
NXP

935294288012

NTB0104 SERIES, 4-BIT TRANSCEIVER, TRUE OUTPUT, PBGA12, 1.20 X 1.60 MM, 0.65 MM HEIGHT, WLCSP-12
NXP

935294571115

IC USB SWITCH DPDT XQFN10
NXP

935294621518

Power Supply Management Circuit
NXP

935294878033

Dot Matrix LCD Driver
NXP

935294922551

Consumer Circuit
NXP

935294922557

Consumer Circuit
NXP

935294998151

RISC Microcontroller
NXP

935295224557

Consumer Circuit
NXP

935295415118

AVC SERIES, 4-BIT DRIVER, TRUE OUTPUT, PDSO16, 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16
NXP

935295655132

COMPARATOR, 30000uV OFFSET-MAX, 800ns RESPONSE TIME, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, XSON-6
NXP