935381779118 [NXP]

Power Supply Support Circuit;
935381779118
型号: 935381779118
厂家: NXP    NXP
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Power Supply Support Circuit

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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
Rev. 1 — 15 March 2019  
Product data sheet  
1 General description  
The TEA19032CT is a highly configurable secondary side SMPS controller that is  
available in many factory configured versions. Section 15 gives an overview of the off-  
the-shelf available versions of the TEA19032CT. To inquire about the possibilities of  
customer-specific versions, contact your local sales representative.  
The TEA19032CT supports the following protocols:  
USB Type-C v.1.3  
USB power delivery (USB-PD) including programmable power supply (PPS)  
®
Qualcomm QuickCharge QC4  
A complete smart-charging switched-mode power supply (SMPS) can be built in  
combination with the TEA193x primary controller and the TEA199x secondary side  
synchronous rectifier (SR) controller.  
The TEA19032CT can be provided in several small packages with low pin count. Due  
to its small number of external components, a small form factor SMPS can be built that  
meets efficiency requirements like CoC Tier-2, EuP Iot6, and DOE v6 with an extremely  
no-load power (< 30 mW).  
The TEA19032CT has a high level of digital integration. It incorporates all required  
circuits, including a charge pump to drive an external NMOS load switch directly, a USB-  
PD physical interface (PHY), and an integrated driver for fast output discharge.  
The output voltage and output current are continuously measured and are used to control  
the SMPS. The GPIO pin measures the adapter temperature or the temperature in the  
cable/connector. Optionally, the GPIO pin can be used for other features, like supply  
(see Table 4). The die temperature of the TEA19032CT is monitored via an internal  
temperature sensor.  
Multiple protections ensure the best-in-class charging safety for the TEA19032CT.  
To ensure correct operation under all conditions, all protections except UVP are  
implemented in hardware. The response of these protections can be programmed as  
latched or safe restart. Although not recommended, these protections can be disabled  
individually via the settings in the non-volatile multi-time programmable (MTP) memory.  
If an output short circuit occurs, the power dissipation in the adapter can be below  
50 mW.  
For output voltage regulation, current regulation, and protection, only a single  
optocoupler is required in the application.  
The TEA19032CT operates in CV mode with a better than 2 % voltage accuracy. In CC  
mode, it operates with a better than 2 % full-load current accuracy.  
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
2 Features and benefits  
2.1 General  
Best-in-class fail-safe application for high-power adapters; gives complete protection  
against overload conditions in the load (e.g. phone)  
Wide output voltage operating range (2.9 V to 21 V)  
Ultra-high efficiency together with TEA193x QR/DCM controller and TEA199x SR  
controller  
Very low no-load power (< 30 mW for the complete system solution)  
High power density  
Dedicated SW pin to drive external NMOS directly  
Constant voltage (CV) and constant current (CC) control (programmable level)  
Precise voltage and current control with low minimum step size (voltage 12-bit DAC,  
current 10-bit DAC)  
Continuous measurement of output voltage and output current with a better than 2 %  
accuracy  
Low-cost SO10 package (suitable for reflow soldering and wave soldering)  
Low-cost bill of materials (BOM; ≈15 external components)  
Embedded MCU (with ROM, RAM, and MTP memory)  
Discharge pin for fast output voltage ramp down  
Built-in series regulator and programmable cable compensation  
Non-volatile MTP memory for storage of system configuration parameters  
2.2 Protocol support  
USB Type-C v.1.3  
USB power delivery (USB-PD) 2.0 and 3.0 including programmable power supply  
(PPS)  
®
Qualcomm QuickCharge QC4 protocol  
Unstructured vendor defined messages (VDMs), which can be used for MTP  
programming, e.g. to get Vendor IDs  
TEA19032CT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
2 / 36  
 
 
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
2.3 Protections  
Overtemperature protection (OTP): one internal and one external  
Adaptive overvoltage protection (OVP)  
Adaptive undervoltage protection (UVP)  
Overcurrent protection (OCP)  
Undervoltage lockout (UVLO) protection  
Output short protection (OSP)  
Open-supply protection (OSUP)  
Overvoltage protection at the CC1 and CC2 pins  
Soft short protection at the CC1 and CC2 pins  
Soft short protection at the output  
To ensure safe operation, the TEA19032CT switches off the load during fault conditions.  
3 Applications  
®
USB chargers for smart phones and tablets supporting the Qualcomm QuickCharge  
QC4 protocol  
USB-PD 3.0, type C 1.3 chargers with optional VDM support for smartphones and  
tablets  
4 Ordering information  
Table 1.ꢀOrdering information  
Type number  
Package  
Name  
Description  
Version  
TEA19032CABT/1 SO10  
plastic small outline package; 10 leads; body width: 3.9 mm  
SOT1437-1  
5 Marking  
Table 2.ꢀMarking  
Type number  
TEA19032CABT  
Marking code  
A19032CAB  
TEA19032CT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
3 / 36  
 
 
 
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
6 Block diagram  
OPTO  
VCC  
BG_det  
SW_OFF  
30 µA  
BG_OK  
BG_OK  
SUPPLY  
BLOCK  
UVLO  
REF  
20 mA  
VCC_  
below_xxx  
4 bits  
OVP  
OCP  
Vout_below_vcc  
VSNS  
ISNS  
DISCH  
CCmode  
amp  
0.8 V  
VOUT_below_0p8  
3 levels  
+ off  
CHARGE  
PUMP  
SW  
GPIO  
OTP  
ana_ctrl  
UVLO  
PARAMETER  
MTP  
USB-PD  
PROTO  
USB-PD  
PHY  
OR  
SW_OFF  
3.3 V  
3.3 V  
TYPEC  
CONDET  
OVP  
OVP  
CC1  
CC2  
USB  
BLOCK  
RAM  
ROM  
I2C  
(M/S)  
µC  
OSC  
DIGITAL  
GND  
aaa-028424  
Figure 1.ꢀTEA19032CT block diagram  
TEA19032CT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
4 / 36  
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
7 Pinning information  
7.1 Pinning  
VCC  
OPTO  
GPIO  
ISNS  
1
2
3
4
5
10 SW  
9
8
7
6
GND  
DISCH  
CC1  
IC  
VSNS  
CC2  
aaa-028425  
Figure 2.ꢀTEA19032CT pinning diagram (SOT1437-1)  
7.2 Pin description  
Table 3.ꢀPin description  
Symbol  
VCC  
Pin  
1
Description  
supply voltage  
OPTO  
GPIO  
ISNS  
VSNS  
CC2  
2
OPTO driver  
3
general-purpose input/output  
current sense input  
4
5
voltage sense input  
6
type C CC2 line detection and USB-PD communication  
type C CC1 line detection and USB-PD communication  
fast discharge sink  
CC1  
7
DISCH  
GND  
8
9
ground  
SW  
10  
NMOS gate drive output  
TEA19032CT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
5 / 36  
 
 
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
8 Functional description  
The TEA19032CT can be considered as a versatile programmable replacement for the  
well-known TL431 shunt regulator series, where:  
The VSNS pin takes the role of the REF input of the TL431  
The OPTO pin takes the role of the cathode  
The GND pin takes the role of the anode  
In addition to the constant voltage (CV) mode, which is regulated via the VSNS pin, the  
system supports constant current (CC) mode. The current control loop is regulated and  
the cable compensation is added via the ISNS pin.  
Alternatively, the ISNS input can be used for overcurrent protection (OCP; see Table 4).  
Several other protections are available. Many of these protections are programmable  
as latched or safe restart. For guaranteed safety, all protections are implemented in  
hardware. So, even when the microcontroller stops, the protections are still functional.  
The output voltage and the output current can be controlled via USB-PD using the CC  
pins.  
The output current and the output voltage are continuously measured via an integrated  
AD-converter. The values can be made available continuously via the USB-PD protocol.  
The applied time constant of the digital filter is initialized via the firmware. A dedicated  
signal that indicates a stable output voltage/output current for a reliable measurement is  
available. It can be used, for example, to determine and monitor the cable resistance in  
the portable device.  
The external temperature, measured via the GPIO pin, is continuously monitored. From  
the GPIO voltage and applied currents, the controller calculates the corresponding  
temperatures. The temperature can be communicated to the portable device. Optionally,  
an OTP function is added to this external temperature measurement, which is  
programmable via MTP (see Table 4).  
The available protections are implemented in hardware. They are independent of  
processor actions. These protections in combination with the NMOS load switch ensure a  
fail-safe operation with only one optocoupler. When the optocoupler fails, the OVP of the  
primary side controller (TEA1936x) limits the maximum output voltage.  
The TEA19032CT supports the type-C connector standard.  
When a Type C receptacle is used, the CC1/CC2 pair is used for plug attach/detach  
detection. It is also meant to support the USB-PD communication standard.  
The USB-PD specification requires the use of a load switch and certain discharge  
behavior of the output voltage at the connector Vbus. So, to drive the gate of an external  
NMOS switch, the TEA19032CT is equipped with an SW pin. To be able to discharge  
Vbus using an external resistor in series with an internal switch, the TEA19032CT is  
equipped with a DISCH pin.  
User-defined parameters can be stored in the non-volatile multi-time programmable  
(MTP) memory.  
TEA19032CT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
6 / 36  
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
8.1 Start-up and supply  
The TEA19032CT is supplied via the VCC pin connected to the secondary DC voltage of  
an AC-to-DC SMPS converter (see Figure 7). To control the primary side controller, this  
VCC voltage is regulated via an integrated voltage/current control loop with external loop  
compensation and an external optocoupler. This optocoupler is part of the gain loop of  
the primary side SMPS controller.  
At each start-up and after power-on reset, the optocoupler current is initially zero. So,  
the AC-to-DC converter starts up with full output power, resulting in a rapid increase of  
the VCC voltage. Due to the low VCC(start) level (≈3 V), the TEA19032CT ensures that it  
is fully operating before the VCC reaches the default initial regulation level. The default  
values of the initial regulation level are 5 V and 3 A and they are programmed in the non-  
volatile memory (MTP).  
At power-on reset, the safe default values, which are read from MTP, are set.  
When the VCC voltage is below the UVLO level, the external NMOS load switch is off.  
When the output is shorted while the load switch is closed, the UVLO is also triggered.  
The load switch is then immediately opened and the system restarts after the safe restart  
timer.  
When the VCC exceeds the UVLO level, all circuits, the initial DAC value, and the  
resistive divider ratio are initialized. The system regulates the output to 5 V with a limited  
output current of 3 A. All these values can be set via the MTP.  
To minimize the output voltage overshoot after start-up, an internal 20 mA current sink  
is applied to VCC when the VCC voltage exceeds 1.05 × Vo(default). The sink current  
remains active until the VCC voltage has dropped to below 1.05 × Vo(default) again.  
After the output voltage has stabilized, the load switch becomes conducting and the  
system waits for an attach. Before the attach, only the essential circuits are working  
which reduces the no-load power to its minimum.  
When the voltage on one of the CC pins drops to below the VIH(Rd) level, an attach is  
detected and all circuits are enabled.  
If a protocol is detected, it is allowed to change the voltage and current.  
1.05 x V  
o(default)  
UVLO  
20 mA  
discharge V  
CC  
5 V regulation  
aaa-023848  
initialization  
Figure 3.ꢀStart-up sequence  
The TEA19032CT operates on supply voltages up to 21 V. The voltage on the VCC pin is  
used to detect an OVP and UVP. The OVP and UVP level are set as a percentage of the  
requested output voltage level.  
TEA19032CT  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
7 / 36  
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
If the supply voltage drops to below the UVLO level, the system returns to the no-supply  
state and opens the load switch. Analog circuits are reset below UVLO. The internal  
digital circuit is reset below the band gap voltage reference level.  
8.2 Voltage loop  
The analog constant voltage (CV) loop regulates VCC such that the voltage on the  
VSNS pin equals the internal reference voltage. An external resistor divider is connected  
between VCC, the VSNS pin, and ground. The value of this divider must match the  
value that is programmed in MTP exactly. It depends on the maximum voltage in the  
application. The divider values are:  
1/ 2.5; maximum PDO voltage ≤ 6 V  
1/5.476; maximum PDO voltage ≤ 13 V  
1/8.325; maximum PDO voltage ≤ 20 V  
The CV loop is regulated by varying the current through an optocoupler diode similar  
to a TL431 driven control loop commonly used in switch mode power supplies. The RC  
combination between the OPTO and VSNS pin determines the dynamic behavior of  
the integrating part of the control loop. The resistor in series with the optocoupler diode  
determines the dynamic behavior of the proportional part of the control loop. To prevent  
saturation of the control loop during switching, a diode is placed in parallel to this resistor.  
See Section 13.3 for more information about the control loop.  
When the voltage loop reference is set to a higher value using the USB-PD or the QC  
protocol, the internal reference voltage is updated to the new setting within 20 μs. The  
output voltage is regulated to the requested voltage with a speed determined by the  
control loop. If there is a transition down, a predefined ramp down sequence is followed  
to prevent a high undershoot. Depending on the step size, the ramp down either follows  
a linear or a parabolic slope. For a transition up, no special measures are required to  
prevent an overshoot. The reason is that the charging current of the loop capacitor lifts  
the voltage on the VSNS pin when the VCC voltage in the application increases.  
TEA19032CT  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
8 / 36  
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
V
CC  
OPTO  
aaa-021703  
a. Circuit  
V
CC  
V
opto  
loop saturated  
discharge  
aaa-021704  
b. Curve  
Figure 4.ꢀLinear transition down (no load)  
A linear ramp-down (see Figure 4) can yield a perfect linear ramp of the output voltage  
without any undershoot. However, depending on the loop bandwidth, the voltage loop  
can end up in saturation. Saturation hampers a fast response to a load step immediately  
following the end of the ramp (most protocols do not allow any load to be drawn during  
a transition). Making the ramp down slower can prevent saturation of the loop. However,  
a slower ramp down can contradict with the maximum discharge time most protocols  
specify.  
A parabolic discharge curve (see Figure 5; patent pending) initially causes the voltage  
loop to saturate, due to the initial rapid ramp down. However, it allows the loop to recover  
and to resume regulation toward the end of the curve. The total parabolic sequence time  
must be chosen such that no undershoot under the final end value occurs.  
TEA19032CT  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
9 / 36  
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
V
CC  
OPTO  
aaa-021703  
a. Circuit  
V
CC  
loop reference  
V
opto  
parabola depth  
loop saturated  
f
(parabola factor)  
discharge  
aaa-021705  
b. Curve  
Figure 5.ꢀParabolic transition down (no-load)  
8.3 Current loop  
The voltage drop across a small external series resistor between the output return  
terminal and the converter ground is supplied to the ISNS pin. An internal amplifier  
multiplies the voltage on the ISNS pin by a factor of 50. The output voltage of the  
amplifier must remain below 2.5 V. The external resistor value can be chosen from 2 mΩ  
up to 22.5 mΩ in steps of 0.02 mΩ. The external resistor value must correspond to the  
programmed value in MTP. Any deviation from this MTP value, e.g. due to PCB-layout  
imperfections, causes a current error and must be corrected (see Section 13.2).  
Current in the application, the sense resistor, and the gain of the internal amplifier must  
be chosen such that the output voltage of the internal amplifier remains below 2.5 V.  
When the application is used in CC-mode, an RC-combination must be connected  
between the OPTO pin and the ISNS pin (see Section 13.4).  
TEA19032CT  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
10 / 36  
 
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
8.4 Cable compensation  
With cable compensation enabled, the output voltage is increased when the output  
current increases to compensate for the voltage drop over the cable. The value of the  
cable compensation is the same for all PDOs. It is set in MTP between the minimum and  
maximum values (see Table 4).  
Setting the cable compensation above 200 mV/A is not recommendable. The cable  
compensation can be enabled/disabled for each individual PDO.  
8.5 Load switch  
A low-cost NMOS transistor is used as load switch between VCC and Vbus (see Figure 7).  
A dedicated switch-drive output pin (SW pin) controls this NMOS transistor. The output  
(high) level of the switch drive output is VCC + 6 V using an internal charge pump.  
As long as VCC is below the UVLO level or if the VCC connection is open, the SW pin is  
held low, ensuring that the load switch is off. To ensure that the NMOS is also kept off  
when the SW pin is disconnected, an external (high-ohmic) resistor is required between  
the gate of the NMOS and Vbus  
.
To avoid charging VCC via the back-gate diode of the load switch, it is possible to apply  
two NMOS switches in series, with their sources connected together.  
8.6 Discharge function  
The DISCH pin, which has an internal low-ohmic switch, provides the means to discharge  
the output Vbus quickly. An external series resistor limits the maximum current and the IC  
dissipation.  
To check if the output voltage has dropped to below 0.8 V, a comparator is implemented.  
This voltage drop is a requirement of the USB-PD specification (vSafe0V) if there is a  
hard reset.  
When the internal DISCH switch is activated, the voltage at the DISCH pin is always low,  
because of the external current limiting resistor. A mechanism has been implemented  
to check the real output voltage. During a hard reset discharge sequence, when VCC  
is below vSafe5V, the switch is opened every millisecond for 20 μs to check the output  
voltage at the end of the 20 μs period. The check of the output voltage is done until the  
voltage remains below 0.7 V and the hard reset discharge sequence is terminated. For  
this check to work properly, the capacitance on the DISCH pin and the external current  
limiting resistor must have a time constant that is short enough.  
TEA19032CT  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
11 / 36  
 
 
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
To ensure that the output remains low, a 1 mA sink current is present on the DISCH pin  
when both the load switch and discharge switch are off. The period that the DISCH pin  
is active in unattached state (td(act)) is typically 100 ms. The reason for this limitation is to  
prevent that excessive power dissipation occurs if an external Vbus voltage is applied.  
8.7 Detach detection  
When the voltage on one of the CC pins is greater than 1.2 V, a detach is detected. If  
the type C cable is disconnected, the output voltage is regulated to its default value (5 V)  
after 200 µs.  
8.8 Internal temperature measurement  
The internal die temperature is monitored continuously. Its value can be requested with  
the appropriate vendor defined message (VDM). When the internal OTP (see Table 5) is  
enabled, the internal OTP is triggered when the die temperature exceeds the value that is  
programmed in MTP.  
8.9 GPIO pin  
In the MTP, the following functions can be selected for the GPIO pin:  
Off  
NTC  
NTC + OTP  
Supply  
In the sections below, the functions are further explained.  
8.9.1 Off  
The GPIO pin is disabled and can be connected to ground.  
8.9.2 NTC  
With the NTC function enabled, the GPIO pin can be used to measure the adapter  
or cable connector temperature via an NTC resistor. The temperature value can be  
requested with the appropriate VDM command. To ensure an accurate temperature  
measurement over the complete temperature range, the external NTC is supplied via an  
adaptive current source (see Figure 6).  
TEA19032CT  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
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NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
I
1
= 15 µA  
I
2
= 60 µA  
I
= 240 µA  
3
disable  
DIGITAL  
CONTROL  
MTP  
ADC  
GPIO  
OTP level  
CC1  
CC2  
FIRMWARE  
USB-PD  
aaa-028134  
a. Circuit  
I
= 15 µA  
I
= 60 µA  
I = 240 µA  
3
1
2
3
V
GPIO  
2.5  
2
1.5  
1
0.5  
0.4  
0
-50  
0
50  
100  
150  
Temperature  
aaa-028135  
b. Curves  
Figure 6.ꢀExternal NTC is supplied via adaptive current sources  
The voltage on the GPIO pin is measured via an internal A-to-D converter. If the voltage  
on the GPIO pin drops to below 400 mV, the source current is increased. If the voltage  
on the GPIO pin exceeds 2.4 V, the source current is decreased. When a 47 kΩ NTC  
resistor with a Beta of 4108 is used, the temperature is accurately measured with a better  
than < 5 °C accuracy within a range of 0 °C to > 120 °C.  
TEA19032CT  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
13 / 36  
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
8.9.3 NTC + OTP  
With this function enabled, an OTP function is added to the NTC function. The OTP  
function is integrated in hardware. The OTP level is set in MTP.  
When the NTC (+ OTP) function is enabled for the GPIO pin, but this pin is not used in  
the application, it must be connected to ground via a fixed 47 kΩ resistor. Do not leave  
the unused pin floating or connect it to ground.  
8.9.4 Supply  
When the supply functionality is chosen for the GPIO pin in MTP, the output of the GPIO  
can be used to supply, e.g., an EEPROM. The following modes can be chosen via MTP:  
The supply signal is high continuously.  
Dynamic switching of the I2C slave supply on the GPIO pin.  
When the master activates I2C communication, the supply is turned on first. After a  
delay, the I2C communications start. When I2C communications stops for 1 s, the  
supply is turned off.  
The signal on the GPIO can have inverted behavior.  
8.10 Communication  
If a type-C receptacle is used, attach/detach detection and USB-PD communication is  
provided on the CC pins.  
8.10.1 USB Type-C  
The TEA19032CT complies with the USB Type-C 1.3 specification (see Ref. 1) in the  
sense that the distinct pull-up current values support attach/detach and current capability  
advertising. The attach/detach detection is done in the hardware. So, if there is a detach,  
a return of Vbus to vSafe5V is always ensured. The hardware implementation of the  
return of Vbus to vSafe5V eliminates the risk of software implementations where Vbus may  
stay at an unsafe level if the program execution stalls.  
To support currents higher than 3 A, use a captive cable. Vconn is not supported.  
TEA19032CT  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
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NXP Semiconductors  
8.10.2 USB-PD  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
The TEA19032CT supports the USB-PD, release 3.0 specification (see Ref. 3) as far as  
it is required for a DFP.  
The TEA19032CT supports the programmable power supply (PPS) part of the USB-PD  
3.0 specification.  
The TEA19032CT can be programmed such that it only complies with the USB-PD 2.0  
specification. With these MTP settings, power-brick USB-PD-2.0 testing can be done and  
USB-PD 2.0 qualification is possible.  
Maximum seven different power data objects (PDO) can be defined in the non-  
volatile memory (MTP). Released types have a predefined set of PDOs programmed  
(see Table 4). For each PDO, current limit type (OCP/CC) and cable compensation on/  
off can be set. However, any other voltage or current within the range can be defined in a  
PDO.  
Four of the seven PDOs can be set as programmable power supply (PPS) instead of a  
fixed power supply (FPS) via MTP.  
The TEA19032CT supports the QC4 VDMs.  
8.10.3 Discover identification  
The TEA19032CT supports the discover identification protocol in USB-PD. It is possible  
to program VID, PID, and BCD values in MTP. These values can be requested via VDM  
messages.  
The maximum power, which is used to determine the power profile, can be set in MTP.  
8.10.4 Quick charge  
®
The Qualcomm QuickCharge QC4 protocol is fully supported (see Ref. 4). The  
required fixed and PPS PDOs can be configured in MTP.  
TEA19032CT  
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NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
8.10.5 MTP configuration  
The TEA19032CT is configurable via MTP. The different types are defined in Section 15.  
Table 4 gives an overview of the programmability with their minimum/maximum values.  
Table 4.ꢀMTP configuration options  
Function  
Options  
minimum  
level  
maximum  
level  
step size  
default output voltage  
default maximum output current  
GPIO  
-
-
3 V  
0.3 A  
-
10 V  
5 A  
-
50 mV  
20 mA  
-
disable; NTC;  
NTC with OTP[1]; Supply  
GPIO protection level  
OTP internal  
-
62 °C  
111 °C  
variable but  
< 5 °C  
-
27 °C  
2 mΩ  
-
135 °C  
22 mΩ  
-
4.3 °C  
0.02 mΩ  
-
external sense resistor(Rsns  
)
-
external resistor divider VCC/  
VSNS (=DIV)[2]  
8.325; 2.5; 5.476  
cable compensation[3]  
-
0 mV/A  
Rsns * DIV * 8  
V/A  
variable  
CC mode or OCP mode  
PDO1  
OCP-mode/CC-mode  
-
-
-
-
-
-
5 V  
3 A  
PDO2; PDO3; PDO4; PDO5;  
PDO6; PDO7  
-
-
3 V  
20 V  
10 A  
0.05 V  
0.01 A  
0.3 A  
OVP level (PDO)[4]  
UVP level (PDO)[4]  
UVP level (APDO)[4]  
PDO PPS enable[5]  
USB3.0 enable  
120 %; 125 %; 130 %  
off; 60 %; 70 %; 80 %  
off; 70 %; 80 %; 90 %  
TRUE/FALSE  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TRUE/FALSE  
-
-
-
-
power limit PPS  
TRUE/FALSE  
minimum voltage APDO  
-
3.3 V  
20 V  
[1] The NTC readout and OTP levels are defined with an NTC of 47 kΩ and a B-constant of 4108.  
[2] Maximum output voltage for 5.476 is 13 V. Maximum output voltage for 2.5 V is 6 V.  
[3] Cable compensation above 200 mV/A is not recommended.  
[4] Can be selected for each PDO individually.  
[5] Maximum 4 PDOs can be an APDO.  
TEA19032CT  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
8.11 Protections  
Table 5 gives an overview of the available protections. All protections operate in safe  
restart mode. All protections except UVP are implemented in hardware. When a fault  
condition occurs, the load switch is immediately opened. When the fault condition is  
removed, the load switch is closed again. The VCC is set to default and the minimum  
delay defined in MTP is passed.  
8.11.1 Protections overview  
Table 5.ꢀOverview of protections  
Protection  
Description  
Implementation  
hardware  
hardware  
hardware  
hardware  
hardware  
software  
Default filter  
UVLO  
undervoltage lockout  
-
OVP  
overvoltage protection  
30 μs  
OCP  
overcurrent protection  
20 ms  
OTP (internal)  
OTP (external)  
UVP  
overtemperature protection  
overtemperature protection  
undervoltage protection  
open-supply (VCC) protection  
overvoltage protection CC1 and CC2 pins  
-
-
-
OSUP  
hardware  
hardware  
-
OV_CC1_CC2  
127 μs  
8.11.2 Secondary side safe restart protection  
When a safe restart protection is triggered, the load switch is immediately turned off.  
The voltage loop is kept on and is regulated to the initial value (5 V typical). As the  
load switch is immediately turned off before the regulation reduces the output power,  
the VCC voltage may increase. To ensure that the VCC voltage has dropped to a safe  
value, before the load switch is turned on again, VCC is discharged via an internal current  
source of 20 mA if it exceeds the level of 1.05 × Vdefault  
.
When the protection is triggered, the safe restart timer is started. After 1 s (default  
value), a restart sequence is performed, which reinitializes all circuits. Optionally, most  
protections can be changed to latched protections in MTP.  
8.11.3 Undervoltage lockout (UVLO)  
The level at which the UVLO protection is triggered is fixed. When VCC drops to below  
the UVLO level, the load switch is immediately turned off. All settings are reset to their  
initial values. Internal circuitries are disabled.  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
8.11.4 Overvoltage protection (OVP)  
The OVP level is set as a percentage of the requested output voltage level. The OVP  
level is set to default 125 % (V < 9 V) or 120 % (V ≥ 9 V) of the programmed output  
voltage. When VCC continuously exceeds this level for longer than the minimum OVP  
time (default 30 μs), the OVP protection is triggered.  
8.11.5 Overcurrent protection (OCP)  
The default TEA19032CT setting is CC mode. In CC mode, the current loop defines the  
maximum current. Instead, the OCP mode can be selected via MTP. The OCP level can  
be programmed individually for each PDO. OCP is only triggered if the OCP mode is  
set for the corresponding PDO and the output current is continuously higher than the  
programmed current level for more than the programmed OCP blanking time.  
8.11.6 Overtemperature protection (OTP)  
8.11.6.1 Internal OTP  
When the internally measured temperature exceeds the programmed OTP setting, OTP  
is triggered, unless the protection is disabled in MTP. The temperature level can be  
defined in MTP. The default value is 113 °C.  
Furthermore, the internal temperature sensor can be used to measure the temperature.  
The measured temperature can be sent via USB-PD.  
8.11.6.2 External OTP  
When the mode "NTC+OTP" is selected for GPIO in the MTP and the externally  
measured temperature exceeds the programmed OTP setting, OTP is triggered. The  
temperature level can be defined in MTP. The default value is 90 °C (see Section 15  
and Table 4).  
8.11.7 Open-supply protection (OSUP)  
When the IC is not supplied via the VCC pin any more, the voltage on the OPTO pin  
is used to open the external load switch. If the VCC pin is disconnected, opening the  
external load switch prevents that the load is damaged.  
8.11.8 Undervoltage protection (UVP)  
The UVP level is set to 60 % PDO level. The reaction to a triggering of UVP is  
programmed in the firmware. The protection is a safe restart protection by default. The  
level can never be lower than the UVLO level. The level can be adjusted via MTP.  
TEA19032CT  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
8.11.9 Output short protection (OSP)  
At a shorted output, the VCC voltage drops to below the UVLO level. The load switch  
is turned off. After the programmed safe restart time, the output is enabled again. To  
meet the average input power requirement at a shorted output, a proper safe restart time  
must be chosen. When the VCC voltage exceeds the UVLO level, the primary controller  
initially limits the maximum output power.  
Because the safe restart time is set to 1 s, the dissipation is limited to < 50 mW. This  
limitation prevents that the application heats up when the output is shorted.  
8.11.10 OVP CC1 and CC2 pins (OV_CC1_CC2)  
The overvoltage protection of the CC1 and CC2 pins can be enabled in MTP. However, it  
is switched off by default.  
OV_CC1_CC2 is a safe restart protection. When the CC1 or CC2 pin is shorted to Vbus  
,
this protection is triggered. The trigger level of the OV_CC1_CC2 is at 4.5 V. To prevent  
unwanted triggering, it has a 127 µs (default) blanking time.  
8.11.11 Soft short protection CC pins (SHORT_CC1_CC2)  
The CC pins are protected with a soft-short protection that measures the impedance  
of the CC lines. When the measured impedance is not according to the USB-PD  
specification, the load switch is opened.  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
9 Limiting values  
Table 6.ꢀLimiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
Voltages  
VVCC  
Parameter  
Conditions  
Min  
Max  
Unit  
voltage on pin VCC  
voltage on pin OPTO  
voltage on pin CC1  
voltage on pin CC2  
voltage on pin SW  
voltage on pin DISCH  
voltage on pin VSNS  
voltage on pin ISNS  
voltage on pin GPIO  
−0.5  
−0.5  
−0.5  
−0.5  
−0.5  
−0.5  
−0.5  
−0.5  
−0.5  
+26  
V
V
V
V
V
V
V
V
V
VOPTO  
VCC1  
+26  
+26  
VCC2  
+26  
VSW  
VCC + 9  
+26  
VDISCH  
VVSNS  
VISNS  
VGPIO  
General  
Tstg  
+3.6  
+3.6  
+3.6  
storage temperature  
junction temperature  
−65  
−40  
+150  
+150  
°C  
°C  
Tj  
Electrostatic discharge (ESD)  
VESD  
electrostatic discharge  
voltage  
human body model  
(HBM)  
−2000  
−500  
−200  
+2000  
+500  
+200  
V
V
V
charged device model  
(CDM)  
machine model (MM)  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
10 Recommended operating conditions  
Table 7.ꢀRecommended operating conditions  
Symbol  
Voltages  
VVCC  
Parameter  
Conditions  
Min  
Max  
Unit  
voltage on pin VCC  
voltage on pin OPTO  
voltage on pin CC1  
voltage on pin CC2  
voltage on pin SW  
voltage on pin DISCH  
voltage on pin VSNS  
voltage on pin ISNS  
voltage on pin GPIO  
0
0
0
0
0
0
0
0
0
21  
V
V
V
V
V
V
V
V
V
VOPTO  
VCC1  
21  
5
VCC2  
5
VSW  
VCC + 6  
21  
VDISCH  
VVSNS  
VISNS  
VGPIO  
General  
Tj  
2.5  
3.3  
3.3  
junction temperature  
−20  
+105  
°C  
11 Thermal characteristics  
Table 8.ꢀThermal characteristics  
Symbol  
Parameter  
Conditions  
Typ  
Unit  
Rth(j-a)  
thermal resistance from  
junction to ambient  
JEDEC test board  
115  
K/W  
Rth(j-c)  
thermal resistance from  
junction to case  
JEDEC test board  
44  
K/W  
TEA19032CT  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
12 Characteristics  
Table 9.ꢀCharacteristics  
Tamb = 25 °C; VCC = 5.0 V; all voltages are measured with respect to GND; currents are positive when flowing into the IC;  
unless otherwise specified.  
Symbol  
Supply (VCC pin)  
Vth(UVLO) undervoltage lockout  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
falling  
-
2.85  
2.9  
V
threshold  
ICC  
supply current  
unattached; VCC = 5 V  
nominal; VCC = 5 V  
-
-
-
1.8  
3
-
-
-
mA  
mA  
mA  
ICC(dch)  
discharge supply  
current  
extra discharge current;  
VCC = 1.05 × Vo(default)  
20  
discharge current of  
VCC during safe restart  
protection; depends on  
load conditions  
-
20  
-
mA  
Vos  
overshoot voltage  
protection level voltage  
-
1.05 × Vo(default)  
-
V
CC1/CC2 section (CC1 and CC2 pins)  
Type C  
Ipu  
pull-up current  
current source for DFP pull-up indication  
default current  
1.5 A mode  
3 A mode  
−96  
−80  
−64  
μA  
μA  
μA  
−194  
−356  
−180  
−330  
−166  
−304  
VIH  
HIGH-level input  
voltage  
with standard 5.1 kΩ pull-down resistance  
default current  
1.5 A mode  
3 A mode  
1.5  
1.6  
1.7  
V
V
V
1.5  
1.6  
1.7  
2.45  
2.60  
2.75  
VIL  
LOW-level input voltage with standard 5.1 kΩ pull-down resistance  
default current  
1.5 A mode  
3 A mode  
0.15  
0.35  
0.75  
-
0.2  
0.25  
0.45  
0.85  
-
V
V
V
V
0.40  
0.80  
4.5  
Vovp  
overvoltage protection CC1 and CC2 pins  
voltage  
USB-PD normative specification  
fbit  
bit rate  
BMC bit rate  
270  
300  
330  
Kbps  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
USB-PD transmitter normative specification  
tfall  
fall time  
rise time  
10 % and 90  
% amplitude  
points; minimum is  
underloaded condition  
300  
-
650  
ns  
trise  
10 % and 90  
300  
-
650  
ns  
% amplitude  
points; minimum is  
underloaded condition  
Vo  
Zo  
output voltage  
signal voltage swing  
transmitter  
1.05  
-
1.125  
45  
1.2  
-
V
output impedance  
Ω
USB-PD receiver normative specification  
Cin  
input capacitance  
receiver  
-
250  
-
-
-
pF  
ns  
|tfltr(lim)  
time constant limiting  
filter  
receiver bandwidth  
100  
zi  
input impedance  
input voltage  
receiver  
10  
-
-
MΩ  
Vi  
receiver comparator  
low level  
-
-
-
0.55  
0.8  
-
-
-
V
high level  
V
hysteresis  
250  
mV  
Voltage control (VSNS pin)  
Vref  
reference voltage  
input voltage range on  
the VSNS pin to control  
the voltage loop  
0.3  
-
2.4  
V
Vacc  
voltage accuracy  
voltage loop accuracy;  
VCC = 5 V  
−2  
−2  
-
-
+2  
+2  
%
%
measurement voltage  
accuracy  
gm  
transconductance  
maximum gain  
VCC in; OPTO out  
cable compensation  
4
-
-
-
-
mA/mV  
mV/mV  
Gmax  
8
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Current control (ISNS pin)  
Iref  
reference current  
parameter can be  
programmed in MTP 10  
bits  
0
-
40  
mV  
Iout  
output current  
current loop accuracy; Rsense = 5 mΩ  
0.5 A < Iout < 5 A  
Iout > 5 A  
−100  
−2  
-
-
+100  
+2  
mA  
%
measurement current accuracy; Rsense = 5 mΩ  
[1]  
0.5 A < Iout < 5 A  
Iout > 5 A  
−100  
−3  
-
-
-
+100  
+3  
mA  
%
gm  
transconductance  
gain current;  
200  
mA/mV  
amplifier = 50  
gain current;  
amplifier = 25  
100  
-
-
mA/mV  
GPIO pin  
IO(GPIO)  
output current on pin  
GPIO  
GPIO function = NTC (+OTP)  
low temperatures  
(see Figure 6)  
−15.75 −15.00  
−14.25 μA  
medium  
−63  
−60  
−57  
μA  
temperatures  
(see Figure 6)  
high temperatures  
(see Figure 6)  
−252  
−5  
−240  
−228  
+5  
μA  
°C  
°C  
Tacc  
Tres  
VI  
temperature accuracy  
47 kΩ NTC  
(Beta = 4108)  
-
-
temperature resolution temperature  
measurement  
−1  
+1  
input voltage  
high level  
1.5  
-
-
-
-
V
V
low level  
0.9  
VO  
output voltage  
GPIO function = supply  
high level; no load  
low level; no load  
GPIO function = supply  
source; VO = 2.3 V  
sink; VO = 0.4 V  
2.7  
-
3.0  
-
3.3  
0.3  
V
V
IO  
output current  
-
-
-
−1  
-
mA  
mA  
1
Protections  
Vovp  
overvoltage protection with control loop in  
voltage voltage control mode  
3
-
-
25  
+3  
V
Vovp(acc)  
overvoltage protection VCC pin; Vovp = 6 V  
voltage accuracy  
−3  
%
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Vocp  
overcurrent protection  
voltage  
6
-
40  
mV  
Vocp(acc)  
Vuvp  
Vuvp(acc)  
ICC(dch)  
overcurrent protection  
voltage accuracy  
−3  
3
-
+3  
21  
+3  
-
%
undervoltage protection  
voltage  
-
V
undervoltage protection  
voltage accuracy  
−3  
-
-
%
discharge supply  
current  
during safe restart  
protection  
20  
mA  
SW driver  
RO  
output resistance  
switch-on  
switch-off  
-
-
80  
-
-
kΩ  
Ω
600  
DISCH part (DISCH pin)  
Rdch  
Vdet(rst)  
tact  
discharge resistance  
reset detection voltage hard reset  
-
3
-
Ω
0.65  
-
0.70  
100  
0.75  
-
V
active time  
maximum on-time  
ms  
during attached state  
OPTO pin  
IO(min)  
minimum output current  
-
30  
5
-
μA  
IO(max)  
maximum output  
current  
3.75  
6.25  
mA  
Internal oscillator  
fosc internal oscillator  
frequency  
Internal temperature protection  
Totp(acc) overtemperature  
-
10  
-
-
MHz  
°C  
temperature  
−10  
+10  
protection trip accuracy regarding the trip level  
programmed in MTP  
[1] The current sense pin can be used up to 40 mV. The result is a current range that depends on the programmed Rsense resistor. (e.g. with 10 mΩ, the value  
can be up to 4 A).  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
13 Application information  
V
CC  
V
bus  
XV  
TEA199x  
GND  
R2  
R3  
DRAIN  
GATE  
S1  
HV  
n.c.  
DRIVER  
ISENSE  
AUX  
CAP  
SOURCE  
CTRL  
TEA193x  
GND  
VCCH  
VCCL  
R1  
PROTECT  
R7  
R5  
VCC  
SW  
OPTO  
GND  
DISCH  
R6  
C2  
R4  
C1  
GPIO  
ISNS  
CC1  
CC2  
TEA19032C  
VSNS  
NTC  
(near connector)  
aaa-031608  
Figure 7.ꢀTypical application diagram, including TEA1938, TEA1999 (low-side SR), and TEA19032CT  
13.1 Resistor divider  
The resistor divider (R3 / (R2 + R3) connected from the VCC pin to the VSNS pin must  
reduce the output voltage to < 2.5 V for the maximum output voltage. See Section 8.2 for  
more information about the divider ratios. To minimize the voltage drop at the connector,  
the resistor divider must be connected as close as possible to the load switch.  
It is important that the external resistive divider exactly matches the internal value (MTP),  
because internal measurements depend on it. In the resistive divider, use resistors with a  
1 % or better accuracy.  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
13.2 Sense resistor  
The accuracy of the sense resistor R1 is very important. Any deviation from the value in  
MTP gives an offset in the current measurement. Because the sense resistor is very low-  
ohmic, the layout of the connections in the PCB can give major deviations from its initial  
value.  
To overcome these deviations, several options are available:  
Change the sense resistor value such that the complete value is matching the typical  
MTP value (5 mΩ or 10 mΩ).  
Trim the value with a resistor divider so that the (R7 / (R5 + R7)) × (R1 + RPCB  
)
matches the MTP default value. RPCB is the resistance of copper wires and the  
resistance change of the sense resistor due to its soldering profile.  
To maximize accuracy and temperature stability, keep Rpcb as low as possible. The  
sense resistor must have a temperature coefficient that is as low as possible. To prevent  
magnetic coupling, keep the length and the area of the connections between the sense  
resistor and the GND and ISNS pins as small as possible.  
13.3 Voltage loop  
In the application diagram, an integrator network is connected between the VSNS pin  
and the optocoupler. The recommended values of these components are:  
R2 = 160 kΩ to 180 kΩ  
R4 = 1 kΩ  
C1 = 10 nF; for the integral part  
To prevent magnetic coupling to these parts, which results in pollution in output voltage,  
the length and the area of the connection must be kept as small as possible.  
13.4 Current loop  
For applications using the CC loop in the application, an integrator network is connected  
between the ISNS pin and the optocoupler. The recommended values for these  
components are:  
R5 = 330 Ω when R1 = 10 mΩ; R5 = 160 Ω when R1 = 5 mΩ; connected between  
sense resistor and the ISNS pin for the proportional part.  
R6 = 5 kΩ  
C2 = 100 nF; for the integral part  
To prevent magnetic coupling to these parts, which results in pollution in output currents,  
the length and the area of the connection must be kept as small as possible.  
For applications that use OCP mode, these three components can be omitted.  
TEA19032CT  
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© NXP B.V. 2019. All rights reserved.  
Product data sheet  
Rev. 1 — 15 March 2019  
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NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
14 Package outline  
SO10: plastic small outline package; 10 leads; body width 3.9 mm; body thickness 1.35 mm  
SOT1437-1  
D
E
A
c
y
X
H
E
v
A
Z
10  
6
Q
A
2
A
A
1
A
3
θ
1
5
pin 1 index  
L
p
L
e
w
b
p
detail X  
(8x)  
(10x)  
0
5 mm  
scale  
Dimensions  
Unit  
max 1.75 0.25 1.45  
(1)  
(1)  
A
A
A
A
b
c
D
E
e
H
L
L
Q
1.00 0.70  
v
w
y
Z
θ
1
2
3
p
E
p
°
°
°
8
4
0
0.49 0.25 6.3 4.0  
0.18 1.35 0.25 0.43 0.22 6.2 3.9 1.27 6.00 1.05 0.70 0.65 0.25 0.25 0.1 0.56  
0.10 1.25 0.36 0.19 6.1 3.8 5.80 0.40 0.60 0.30  
6.20  
0.70  
nom  
min  
mm  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
sot1437-1_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
15-02-09  
15-03-06  
SOT1437-1  
Figure 8.ꢀPackage outline SOT1437-1 (SO10)  
TEA19032CT  
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Product data sheet  
Rev. 1 — 15 March 2019  
28 / 36  
 
NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
15 Appendix: Internal parameter settings per type  
In this section, the internal parameter settings per type are given.  
15.1 TEA19032CABT  
Table 10 gives an overview of the function settings in the TEA19032CABT.  
Table 10.ꢀInternal parameter settings  
Function  
TEA19032CABT  
power rating  
45 W  
USB-PD3; QC4  
5 V  
supported standards  
default output voltage  
default maximum output current  
GPIO1 function  
3 A  
NTC with OTP  
90 °C  
GPIO1 protection level  
chip OTP trigger level  
113 °C  
10 mΩ  
external sense resistor (Rsense  
)
external resistor divider VCC/VSNS (= DIV)  
8.325  
cable compensation  
CC mode or OCP  
OCP level/CC mode margin  
PDO1  
100 mV/A  
OCP  
5 %  
PPS enable  
voltage  
FALSE  
5 V  
current  
3 A  
OVP level  
125 %  
off  
UVP level  
QC enable  
TRUE  
TRUE  
cable compensation enable  
PDO2  
PPS enable  
voltage  
FALSE  
9 V  
current  
3 A  
OVP level  
120 %  
60 %  
TRUE  
TRUE  
UVP level  
QC enable  
cable compensation enable  
TEA19032CT  
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Product data sheet  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
Function  
PDO3  
PPS enable  
TEA19032CABT  
FALSE  
12 V  
voltage  
current  
3 A  
OVP level  
120 %  
60 %  
TRUE  
TRUE  
UVP level  
QC enable  
cable compensation enable  
PDO4  
PPS enable  
voltage  
FALSE  
15 V  
current  
3 A  
OVP level  
120 %  
60 %  
UVP level  
QC enable  
FALSE  
TRUE  
cable compensation enable  
PDO5  
PPS enable  
voltage  
FALSE  
20 V  
current  
2.25 A  
120 %  
60 %  
OVP level  
UVP level  
QC enable  
FALSE  
TRUE  
cable compensation enable  
TEA19032CT  
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Product data sheet  
Rev. 1 — 15 March 2019  
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NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
16 Abbreviations  
Table 11.ꢀAbbreviations  
Acronym  
AC  
Description  
alternating current  
augmented PDO  
bi-phase mark coding  
bill of materials  
constant current  
constant voltage  
direct current  
APDO  
BMC  
BOM  
CC  
CV  
DC  
DCM  
DFP  
discontinuous conduction mode  
downstream facing port  
electrically erasable programmable read-only memory  
multi-time programmable  
overcurrent protection  
EEPROM  
MTP  
OCP  
OSP  
OSUP  
OTP  
output short protection  
output supply protection  
overtemperature protection  
overvoltage protection  
power data object  
OVP  
PDO  
PPS  
programmable power supply  
Quasi-Resonant  
QR  
RAM  
ROM  
RPDO  
SMPS  
UFP  
random-access memory  
read-only memory  
regular PDO  
switched-mode power supply  
upstream facing port  
USB  
universal serial bus  
UVLO  
UVP  
undervoltage lockout  
undervoltage protection  
vendor defined messages  
VDM  
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Product data sheet  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
17 References  
[1] USB Type-C Cable and Connector Specification  
— Revision 1.3 and ECNs; July 14, 2017  
[2] USB Power Delivery Specification Rev. 2.0,  
— Revision 2.0, version 1.3; January 12, 2017  
Version 1.3  
[3] USB Power Delivery Specification  
— Revision 3.0, version 1.1; ECNs as of June 12, 2017;  
June 12, 2017  
[4] Qualcomm® QuickCharge4 Interface Specification — Revision D; Qualcomm®, August 1, 2017  
- 80-NH008-3  
TEA19032CT  
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Product data sheet  
Rev. 1 — 15 March 2019  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
18 Revision history  
Table 12.ꢀRevision history  
Document ID  
Release date  
20190315  
Data sheet status  
Change notice  
Supersedes  
TEA19032CT v.1  
Product data sheet  
-
-
TEA19032CT  
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Product data sheet  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
19 Legal information  
19.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Definition  
Objective [short] data sheet  
Development  
This document contains data from the objective specification for product  
development.  
Preliminary [short] data sheet  
Product [short] data sheet  
Qualification  
Production  
This document contains data from the preliminary specification.  
This document contains the product specification.  
[1] Please consult the most recently issued document before initiating or completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple  
devices. The latest product status information is available on the Internet at URL http://www.nxp.com.  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
19.2 Definitions  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences  
of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the  
relevant full data sheet, which is available on request via the local NXP  
Semiconductors sales office. In case of any inconsistency or conflict with the  
short data sheet, the full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes  
no representation or warranty that such applications will be suitable  
for the specified use without further testing or modification. Customers  
are responsible for the design and operation of their applications and  
products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications  
and products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with  
their applications and products. NXP Semiconductors does not accept any  
liability related to any default, damage, costs or problem which is based  
on any weakness or default in the customer’s applications or products, or  
the application or use by customer’s third party customer(s). Customer is  
responsible for doing all necessary testing for the customer’s applications  
and products using NXP Semiconductors products in order to avoid a  
default of the applications and the products or of the application or use by  
customer’s third party customer(s). NXP does not accept any liability in this  
respect.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product  
is deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
19.3 Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, NXP Semiconductors does not  
give any representations or warranties, expressed or implied, as to the  
accuracy or completeness of such information and shall have no liability  
for the consequences of use of such information. NXP Semiconductors  
takes no responsibility for the content in this document if provided by an  
information source outside of NXP Semiconductors. In no event shall NXP  
Semiconductors be liable for any indirect, incidental, punitive, special or  
consequential damages (including - without limitation - lost profits, lost  
savings, business interruption, costs related to the removal or replacement  
of any products or rework charges) whether or not such damages are based  
on tort (including negligence), warranty, breach of contract or any other  
legal theory. Notwithstanding any damages that customer might incur for  
any reason whatsoever, NXP Semiconductors’ aggregate and cumulative  
liability towards customer for the products described herein shall be limited  
in accordance with the Terms and conditions of commercial sale of NXP  
Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Right to make changes — NXP Semiconductors reserves the right to  
make changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
TEA19032CT  
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Product data sheet  
Rev. 1 — 15 March 2019  
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TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or  
the grant, conveyance or implication of any license under any copyrights,  
patents or other industrial or intellectual property rights.  
of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Security — While NXP Semiconductors has implemented advanced  
security features, all products may be subject to unidentified vulnerabilities.  
Customers are responsible for the design and operation of their applications  
and products to reduce the effect of these vulnerabilities on customer’s  
applications and products, and NXP Semiconductors accepts no liability for  
any vulnerability that is discovered. Customers should implement appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor  
tested in accordance with automotive testing or application requirements.  
NXP Semiconductors accepts no liability for inclusion and/or use of non-  
automotive qualified products in automotive equipment or applications. In  
the event that customer uses the product for design-in and use in automotive  
applications to automotive specifications and standards, customer (a) shall  
use the product without NXP Semiconductors’ warranty of the product for  
such automotive applications, use and specifications, and (b) whenever  
customer uses the product for automotive applications beyond NXP  
Semiconductors’ specifications such use shall be solely at customer’s own  
risk, and (c) customer fully indemnifies NXP Semiconductors for any liability,  
damages or failed product claims resulting from customer design and use  
19.4 Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
GreenChip — is a trademark of NXP B.V.  
TEA19032CT  
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Product data sheet  
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NXP Semiconductors  
TEA19032CT  
USB-PD 2.0/USB-PD 3.0/QC 4 controller for SMPS  
Contents  
1
2
2.1  
2.2  
2.3  
3
4
5
6
7
7.1  
7.2  
8
8.1  
8.2  
8.3  
General description ............................................ 1  
13.2  
13.3  
13.4  
14  
Sense resistor ..................................................27  
Voltage loop .....................................................27  
Current loop .....................................................27  
Package outline .................................................28  
Appendix: Internal parameter settings per  
type .....................................................................29  
TEA19032CABT .............................................. 29  
Abbreviations .................................................... 31  
References .........................................................32  
Revision history ................................................ 33  
Legal information ..............................................34  
Features and benefits .........................................2  
General .............................................................. 2  
Protocol support ................................................ 2  
Protections .........................................................3  
Applications .........................................................3  
Ordering information .......................................... 3  
Marking .................................................................3  
Block diagram ..................................................... 4  
Pinning information ............................................ 5  
Pinning ...............................................................5  
Pin description ...................................................5  
Functional description ........................................6  
Start-up and supply ........................................... 7  
Voltage loop .......................................................8  
Current loop .....................................................10  
Cable compensation ........................................11  
Load switch ......................................................11  
Discharge function ...........................................11  
Detach detection ..............................................12  
Internal temperature measurement ..................12  
GPIO pin ..........................................................12  
Off .................................................................... 12  
NTC ..................................................................12  
NTC + OTP ..................................................... 14  
Supply ..............................................................14  
Communication ................................................14  
USB Type-C .................................................... 14  
USB-PD ........................................................... 15  
Discover identification ......................................15  
Quick charge ................................................... 15  
MTP configuration ............................................16  
Protections .......................................................17  
Protections overview ........................................17  
Secondary side safe restart protection ............ 17  
Undervoltage lockout (UVLO) ..........................17  
Overvoltage protection (OVP) ..........................18  
Overcurrent protection (OCP) ..........................18  
Overtemperature protection (OTP) .................. 18  
15  
15.1  
16  
17  
18  
19  
8.4  
8.5  
8.6  
8.7  
8.8  
8.9  
8.9.1  
8.9.2  
8.9.3  
8.9.4  
8.10  
8.10.1  
8.10.2  
8.10.3  
8.10.4  
8.10.5  
8.11  
8.11.1  
8.11.2  
8.11.3  
8.11.4  
8.11.5  
8.11.6  
8.11.6.1 Internal OTP .................................................... 18  
8.11.6.2 External OTP ...................................................18  
8.11.7  
8.11.8  
8.11.9  
Open-supply protection (OSUP) ...................... 18  
Undervoltage protection (UVP) ........................18  
Output short protection (OSP) .........................19  
8.11.10 OVP CC1 and CC2 pins (OV_CC1_CC2) ....... 19  
8.11.11 Soft short protection CC pins (SHORT_  
CC1_CC2) ....................................................... 19  
9
Limiting values ..................................................20  
Recommended operating conditions .............. 21  
Thermal characteristics ....................................21  
Characteristics .................................................. 22  
Application information ....................................26  
Resistor divider ................................................26  
10  
11  
12  
13  
13.1  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section 'Legal information'.  
© NXP B.V. 2019.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 15 March 2019  
Document identifier: TEA19032CT  

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