AM6012F [NXP]
12-Bit multiplying D/A converter; 12位乘法D / A转换器
| 型号： | AM6012F |
| 厂家： | 
NXP |
| 描述： | 12-Bit multiplying D/A converter |
| 文件： | 总11页 (文件大小：108K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
DESCRIPTION
PIN CONFIGURATION
The AM6012 12-bit multiplying Digital-to-Analog converter provides
high-speed and 0.025% differential nonlinearity over its full
commercial temperature range.
1
D and F Packages
1
2
V+
20
19
18
D
D
1
The D/A converter uses a 3-bit segment generator for the MSBs in
conjunction with a 9-bit R-2R diffused resistor ladder to provide
12-bit resolution without costly trimming processes. This technique
guarantees a very uniform step size (up to ± LSB from the ideal),
monotonicity to 12 bits and integral nonlinearity to 0.05% at its
differential current outputs.
I
I
2
3
4
O
3
D
D
O
4
17 V–
5
16
15
14
13
12
11
COMP
D
5
6
D
D
V
6
7
REF(–)
7
V
REF(+)
The dual complementary outputs of the AM6012 increase its
versatility, and effectively double the peak-to-peak output swing.
Digital inputs, in addition, can be configured to accept all popular
logic families.
8
D
D
GND/V
8
9
LC
9
D
D
LSB
12
11
10
D
10
TOP VIEW
While the device requires a reference input of 1mA for a 4mA
full-scale current, operation is nearly independent of power supply
voltage shifts. The power supply rejection ratio is ±0.001% FS/% ∆V.
The devices will work from +5, -12V to ±18V rails, with as low as
230mW power consumption typical.
NOTE:
1. Available in large SO (SOL) package only.
APPLICATIONS
• CRT displays, computer graphics
FEATURES
• 12-bit resolution
• Robotics and machine tools
• Automatic test equipment
• Accurate to within ±0.05%
• Monotonic over temperature
• Programmable power supplies
• CAD/CAM systems
• Fast settling time, 250ns typical
• Trimless design for low cost
• Data acquisition and control systems
• Analog-to-digital converter systems
• Differential current outputs
• High-speed multiplying capability
• Full-scale current, 4mA (with 1mA reference)
• High output compliance voltage, -5 to +10V
• Low power consumption, 230mW
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
0 to +70°C
ORDER CODE
AM6012F
DWG #
0584B
0172D
20-Pin Ceramic Dual In-Line Package (CERDIP)
20-Pin Plastic Small Outline Large (SOL) Package
0 to +70°C
AM6012D
776
August 31, 1994
853-0904 13721
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
BLOCK DIAGRAM
GND/MSB
LSB
B12
V(+)
20
B1
B2
B3
B4
B5
B6
B7
b8
B9
B10
10
B11
11
V
LC
13
1
2
3
4
5
6
7
8
9
12
LOGIC SWITCHES
DECODER
18
19
BIAS
NETWORK
I
O
I
O
REFERENCE
AMPLIFIER
CURRENT
SWITCHES
14
15
V
(+)
(–)
REF
9-BIT R-2R
D/A CONVERTER
V
I
REF
SEG
9-SEGMENT
GENERATOR
16
COMP
17
V(–)
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
UNIT
T
A
Operating temperature
AM6012F
0 to +70
°C
°C
°C
V
T
T
Storage temperature range
-65 to +150
300
STG
Lead soldering temperature 10sec max
Power supply voltage
SOLD
V
±18
S
Logic inputs
-5V to +18
-8V to +12
V- to V+
±18
V
Voltage across current outputs
V
V
V
Reference inputs V , V
14 15
REF
REF
REF
Reference input differential voltage (V to V
)
V
14
15
I
Reference input current (I
)
1.25
mA
14
1
P
D
Maximum power dissipation, T =25°C, (still-air)
A
F package
D package
1560
1390
mW
mW
NOTES:
1. Derate above 25°C, at the following rate:
F package at 12.5mW/°C
D package at 11.1mW/°C
777
August 31, 1994
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
DC ELECTRICAL CHARACTERISTICS
V+=+15V, V-=-15V, I
=1.0mA, 0°C ≤ T ≤ 70°C
REF
A
LIMITS
Typ
SYMBOL
PARAMETER
Resolution
TEST CONDITIONS
UNIT
Max
Min
12
Bits
Bits
Monotonicity
12
DNL
NL
Differential nonlinearity
Deviation from ideal step size
Deviation from ideal straight line
±0.025
%FS
Bits
12
Nonlinearity
±.05
%FS
V
REF
=10.000V
I
Full-scale current
Full-scale tempco
R
-R =10.000kΩ
14 15
3.935
3.999
4.063
mA
FS
T =25°C
A
TCI
±10
±40
ppm/°C
%FS/°C
FS
±0.001
±0.004
DNL Specification guaranteed over
compliance range
V
OC
Output voltage compliance
-5
+10
V
R
>10MΩ typ.
OUT
I
I
Symmetry
I
-I
±0.4
±2.0
µA
µA
FSS
FS FS
Zero-scale current
Logic
input
0.10
ZS
V
V
IL
Logic “0”
Logic “1”
0.8
V
IH
levels
2.0
I
Logic input current
Logic input swing
V
IN
=-5 to +18V
V-=-15V
40
+18
1.1
µA
V
IN
V
-5
0.2
0
IS
REF
15
I
I
Reference current range
Reference bias current
1.0
mA
µA
-0.5
-2.0
R
=800Ω
C =0pF
14(eq)
dl/dt
Reference input slew rate
Power supply sensitivity
4.0
8.0
mA/µs
C
PSSI
PSSI
V+
V-
V+=+13.5V to +16.5V, V-=-15V
V-=-13.5V to -16.5V, V+=+15V
±0.0005
±0.001
±0.001
18
%FS/%
FS+
±0.00025
FS-
Power supply range
Power supply current
Power dissipation
V
=0V
OUT
4.5
-18
V
-10.8
8.5
I+
V+=+5V, V-=-15V
V+=+15V, V-=-15V
5.7
-13.7
5.7
I-
-18.0
8.5
mA
mW
I+
I-
-13.7
234
-18.0
312
P
D
V+=+5V, V-=-15V
V+=+15V, V-=-15V
291
397
AC ELECTRICAL CHARACTERISTICS
V+=+15V, V-=-15V, I
=1.0mA, 0°C ≤ T ≤ 70°C
REF
A
LIMITS
Typ
SYMBOL
PARAMETER
Settling time
TEST CONDITIONS
UNIT
Min
Max
t
S
To ± 1/2LSB, all bits ON or OFF, T =25°C
250
500
ns
ns
pF
A
t
t
Propagation
delay—all bits
PLH
PHL
50% to 50%
25
20
50
C
Output capacitance
OUT
778
August 31, 1994
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
splitting utilizing scaled emitters. This saves ladder resistors and
greatly reduces the range of emitter scaling required in the 9-bit
DAC. All current switches in the step generator are high-speed
fully-differential switches which are capable of switching low currents
at high speed. This allows the use of a binary scaled network all the
way to the least significant bit which saves power and simplifies the
circuitry.
CIRCUIT DESCRIPTION
The AM6012 is a 12-bit DAC which uses diffused resistors and
requires no trimming to guarantee monotonicity over the
temperature range. A segmented DAC design guarantees a more
uniform step size over the temperature range than is normally
available with trimmed 12-bit converters. The converter features
differential high compliance current outputs, wide supply range, and
a multiplying reference input.
Diffused resistors have advantages over thin film resistors beyond
simple economy and bipolar process compatibility. The resistors are
fabricated in single crystal rather than amorphous material which
gives them better long term stability and tracking and much higher
moisture resistance. They are diffused at 1000°C and so are
resistant to changes in value due to thermal and chemical causes.
Also, no burn-in is required for stability. The contact resistance
between aluminum and silicon is more predictable than between
aluminum and an amorphous thin film, and no sandwich metals are
required to enhance or protect the contact or limit alloying. The initial
match between two diffused resistors is similar to that of thin film
since both are defined by photomasks and chemical etching. Since
the resistors are not trimmed or altered after fabrication, their
tracking and long-term characteristics are not degraded.
In many converter applications, uniform step size is more important
than conformance to an ideal straight line. Many 12-bit converters
are used for high resolution rather than high linearity, since few
transducers are more linear than ±0.1%. All classic binarily weighted
converters require ±1/2LSB (±0.012%) linearity in order to guarantee
monotonicity, which requires very tight resistor matching and
tracking. The AM6012 uses conventional bipolar processing to
achieve high differential linearity and monotonicity without requiring
correspondingly high linearity, or conformance to an ideal straight
line.
One design approach which provides monotonicity without requiring
high linearity is the MOS switch-resistor string. This circuit is actually
a full complement to a current-switched R-2R DAC since it is slower,
has a voltage output, and, if implemented at the 12-bit level, would
use 4096 low tolerance resistors rather than a minimum number of
high tolerance resistors as in the R-2R network. Its lack of speed
and density for 12 bits are its drawbacks.
DIFFERENTIAL VS INTEGRAL NONLINEARITY
Integral nonlinearity, for the purposes of the discussion, refers to the
“straightness” of the line drawn through the individual response
points of a data converter. Differential nonlinearity, on the other
hand, refers to the deviation of the spacing of the adjacent points
from a 1 LSB ideal spacing. Both may be expressed as either a
percentage of full-scale output or as fractional LSBs or both. The
graphs in Figure 1 define the manner in which these parameters are
specified. The left graph shows a portion of the transfer curve of a
DAC with 1/2LSB INL and the (implied) DNL spec of 1 LSB. Below
this is a graphic representation of the way this would appear on a
CRT screen where the AM6012 is used as a display driver. On the
right is a portion of the transfer curve of a DAC specified for 1/2LSB
INL with LSB DNL specified and the graphic display below it.
With the segmented DAC approach, the 4096 required output levels
are composed of 8 groups of 512 steps each. Each step group is
generated by a 9-bit DAC, and each of the segment slopes is
determined by one of 8 equal current sources. The resistors which
determine monotonicity are in the 9-bit DAC. The major carry of the
9-bit DAC is repeated in each of the 8 segments, and requires eight
times lower initial resistor accuracy and tracking to maintain a given
differential nonlinearity over temperature.
The operation of the segmented DAC may be visualized by
assuming an input code of all zeroes. The first segment current I is
O
divided into 512 levels by the 9-bit multiplying DAC and fed to the
One of the characteristics of an R-2R DAC in standard form is that
any transition which causes a zero LSB change (i.e., the same
output for two different codes) will exhibit the same output each time
that transition occurs. The same holds true for transitions causing a
2 LSB change. These two problem transitions are allowable for the
standard definition of monotonicity and also allow the device to be
specified very tightly for INL. The major problem arising from this
error type is in A/D converter implementations. Inputs producing the
same output are now represented by ambiguous output codes for an
identical input. Also, two LSB gaps can cause large errors at those
input levels (assuming 1/2LSB quantizing levels). It can be seen
from the two figures that the DNL-specified D/A converter will yield
much finer grained data than the INL-specified part, thus improving
the ability of the A/D to resolve changes in the analog input.
output, I
. As the input code increases, a new segment current is
OUT
selected for each 512 counts. The previous segment is fed to output
where the new step group is added to it, thus ensuring
I
OUT
monotonicity independent of segment resistor values. All higher
order segments feed I
.
OUT
With the segmented DAC approach, the precision of the 8 main
resistors determines linearity only. The influence of each of these
resistors on linearity is four times lower than that of the MSB resistor
in an R-2R DAC. Hence, assuming the same resistor tolerances for
both, the linearity of the segmented approach would actually be
higher than that of an R-2R design.
The step generator or 9-bit DAC is composed of a master and a
slave ladder. The slave ladder generates the four least significant
bits from the remainder of the master ladder by active current
779
August 31, 1994
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
DIFFERENTIAL LINEARITY COMPARISON
+1/2LSB
LIMIT
SEGMENT
CHANGE
IDEAL OUTPUTS
ACUTAL OUTPUTS
IDEAL OUTPUTS
ACUTAL OUTPUTS
2LSB CHANGE ON
X011–X100
TRANSITION
SEGMENT
CHANGE
SEGMENT
OF 12-BIT
–2 LSB
LIMIT
+2LSB
LIMIT
DAC TRANSFER
CURVE FOR:
INL = ±1/2LSB
DNL = ±1LSB
SEGMENT OF 12-BIT DAC
TRANSFER CURVE FOR:
INL = ±2LSB
NO CHANGE ON
XX01–XX10 TRANSITION
–1/2LSB LIMIT
DNL = ±ℑ√2LSB
0000 0010 0100 0110 1000 1010 1100 1110
0001 0011 0101 0111 1001 1011 1101 1111
0010 0010 0100 0110 1000 1010 1100 1110
0001 0011 0101 0111 1001 1011 1101 1111
DIGITAL INPUT
DIGITAL INPUT
±1/2LSB INL, ±1LSB DNL
±2LSB INL, ±1LSB DNL
Figure 1. Differential Linearity Comparison
compliance, reference amplifier negative common-mode range,
negative logic input range, and negative logic threshold range;
consult the various figures for guidance. For example, operation at
ANALOG OUTPUT CURRENTS
Both true and complemented output sink currents are provided
where I +I =I . Current appears at the “true” output when a “1” is
O
O
FR
-9V with I
=1mA is not recommended because negative output
REF
applied to each logic input. As the binary count increases, the sink
current at Pin 18 increases proportionally, in the fashion of a
“positive logic” D/A converter. When a “0” is applied to any input bit,
that current is turned off at Pin 18 and turned on at Pin 19. A
compliance would be reduced to near zero. Operation from lower
supplies is possible, however at least 8V total must be applied to
insure turn-on of the internal bias network.
decreasing logic count increases I as in a negative or inverted logic
D/A converter. Both outputs may be used simultaneously. If one of
the outputs is not required, it must still be connected to ground or to
O
Symmetrical supplies are not required, as the AM6012 is quite
insensitive to variations in supply voltage. Battery operation is
feasible as no ground connection is required; however, an artificial
ground may be used to insure logic swings, etc., remain between
acceptable limits.
a point capable of sourcing I ; do not leave an unused output pin
FR
open.
Both outputs have an extremely wide voltage compliance enabling
fast direct current-to-voltage conversion through a resistor tied to
ground or other voltage source. Positive compliance is 25V above V-
and is independent of the positive supply. Negative compliance is
+10V above V-.
TEMPERATURE PERFORMANCE
The nonlinearity and monotonicity specifications of the AM6012 are
guaranteed to apply over the entire rated operating temperature
range. Full-scale output current drift is tight, typically ±10ppm/°C,
with zero-scale output current and drift essentially negligible
compared to 1/2LSB.
The dual outputs enable double the usual peak-to-peak load swing
when driving loads in quasi-differential fashion. This feature is
especially useful in cable driving, CRT deflection and in other
balanced applications such as driving center-tapped coils and
transformers.
The temperature coefficient of the reference resistor R should
match and track that of the output resistor for minimum overall
full-scale drift.
14
POWER SUPPLIES
The AM6012 operates over a wide range of power supply voltages
from a total supply of 20V to 36V. When operating with V- supplies
SETTLING TIME
The AM6012 is capable of extremely fast settling times, typically
250ns at I
=1.0mA. Judicious circuit design and careful board
of -10V or less, I
≤1mA is recommended. Low reference current
REF
REF
layout must be employed to obtain full performance potential during
operation decreases power consumption and increases negative
780
August 31, 1994
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
testing and application. The logic switch design enables propagation
delays of only 25ns for each of the 12 bits. Settling time to within
LSB of the LSB is therefore 25ns, with each progressively larger bit
taking successively longer. The MSB settles in 250ns, thus
determining the overall settling time of 250ns. Settling to 10-bit
accuracy requires about 90 to 130ns. The output capacitance of the
AM6012 including the package is approximately 20pF; therefore, the
When a DC reference is used, a reference bypass capacitor is
recommended. A 5.0V TTL logic supply is not recommended as a
reference. If a regulated power supply is used as a reference, R
should be split into two resistors with the junction bypassed to
ground with a 0.1µF capacitor.
14
For most applications, the tight relationship between I
and I
FS
REF
will eliminate the need for trimming I
. If required, full-scale
REF
output RC time constant dominates settling time if R >500Ω.
L
trimming may be accomplished by adjusting the value of R , or by
14
Settling time and propagation delay are relatively insensitive to logic
input amplitude and rise and fall times, due to the high gain of the
logic switches. Settling time also remains essentially constant for
using a potentiometer for R .
14
MULTIPLYING OPERATION
The AM6012 provides excellent multiplying performance with an
extremely linear relationship between I and I
I
values down to 0.5mA, with gradual increases for lower I
REF
REF
values lies in the ability to attain a given output level with lower load
resistors, thus reducing the output RC time constant.
over a range of
FS
REF
1mA to 1µA. Monotonic operation is maintained over a typical range
of I from 100µA to 1.0mA.
Measurement of settling time requires the ability to accurately
REF
resolve ±2µA, therefore a 2.5kΩ load is needed to provide adequate
drive for most oscilloscopes. At I
values of less than 0.5mA,
REF
excessive RC damping of the output is difficult to prevent while
maintaining adequate sensitivity. However, the major carry from
011111111111 to 100000000000 provides an accurate indicator of
settling time. This code change does not require the normal 6.2 time
constants to settle to within ±0.1% of the final value, and thus
REFERENCE AMPLIFIER COMPENSATION FOR
MULTIPLYING APPLICATIONS
reference applications will require the reference amplifier to be
compensated using a capacitor from pin 16 to V-. The value of this
capacitor depends on the impedance presented to Pin 14. For R14
settling times may be observed at lower values of I
.
REF
values of 1.0, 2.5 and 5.0kΩ, minimum values of C are 5, 12 and
C
25pF. Larger values of R14 require proportionately increased values
of CC for proper phase margin (see Figure 2b).
AM6012 switching transients or “glitches” are very low and may be
further reduced by small capacitive loads at the output at a minor
sacrifice in settling time.
For fastest response to a pulse, low values of R enabling small C
14
C
values should be used. If Pin 14 is driven by a high impedance such
as a transistor current source, none of the above values will suffice
and the amplifier must be heavily compensated which will decrease
Fastest operation can be obtained by using short leads, minimizing
output capacitance and load resistor values, and by adequate
bypassing at the supply, reference, and V terminals. Supplies do
LC
overall bandwidth and slew rate. For R =1kΩ and C =5pF, the
14
C
not require large electrolytic bypass capacitors as the supply current
drain is independent of input logic states; 0.1µF capacitors at the
supply pins provide full transient protection.
reference amplifier slews at 4mA/ms enabling a transition from
=0 to I =1mA in 250ns.
I
REF
REF
Operation with pulse inputs to the reference amplifier may be
accommodated by an alternate compensation scheme. This
technique provides lowest full-scale transition times. An internal
clamp allows quick recovery of the reference amplifier from a cutoff
APPLICATIONS INFORMATION
Reference Amplifier Setup
(I
REF
=0) condition. Full-scale transition (0 to 1mA) occurs in 62.5ns
The AM6012 is a multiplying D/A converter in which the output
current is the product of a digital number and the input reference
current. The reference current may be fixed or may vary from nearly
zero to +1.0mA. The full range output current is a linear function of
the reference current and is given by:
when the equivalent impedance at Pin 14 is 800Ω and C =0. This
yields a reference slew rate of 8mA/µs which is relatively
C
independent of R and V values.
IN
IN
LOGIC INPUTS
4095
4096
IFR
+
x 4 x (IREF) + 3.999 IREF
The AM6012 design incorporates a unique logic input circuit which
enables direct interface to all popular logic families and provides
maximum noise immunity. This feature is made possible by the large
input swing capability, 40µA logic input current, and completely
adjustable logic threshold voltage. For V-=-15V, the logic inputs may
swing between -5 and +10V. This enables direct interface with +15V
CMOS logic, even when the AM6012 is powered from a +5V supply.
Minimum input logic swing and minimum logic threshold voltage are
given by:
where I
= I
REF
14
In positive reference applications, an external positive reference
voltage forces current through R into the V terminal (Pin 14)
of the reference amplifier. Alternatively, a negative reference may be
applied to V
through R into V
negative reference connection has the advantage of a very high
impedance presented at Pin 15. The voltage at Pin 14 is equal to
and tracks the voltage at Pin 15 due to the high gain of the internal
reference amplifier. R (nominally equal to R ) is used to cancel
14
REF(+)
at Pin 15. Reference current flows from ground
REF(-)
as in the positive reference case. This
14
REF(+)
V- plus (I
×3kΩ) plus 1.8V.
REF
The logic threshold may be adjusted over a wide range by placing
an appropriate voltage at the logic threshold control pin (Pin 13,
15
14
bias current errors (Figure 2a).
V
). For TTL interface, simply ground Pin 13. When interfacing
LC
Bipolar references may be accommodated by offsetting V
or Pin
REF
ECL, an I
≤1mA is recommended. For general setup of the logic
REF
15. The negative common-mode range of the reference amplifier is
given by: V =V- plus (I ×3kΩ) plus 1.8V. The positive
control circuit, it should be noted that Pin 13 will sink 1.1mA typical.
External circuitry should be designed to accommodate this current
(Figure 3).
CM-
REF
common-mode range is V+ less 1.23V.
781
August 31, 1994
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
V
R+
AM6012
R
14
R
IN
I
14
REF
V
R
IN
REFERENCE
AMPLIFIER
18
19
I
I
O
I
15
15
I
+ I = I
FS
O
O
= R = R
14
15
IN
FOR ALL INPUT CODES
O
R
15
V
IN
COMP
C
C
22µF TANTALUM
0.1
0.1
20
(NOTE 5)
V
R–
V–
V+
V–
REFERENCE CONFIGURATION
R
R
R
C
I
REF
14
15
IN
C
Positive reference
Negative reference
V
0V
N/C
N/C
0.01µF
0.01µF
V
/R
R+
R+ 14
0V
V
R–
–V /R
R– 14
1
2
Lo impedance bipolar reference
Hi impedance bipolar reference
V
R+
V
R+
V
R+
0V
V
(V /R ) + (V /R
IN IN
)
)
IN
R+ 14
1
3
V
IN
N/C
(V – R ) / R
R+ IN 14
4
Pulsed reference
0V
V
No Cap
(V /R ) + (V /R
R+ 14 IN IN
IN
NOTES:
1. The compensation capacitor is a function of the impedance seen at the +V
input and must be at least 5pF x R
in kΩ. For R < 800Ω no capacitor is necessary.
14
REF
14(eq)
2. For negative values of V , V
/ R must be greater than –V max / R so that the amplifier is not turned off.
IN R+ 14
IN IN
3. For positive values of V , V
must be greater than –V max so the amplifier is not turned off.
IN R+
IN
4. For pulsed operation, V
provides a DC offset and may be set to zero in some cases. The impedance at Pin 14 should be 800Ω or less.
R+
5. For optimum settling time, decouple V– with 20Ω and bypass with 22µF tantalum capacitor.
6. Reference current and reference resistor — there is a 1-to-4 scale factor between the reference current (I
) and the full-scale output current (IFS).
REF
If V
= +10V and I
FS
= 4mA, the value of the R is:
14
REF
4
x 10V
4mA
R
+
+ 10kW
R
+
R
15
14
14
a. Reference Amplifier Biasing
Reference Amplifier
Frequency Response
Minimum Size
Compensation Capacitor
6
R
C
= 2kΩ
14 (EQ)
(I
= 4mA, I
REF
= 1.0mA)
4
2
FS
= 10pF
C
R
(kΩ)
C
C
(pF)
14(EQ)
10
5
50
0
25
10
5
LARGE SIGNAL = 50%
MODULATION OF 4mA
FULL SCALE CURRENT
2
–2
–4
–6
–8
1
.5
0
NOTE:
SMALL SIGNAL = 1%
MODULATION OF 2mA
FULL SCALE CURRENT
A 0.01µF capacitor is recommended for fixed
reference operation.
.01
0.1
1.0
10
FREQUENCY MHz
b.
Figure 2.
782
August 31, 1994
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
ECL
CMOS, HTL
V+
13kΩ
20kΩ
“A”
2N3904
“A”
2N3904
2N3904
2N3904
3kΩ
TO PIN 13
3kΩ
TO PIN 13
39kΩ
V
20kΩ
LC
V
LC
6.2kΩ
400µA
R
–5.2V
NOTE:
1. Set the voltage ‘A’ to the desired logic input switching threshold.
2. Allowable range of logic threshold is typically –5V to +13.5V when operating the DAC on ±15V supplies.
Figure 3. Interfacing Circuits for ECL, CMOS, HTL Logic Inputs
ACCOMMODATING BIPOLAR REFERENCE
BASIC NEGATIVE REFERENCE OPERATION
R
REF
R15
18
I
V
(+)
O
O
REF
14
15
AM6012
I
I
REF
R
REF
V
(–)
REF
I
IN
19
18
19
I
I
O
14
15
V
IN
NOTE:
AM6012
R
IN
V
O
REF(
R
)
I
x 4
FS
REF
R
sets I ; R15 is for a bias current cancellation.
FS
REF
I
> PEAK NEGATIVE SWING OF I
IN
REF
NOTE:
> Peak negative swing of I
I
.
IN
RECOMMENDED FULL-SCALE ADJUSTMENT
CIRCUIT
REF
V
(+)
R
REF
REF
18
19
I
I
O
14
R
= R
REF
15
V
(+)
R
REF
REF
18
R15
I
O
O
14
15
AM6012
(OPTIONAL)
R
= R
REF
15
O
15
V
R15
IN
AM6012
(OPTIONAL)
I
V
HIGH INPUT
IMPEDANCE
IN
19
HIGH INPUT
IMPEDANCE
V
MUST BE ABOVE PEAK POSITIVE SWING OF V
IN
REF
V
MUST BE ABOVE PEAK POSITIVE SWING OF V
IN
REF+
NOTE:
V
Must be above peak positive swing of V
.
IN
REF(+)
783
August 31, 1994
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
APPLICATION CIRCUITS
2.000mA
5,000kΩ
R
OFF
R
R
1
3
f
–
c
d
e
R
10kΩ
14
+10V
REF
NE535
V
OUT
a
b
V
V
REF(+)
REF(–)
I
O
+
AM6012
I
O
R
10kΩ
15
g
B
R
12
B
1
2
OPTIONAL
(SEE CODE TABLE)
V
REF
1.0mA
V
R
R
+
14
LSB
MSB
REF
2.0mA
+
OFF
MSB
LSB
I
I
O
O
V
OUT
CODE FORMAT
Straight binary; one
CONNECTIONS
OUTPUT SCALE
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12
(mA) (mA)
a – c
b – g
Positive full-scale
Positive full-scale – LSB
Zero-scale
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
0
3.999 0.000 9.9976
3.998 0.001 9.9951
0.000 3.999 0.0000
polarity with true input
code, true zero output.
R1 = R2 = 2.5k
Unipolar
Complementary binary;
one polarity with
a – g
b – c
Positive full-scale
Positive full-scale – LSB
Zero-scale
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
0.000 3.999 9.9976
0.001 3.998 9.9951
3.999 0.000 0.0000
complementary input
code, true zero output.
R1 = R2 = 2.5k
Straight offset binary;
offset half-scale,
a – c
b – d
Positive full-scale
Positive full-scale – LSB
(+) Zero-scale
1
1
1
0
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
0
0
1
1
0
3.999 0.000 9.9976
3.998 0.001 9.9927
2.000 1.999 0.0024
1.999 2.000 –0.0024
0.001 3.998 –9.9927
0.000 3.999 –9.9976
symmetrical about zero,
no true zero output.
f – g
R1 = R3 = 2.5k
R2 = 1.25k
(–) Zero-scale
Negative full-scale – LSB
Negative full-scale
Symmetrical
Offset
1’s complement; offset
half-scale, symmetrical
about zero, no true zero
a – c
b – d
Positive full-scale
Positive full-scale – LSB
(+) Zero-scale
0
0
0
1
1
1
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
1
0
0
1
0
0
1
1
0
3.999 0.000 9.9976
3.998 0.001 9.9927
2.000 1.999 0.0024
1.999 2.000 –0.0024
0.001 3.998 –9.9927
0.000 3.999 –9.9976
f – g
output, MSB complemented
(need inverter at B1).
R1 = R3 = 2.5k
R2 = 1.25k
(–) Zero-scale
Negative full-scale – LSB
Negative full-scale
Offset binary; offset half-
scale, true zero output.
e – a – c
b – g
Positive full-scale
Positive full-scale – LSB
+ LSB
1
1
1
1
0
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
0
1
0
1
1
0
3.999 0.000 9.9951
3.998 0.001 9.9902
2.001 1.998 0.0049
R1 = R2 = 5k
Zero-scale
2.000 1.999
0.000
– LSB
1.999 2.000 –0.0049
0.001 3.998 –9.9951
0.000 3.999 –10.000
Negative full-scale + LSB
Negative full-scale
Offset with
True Zero
2’s complement; offset
half-scale, true zero
e – a – c
b – g
Positive full-scale
Positive full-scale – LSB
+ 1 LSB
0
0
0
0
1
1
1
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
0
1
0
1
1
0
3.998 0.001 9.9902
2.001 1.998 0.0049
output, MSB complemented
(need inverter at B1).
R1 = R2 = 5k
Zero-scale
2.000 1.999
0.000
– 1 LSB
1.999 2.000 –0.049
0.001 3.998 –9.9951
0.000 3.999 –10.000
Negative full-scale + LSB
Negative full-scale
Figure 4. AM6012 Logic Inputs
ADDITIONAL CODE MODIFICATIONS
1. Any of the offset binary codes may be complemented by
reversing the output terminal pair.
784
August 31, 1994
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
APPLICATION CIRCUITS
+120V
DC
60V COMMON
MODE LEVEL
CRT
“X” INPUT
“Y” INPUT
I
I
O
O
AM6012
AM6012
–15V
–15V
I
O
I
O
NOTES:
1. Full differential drive lowers power supply voltage.
2. Eliminates inverting amplifiers and transformers.
3. Independent beam centering controls.
Figure 5. CRT Display Driver
CONVERSION TIME vs ACCURACY
1.25
1.00
0.75
0.50
0.25
0.00
SERIAL
DATA OUT
(WORST CASE)
AM6012
WITH
NE529
S
CC DO
E
CP
2504 SAR
(NAT’L, AMD)
D
CLOCK
AM6012
WITH
NE529
(TYP)
O0
Q11
LSB
+15V
ANALOG IN
(0–10V)
V
REF
100 200 300 400 500 600 700 800
CONVERSION TIME PER TRIAL, ns
10.000kΩ
2.5kΩ
5.000k
5.000k
+10V
REF
MSB
LSB
I
MSB
O
AM6012
COMP
NE529
I
O
CONVERSION
TIME (ns)
WORST
CASE
TYP
0.001 0.001
µF µF
0.1µF
SAR
33
55
10.000kΩ
0.01
µF 1µF 1µF
NE529
100
150
TOTAL
X 13
383ns
705ns
5.0µs
9.1µs
V(–0
V(+)
Figure 6. 12-Bit High-Speed A/D Converter
785
August 31, 1994
Philips Semiconductors Linear Products
Product specification
12-Bit multiplying D/A converter
AM6012
APPLICATION CIRCUITS
OE
MSB
7
6
5
4
µP
LS373
BUS
3
2
1
0
6012
E
2
E
1
LSB
E
B
D
Q
D
Q
3A
3A
3B
3B
D
Q
D
D
Q
2A
2A
1A
0A
2B
1B
0B
2B
1B
0B
1/2LS100
1/2LS100
D
Q
Q
1A
D
Q
D
Q
0A
E
A
a. Interface With 8-Bit Microprocessor Bus
E
E
1
2
DB0–3
DB4–11
a. Timing Sequence
NOTE:
Data remains on inputs of DAC until updated by E2 pulse. Timing will depend on processor used.
Figure 7.
786
August 31, 1994
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