ATC100B1R3BW500XT [NXP]
RF Power LDMOS Transistor;
| 型号： | ATC100B1R3BW500XT |
| 厂家： | 
NXP |
| 描述： | RF Power LDMOS Transistor |
| 文件： | 总16页 (文件大小：389K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Document Number: A3T19H455W23S
Rev. 0, 12/2017
NXP Semiconductors
Technical Data
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 81 W asymmetrical Doherty RF power LDMOS transistor is designed
for cellular base station applications requiring very wide instantaneous
bandwidth capability covering the frequency range of 1930 to 1990 MHz.
A3T19H455W23SR6
1930–1990 MHz, 81 W AVG., 30 V
AIRFAST RF POWER LDMOS
TRANSISTOR
1900 MHz
Typical Doherty Single--Carrier W--CDMA Performance: VDD = 30 Vdc,
IDQA = 540 mA, VGSB = 0.6 Vdc, Pout = 81 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
G
Output PAR
(dB)
ACPR
(dBc)
ps
D
Frequency
1930 MHz
1960 MHz
1990 MHz
(dB)
16.2
16.5
16.4
(%)
49.6
49.4
49.1
8.1
8.0
7.8
–31.0
–32.1
–32.6
Features
ACP--1230S--4L2S
Advanced high performance in--package Doherty
Designed for wide instantaneous bandwidth applications
Greater negative gate--source voltage range for improved Class C operation
Able to withstand extremely high output VSWR and broadband operating
conditions
(2)
6
5
VBW
A
Carrier
RF /V
1
2
RF /V
outA DSA
inA GSA
Designed for digital predistortion error correction systems
(1)
RF /V
inB GSB
RF /V
outB DSB
4
3
Peaking
(2)
VBW
B
(Top View)
Figure 1. Pin Connections
1. Pin connections 4 and 5 are DC coupled
and RF independent.
2. Device can operate with
V
current
DD
supplied through pin 3 and pin 6.
2017 NXP B.V.
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Vdc
Vdc
Vdc
C
Drain--Source Voltage
V
--0.5, +65
--6.0, +10
32, +0
DSS
Gate--Source Voltage
V
GS
DD
Operating Voltage
V
Storage Temperature Range
Case Operating Temperature Range
T
stg
--65 to +150
--40 to +150
--40 to +225
T
C
C
(1,2)
Operating Junction Temperature Range
T
J
C
CW Operation @ T = 25C when DC current is fed through pin 3 and pin 6
Derate above 25C
CW
172
0.7
W
W/C
C
Table 2. Thermal Characteristics
Characteristic
(2,3)
Symbol
Value
Unit
Thermal Resistance, Junction to Case
R
0.14
C/W
JC
Case Temperature 81C, 81 W Avg., W--CDMA, 30 Vdc, I
= 600 mA,
DQA
V
= 0.6 Vdc, 1960 MHz
GSB
Table 3. ESD Protection Characteristics
Test Methodology
Class
2
Human Body Model (per JESD22--A114)
Charge Device Model (per JESD22--C101)
C3
Table 4. Electrical Characteristics (T = 25C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(4)
Off Characteristics
Zero Gate Voltage Drain Leakage Current
I
I
—
—
—
—
—
—
10
5
Adc
Adc
Adc
DSS
DSS
GSS
(V = 65 Vdc, V = 0 Vdc)
DS
GS
Zero Gate Voltage Drain Leakage Current
(V = 32 Vdc, V = 0 Vdc)
DS
GS
Gate--Source Leakage Current
(V = 5 Vdc, V = 0 Vdc)
I
1
GS
DS
On Characteristics -- Side A, Carrier
Gate Threshold Voltage
V
1.4
2.2
1.8
2.6
2.2
3.0
0.3
Vdc
Vdc
Vdc
GS(th)
(V = 10 Vdc, I = 160 Adc)
DS
D
Gate Quiescent Voltage
(V = 30 Vdc, I = 540 mAdc, Measured in Functional Test)
V
GSA(Q)
DD
DA
Drain--Source On--Voltage
(V = 10 Vdc, I = 1.6 Adc)
V
0.05
0.15
DS(on)
GS
D
On Characteristics -- Side B, Peaking
Gate Threshold Voltage
V
0.8
1.2
1.6
0.3
Vdc
Vdc
GS(th)
(V = 10 Vdc, I = 360 Adc)
DS
D
Drain--Source On--Voltage
(V = 10 Vdc, I = 3.6 Adc)
V
0.05
0.15
DS(on)
GS
D
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.nxp.com/RF/calculators.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.
4. Side A and Side B are tied together for this measurement.
(continued)
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
2
Table 4. Electrical Characteristics (T = 25C unless otherwise noted) (continued)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(1,2,3)
Functional Tests
(In NXP Doherty Test Fixture, 50 ohm system) V = 30 Vdc, I
= 540 mA, V
= 0.6 Vdc, P = 81 W Avg.,
DD
DQA
GSB
out
f = 1990 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured
in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
G
15.2
46.0
56.0
—
16.4
49.1
17.7
—
dB
%
ps
D
Drain Efficiency
P
@ 3 dB Compression Point, CW
P3dB
ACPR
56.9
—
dBm
dBc
out
Adjacent Channel Power Ratio
–32.6
–28.0
(3)
Load Mismatch
(In NXP Doherty Test Fixture, 50 ohm system) I
= 540 mA, V
= 0.6 Vdc, f = 1960 MHz, 12 sec(on),
GSB
DQA
10% Duty Cycle
VSWR 10:1 at 32 Vdc, 490 W Pulsed CW Output Power
(3 dB Input Overdrive from 340 W Pulsed CW Rated Power)
No Device Degradation
(3)
Typical Performance
(In NXP Doherty Test Fixture, 50 ohm system) V = 30 Vdc, I
= 540 mA, V
= 0.6 Vdc,
GSB
DD
DQA
1930–1990 MHz Bandwidth
(4)
P
@ 3 dB Compression Point
P3dB
—
—
541
—
—
W
out
AM/PM
–29
(Maximum value measured at the P3dB compression point across
the 1930–1990 MHz bandwidth)
VBW Resonance Point
VBW
—
200
—
MHz
res
(IMD Third Order Intermodulation Inflection Point)
Gain Flatness in 60 MHz Bandwidth @ P = 81 W Avg.
G
—
—
0.3
—
—
dB
out
F
Gain Variation over Temperature
G
0.009
dB/C
(–30C to +85C)
Output Power Variation over Temperature
P1dB
—
0.004
—
dB/C
(–30C to +85C)
Table 5. Ordering Information
Device
Tape and Reel Information
R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel
Package
A3T19H455W23SR6
ACP--1230S--4L2S
1. V
and V
must be tied together and powered by a single DC power supply.
DDB
DDA
2. Part internally matched both on input and output.
3. Measurements made with device in an asymmetrical Doherty configuration.
4. P3dB = P
+ 7.0 dB where P
is the average output power measured using an unclipped W--CDMA single--carrier input signal where
avg
avg
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
3
V
V
DDA
GGA
D98988
C3
C4
C1
C7
A3T19H455W23S
Rev. 0
C11
C15
C23
C9
R1
C21
C13
C
P
R3
C19
C18
Z1
C20
C24
C22
R4 C17
C10
R2
C16
C14
C8
C12
C5
C2
C6
V
V
DDB
GGB
Note: V
and V
must be tied together and powered by a single DC power supply.
DDB
DDA
Figure 2. A3T19H455W23SR6 Test Circuit Component Layout
Table 6. A3T19H455W23SR6 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C2
470 F, 63 V Electrolytic Capacitor
MCGPR63V477M13X26-RH
C5750X7S2A106M230KB
C1206C224Z5VACTU
ATC100B100JT500XT
C3225X7S1H106K
ATC600F100JT250XT
ATC600F8R2BT250XT
ATC100B5R1CT500XT
ATC100B1R3BW500XT
ATC100B0R3BT500XT
ATC100B0R2BT500XT
WCR1206-3R3F
Multicomp
C3, C4, C5, C6
10 F Chip Capacitor
TDK
C7, C8
220 nF Chip Capacitor
Kemet
ATC
C9, C10, C11, C12, C20
10 pF Chip Capacitor
C13, C14
C15, C16, C17
C18
10 F Chip Capacitor
TDK
10 pF Chip Capacitor
ATC
8.2 pF Chip Capacitor
ATC
C19
5.1 pF Chip Capacitor
ATC
C21
1.3 pF Chip Capacitor
ATC
C22, C24
C23
0.3 pF Chip Capacitor
ATC
0.2 pF Chip Capacitor
ATC
R1, R2
R3
3.3 , 1/4 W Chip Resistor
50 , 8 W Termination Chip Resistor
0 , 1/4 W Chip Resistor
1800-2200 MHz Band, 90, 2 dB Directional Coupler
Welwyn
Anaren
Vishay
Anaren
MTL
C8A50Z4A
R4
CWCR08050000Z0EA
X3C20F1-02S
Z1
PCB
Rogers RO4350B, 0.020, = 3.66
D98988
r
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
4
TYPICAL CHARACTERISTICS — 1930–1990 MHz
17
16.8
16.6
16.4
16.2
16
54
V
= 30 Vdc, P = 81 W (Avg.), I
= 540 mA, V
= 0.6 Vdc
DD
out
DQA
GSB
52
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
50
D
48
G
ps
46
–1.7
–1.9
–2.1
–2.3
–2.5
–2.7
–25
–27
–29
–31
–33
–35
PARC
15.8
15.6
15.4
15.2
15
ACPR
Input Signal PAR = 9.9 dB @
0.01% Probability on CCDF
1880 1900 1920 1940 1960 1980 2000 2020 2040
f, FREQUENCY (MHz)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 81 Watts Avg.
–20
V
V
= 30 Vdc, P = 39 W (PEP), I
= 540 mA
DD
out
DQA
IM3--U
IM3--L
= 0.6 Vdc, Two--Tone Measurements
GSB
–30
–40
–50
–60
–70
(f1 + f2)/2 = Center Frequency of 1960 MHz
IM5--L
IM5--U
IM7--L
IM7--U
1
10
100
300
TWO--TONE SPACING (MHz)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
65
60
55
50
45
40
35
–27
1
0
17.5
17
V
= 30 Vdc, I
= 540 mA, V
= 0.6 Vdc, f = 1960 MHz
DD
DQA
GSB
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
–28
–29
–30
–31
–32
–33
G
ps
–1
–2
–3
–4
–5
16.5
16
–1 dB = 53.3 W
D
–2 dB = 86.2 W
–3 dB = 115.8 W
15.5
ACPR
15
PARC
150
14.5
30
60
90
120
180
P
, OUTPUT POWER (WATTS)
out
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
5
TYPICAL CHARACTERISTICS — 1930–1990 MHz
10
20
18
16
14
12
10
8
65
55
45
35
25
15
V
= 30 Vdc, I
= 540 mA, V
= 0.6 Vdc
DD
DQA
GSB
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
0
G
ps
–10
–20
–30
–40
–50
1990 MHz
1990 MHz
1960 MHz
1930 MHz
1960 MHz
1930 MHz
D
ACPR
1990 MHz
1960 MHz
1930 MHz
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
10 100
, OUTPUT POWER (WATTS) AVG.
5
500
1
P
out
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
18
16
14
12
10
8
V
P
= 30 Vdc
= 0 dBm
Gain
DD
in
I
= 540 mA
= 0.6 Vdc
DQA
V
GSB
6
1550 1650 1750 1850 1950 2050 2150 2250 2350
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
6
Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning
V
= 30 Vdc, I
= 779 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQA
Max Output Power
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
58.8
57.7
57.2
Gain (dB)
18.6
(dBm)
52.9
(W)
194
191
(MHz)
1930
1960
1990
3.52 – j7.64
4.30 – j7.50
5.95 – j8.89
3.44 + j7.03
1.09 – j4.64
1.03 – j4.61
1.04 – j4.86
–14
–14
–15
4.65 + j7.55
6.72 + j7.83
18.6
52.8
18.4
52.8
190
Max Output Power
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
59.3
57.2
58.1
Gain (dB)
(dBm)
(W)
(MHz)
1930
1960
1990
3.52 – j7.64
3.33 + j7.60
1.06 – j4.73
1.03 – j5.00
1.04 – j4.94
16.4
53.6
229
–20
–19
–21
4.30 – j7.50
5.95 – j8.89
4.78 + j8.27
7.14 + j9.00
16.2
16.3
53.6
53.6
228
227
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Table 8. Carrier Side Load Pull Performance — Maximum Efficiency Tuning
V
= 30 Vdc, I
= 779 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQA
Max Drain Efficiency
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
73.0
72.5
72.5
Gain (dB)
(dBm)
(W)
(MHz)
1930
1960
1990
3.52 – j7.64
4.30 – j7.50
5.95 – j8.89
3.49 + j7.36
2.43 – j3.71
2.32 – j3.40
2.19 – j3.23
21.5
50.9
124
–21
–21
–23
4.78 + j8.04
6.95 + j8.48
21.8
21.9
50.5
50.1
112
103
Max Drain Efficiency
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
72.0
71.6
71.4
Gain (dB)
(dBm)
(W)
(MHz)
1930
1960
1990
3.52 – j7.64
3.46 + j7.73
2.66 – j4.05
2.50 – j3.81
2.07 – j3.99
19.3
51.6
145
–26
–27
–27
4.30 – j7.50
5.95 – j8.89
4.88 + j8.52
7.08 + j9.14
19.5
19.1
51.4
51.9
137
154
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
7
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
V
= 30 Vdc, V
= 0.6 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
GSB
Max Output Power
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
52.9
54.1
54.2
Gain (dB)
13.5
(dBm)
56.0
(W)
400
399
(MHz)
1930
1960
1990
2.29 – j6.45
1.80 + j5.63
2.37 – j5.99
2.60 – j5.99
2.78 – j5.86
–29
–28
–29
3.54 – j6.53
4.98 – j6.44
2.40 + j6.06
3.24 + j6.51
13.8
56.0
13.9
55.9
392
Max Output Power
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
53.9
54.9
54.6
Gain (dB)
(dBm)
(W)
(MHz)
1930
1960
1990
2.29 – j6.45
1.90 + j5.91
2.55 – j6.21
2.81 – j6.09
3.13 – j6.18
11.4
56.6
462
–35
–35
–34
3.54 – j6.53
4.98 – j6.44
2.60 + j6.41
3.69 + j6.91
11.7
11.7
56.6
56.5
459
450
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Table 10. Peaking Side Load Pull Performance — Maximum Efficiency Tuning
V
= 30 Vdc, V
= 0.6 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
GSB
Max Drain Efficiency
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
59.4
60.3
60.4
Gain (dB)
(dBm)
(W)
(MHz)
1930
1960
1990
2.29 – j6.45
1.66 + j5.59
3.67 – j4.21
3.59 – j3.69
3.32 – j3.45
14.5
55.2
328
–33
–33
–33
3.54 – j6.53
4.98 – j6.44
2.16 + j5.99
2.92 + j6.48
14.7
14.7
54.8
54.7
301
298
Max Drain Efficiency
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
59.5
60.1
60.1
Gain (dB)
(dBm)
(W)
(MHz)
1930
1960
1990
2.29 – j6.45
1.82 + j5.90
3.95 – j4.87
4.03 – j4.56
3.84 – j4.23
12.2
56.1
403
–39
–38
–38
3.54 – j6.53
4.98 – j6.44
2.49 + j6.40
3.49 + j6.92
12.4
12.5
55.9
55.8
393
384
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
8
P1dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1960 MHz
–1
–2
–3
–4
–5
–6
–7
–1
–2
–3
68
66
64
58
70
62
60
E
E
–4
–5
–6
–7
52
52.5
P
51.5
51
P
50.5
50
49.5
49
56
48.5
0
1
2
3
REAL ()
4
5
6
0
1
2
3
4
5
6
REAL ()
Figure 8. P1dB Load Pull Output Power Contours (dBm)
Figure 9. P1dB Load Pull Efficiency Contours (%)
–1
–1
–2
–3
–4
–5
–6
–7
–26
–24
22.5
–2
–3
–22
–20
22
–18
E
E
–4
21.5
–16
–14
P
P
–5
–6
–7
21
20.5
18.5
20
19
19.5
–12
0
1
2
3
4
5
6
0
1
2
3
4
5
6
REAL ()
REAL ()
Figure 10. P1dB Load Pull Gain Contours (dB)
Figure 11. P1dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
9
P3dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1960 MHz
–1
–2
–3
–4
–5
–6
–7
–1
–2
68
–3
66
64
62
60
58
E
E
–4
–5
–6
–7
70
52.5
53
P
52
51.5
51
P
50.5
50
56
49.5
54
0
1
2
3
4
5
6
0
1
2
3
4
5
6
REAL ()
REAL ()
Figure 12. P3dB Load Pull Output Power Contours (dBm)
Figure 13. P3dB Load Pull Efficiency Contours (%)
–1
–1
–32
–30
20.5
–2
–3
–2
–3
–4
–5
–6
–7
–28
20
–26
E
E
–4
–24
–22
19.5
–5
–6
–7
19
P
P
–20
–18
18.5
16.5
18
17
17.5
–16
0
1
2
3
4
5
6
0
1
2
3
4
5
6
REAL ()
REAL ()
Figure 14. P3dB Load Pull Gain Contours (dB)
Figure 15. P3dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
10
P1dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1960 MHz
–2
–3
–4
–5
–6
–7
–8
–2
53.5
53
54
52.5
–3
54.5
52
58
E
E
56
–4
–5
–6
–7
–8
55
54
52
55.5
P
P
50
48
44
46
0
1
2
3
4
5
6
0
1
2
3
4
5
6
REAL ()
REAL ()
Figure 16. P1dB Load Pull Output Power Contours (dBm)
Figure 17. P1dB Load Pull Efficiency Contours (%)
–2
–3
–2
–36
–38
–34
E
–3
–4
–5
–6
–7
–8
–32
–28
E
–4
14.5
–30
–5
14
–6
–7
–8
P
P
11
13.5
11.5
12
2
13
–26
12.5
–24
0
1
3
4
5
6
0
1
2
3
REAL ()
4
5
6
REAL ()
Figure 18. P1dB Load Pull Gain Contours (dB)
Figure 19. P1dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
11
P3dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1960 MHz
–2
–3
–4
–5
–6
–7
–8
–2
54
54.5
53.5
55
E
–3
–4
–5
–6
–7
–8
53
58
52.5
55.5
56
52
E
56
54
P
P
56.5
50
44
48
46
0
1
2
3
4
5
6
0
1
2
3
4
5
6
REAL ()
REAL ()
Figure 20. P3dB Load Pull Output Power Contours (dBm)
Figure 21. P3dB Load Pull Efficiency Contours (%)
–2
–3
–2
–40
E
–3
–4
–5
–6
–7
–8
–42
–38
12.5
–44
–4
–36
E
–5
12
–34
–6
P
P
9
11.5
–7
–8
–32
9.5
11
–30
10
10.5
–28
0
1
2
3
4
5
6
0
1
2
3
4
5
6
REAL ()
REAL ()
Figure 22. P3dB Load Pull Gain Contours (dB)
Figure 23. P3dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
12
PACKAGE DIMENSIONS
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
13
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
14
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
AN1908: Solder Reflow Attach Method for High Power RF Devices in Air Cavity Packages
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
Electromigration MTTF Calculator
RF High Power Model
.s2p File
Development Tools
Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.nxp.com/RF
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
Dec. 2017
Initial release of data sheet
A3T19H455W23SR6
RF Device Data
NXP Semiconductors
15
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implementers to use NXP products. There are no express or implied copyright licenses
granted hereunder to design or fabricate any integrated circuits based on the information
in this document. NXP reserves the right to make changes without further notice to any
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including without limitation consequential or incidental damages. “Typical” parameters
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parameters, including “typicals,” must be validated for each customer application by
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names are the property of their respective owners.
E 2017 NXP B.V.
Document Number: A3T19H455W23S
Rev. 0, 12/2017
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