BGY288 [NXP]
Power amplifier with integrated control loop for GSM850, EGSM900, DCS1800 and PCS1900; 功率放大器集成控制回路GSM850 , EGSM900 , DCS1800和PCS1900型号: | BGY288 |
厂家: | NXP |
描述: | Power amplifier with integrated control loop for GSM850, EGSM900, DCS1800 and PCS1900 |
文件: | 总22页 (文件大小:136K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BGY288
Power amplifier with integrated control loop for GSM850,
EGSM900, DCS1800 and PCS1900
Rev. 01 — 2 February 2005
Preliminary data sheet
1. Product profile
1.1 General description
The BGY288 is a power amplifier module in a SOT775 surface mounted package with a
plastic cap. In the module, a mix of state of the art technologies as InGaP, Si-Bicmos and
Si passive integration are used to combine high performance with a small size. The
module comprises two functional sections, one for low-band (GSM850/EGSM900) and
one for high-band (DCS1800/PCS1900) with internal power detection, power control loop,
input and output matching; see Figure 2. The power control circuit ensures a stable RF
power output which is set by the voltage level on pin PC. The power control circuit is
stabilized to compensate for variations in supply voltage, input power and temperature,
and has a control range fully compliant with European Telecommunication Standards
Institute (ETSI) time mask and power spectrum requirements.
1.2 Features
1.2.1 General features
■ Quad band GSM amplifier
■ 34 dBm controlled output power for
GSM850/EGSM900
■ Very small size (8 mm × 8 mm)
■ 32.5 dBm controlled output power for
DCS1800/PCS1900
■ Suited for GPRS class 12
(duty cycle δ = 4 : 8)
■ Easy on/off and band select by digital
control voltage
■ Integrated power control loop
■ 3.6 V nominal supply voltage
■ Internal input and output matching
■ Specification based on 3GPP TS 45.005
1.2.2 RF performance
RF performance with a typical pulsed, controlled output power at Tmb = 25 °C;
VBAT = 3.6 V; VSTAB = 2.8 V; ZS = ZL = 50 Ω; PD(LB) = 2 dBm / PD(HB) = 0 dBm; δ = 2 : 8.
■ f = 824 MHz to 849 MHz; η @ PSAT = 50 %; PL = 34 dBm
■ f = 880 MHz to 915 MHz; η @ PSAT = 55 %; PL = 34 dBm
■ f = 1710 MHz to 1785 MHz; η @ PSAT = 50 %; PL = 32.5 dBm
■ f = 1850 MHz to 1910 MHz; η @ PSAT = 50 %; PL = 32.5 dBm
1.3 Applications
■ Digital cellular radio systems with Time Division Multiple Access (TDMA) operation
(GSM systems) in four frequency bands: 824 MHz to 849 MHz, 880 MHz to 915 MHz,
1710 MHz to 1785 MHz and 1850 MHz to 1910 MHz.
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
2. Pinning information
2.1 Pinning
1
16
15
14
13
GND
GND
V
V
2
3
12
11
V
V
BAT
BAT
BAT
BAT
RFI_HB
TXON
4
5
10
9
RFI_LB
n.c.
6
7
8
001aac028
Transparent top view
Fig 1. Pin configuration
2.2 Pin description
Table 1:
Symbol
GND
Pin description
Pin
Type
Description
1, 13, 15
ground
supply
supply
ground
[1]
VBAT
2, 3
battery supply voltage for DCS1800/PCS1900 section
battery supply voltage for GSM850/EGSM900 section
DCS1800/PCS1900 transmit RF input
RF power control enable input
11, 12
RFI_HB
TXON
PC
4
5
6
7
8
analog input
logic input
analog input
supply
RF power control input
VSTAB
BAND
stabilized supply voltage
logic input
Low-Band (LB) (GSM850/EGSM900) or High-Band
(HB) (DCS1800/PCS1900) select input
n.c.
9
not connected
RFI_LB
RFO_LB
RFO_HB
10
14
16
analog input
GSM850/EGSM900 transmit RF input
analog output GSM850/EGSM900 transmit RF output
analog output DCS1800/PCS1900 transmit RF output
inner pads ground
ground
[1] Pins 2, 3, 11 and 12 (VBAT) are not internally connected and must all be connected to the battery supply
voltage.
9397 750 14011
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 February 2005
2 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
3. Ordering information
Table 2:
Ordering information
Type number
Package
Name
-
Description
Version
BGY288
leadless surface mounted package; plastic cap;
16 terminations
SOT775A
4. Block diagram
850 MHz and 900 MHz POWER AMPLIFIER
10
14
OUTPUT
MATCHING
RFI_LB
RFO_LB
POWER
BIASING
SENSE
POWER CONTROLLER
6
PC
7
5
V
STAB
TXON
BGY288
LOGIC
CONTROL
(1)
(1)
8
4
BAND
POWER
SENSE
BIASING
16
OUTPUT
MATCHING
RFI_HB
RFO_HB
1800 MHz and 1900 MHz POWER AMPLIFIER
001aab846
(1) Pull-down resistor.
Fig 2. Block diagram
9397 750 14011
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 February 2005
3 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
5. Functional description
5.1 Operating conditions
The BGY288 is designed to meet the 3GPP TS 45.005 technical specification for the
ETSI.
5.2 Power amplifier
The low band (GSM850 and EGSM900) and the high band (DCS1800 and PCS1900)
channel power amplifiers each comprises three cascaded gain stages, input and output
matching and harmonic filters. The output power of each amplifier is determined by the
bias on each of its 3 gain stages and is controlled by an internal signal generated in the
power controller block. Each power amplifier block generates a power sense signal which
is routed internally to the power control block.
5.3 Control logic
The control logic block generates the various signals to control the complete BGY288
depending on the signal levels on pins TXON and BAND, as indicated in Table 3. The
control logic block supply voltage is via pin VSTAB. When pin VSTAB = 0 V, the BGY288 is in
Idle mode and the battery current consumption is almost zero. The power control block is
enabled when pin TXON goes HIGH. The low band (GSM850/EGSM900) channel is
enabled when pin BAND goes LOW and the high band (DCS1800/PCS1900) channel is
enabled when pin BAND goes HIGH. Both TXON and BAND inputs have pull-down
resistors of approximately 1 MΩ.
5.4 Power controller
The main inputs to the power controller block are the RF power control signal via pin PC
and the output power sense signal internally generated by each power amplifier block.
The PC signal is the reference voltage for the requested level of output power, and is
usually generated by an external digital-to-analog converter. The PC signal is buffered
and compared with the output power sense signal. The resultant error signal is then
amplified by one of two integrators, the selection of which being dependant on the level of
the BAND signal. The output of the selected integrator is the internal signal which controls
the biasing circuits of the selected channel.
5.5 Mode control
Table 3:
Mode
Mode control
Mode description
VSTAB
(V)
TXON BAND
LOW LOW
PC (V)
Idle
power amplifier fully off; minimal leakage current
0
< 0.15
Standby control logic functioning; power amplifier off
2.6 to 3 LOW
HIGH or < 0.15
LOW
LB TX
HB TX
low-band transmit mode (GSM850/EGSM900)
2.6 to 3 HIGH LOW
< 2.5
< 2.5
high-band transmit mode (DCS1800/PCS1900) 2.6 to 3 HIGH HIGH
9397 750 14011
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 February 2005
4 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
6. Timing
dB
+4
+1
−1
−6
P
, P
L(LB) L(HB)
(**)
−30
(***)
(147 bits)
(*)
10 µs 8 µs 10 µs
10 µs 8 µs 10 µs
t
7056/13 (542.8) µs
V
STAB
t
t
t
d6
d1
TXON
BAND
t
t
d5
d4
t
d2
d7
P
, P
D(LB) D(HB)
t
t
d8
d3
PC
001aab847
t
d9
Fig 3. Timing diagram
Table 4:
ZS = ZL = 50 Ω; PD(LB) = 0 dBm to 4 dBm / PD(HB) = −2 dBm to +2 dBm; VBAT = 3.1 V to 4.6 V;
STAB = 2.6 V to 3.0 V; Tmb = −20 °C to 85 °C; δ = 1 : 8 to 4 : 8; unless otherwise specified.
Timing characteristics
V
Symbol Parameter Min Typ Max Unit
td1
td2
td3
delay time; VSTAB to high voltage before TXON goes HIGH
0
-
-
-
-
-
-
µs
µs
µs
delay time; BAND to LOW or HIGH before TXON goes HIGH 0
delay time; RF signal on RFI_HB or RFI_LB before PC
ramp-up
0
td4
td5
delay time; PC start of ramp-up after TXON goes HIGH
10
0
-
-
-
-
µs
µs
delay time; TXON to LOW after transition of PC to off
condition
td6
td7
td8
delay time; VSTAB to 0 V, after TXON goes LOW
delay time; change of BAND after TXON goes LOW
10
0
-
-
-
-
-
-
µs
µs
µs
delay time; removal of RF signal on RFI_HB or RFI_LB after
transition of PC to off condition
0
td9
time between PC ramp-up and actual PL increase
-
-
3
µs
9397 750 14011
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 February 2005
5 of 22
BGY288
Philips Semiconductors
6.1 Ramp-up
Power amplifier with integrated control loop
VSTAB voltage must be available at minimum td1 before TXON goes HIGH (power control
loop activates).
BAND selects the correct transmit channel (GSM850/EGSM900, or DCS1800/PCS1900).
BAND must be at the correct value before the rising edge of TXON.
The transition of TXON to HIGH enables the power control loop; the TXON minimum td4
period is a set-up time which allows the correct internal biasing conditions and the charge
on the integration capacitors to be at the correct starting value before PC starts to
increase. RF power must be present at the input of the selected channel (PD(LB) or PD(HB)
before PC starts to ramp-up.
)
The required RF output power level is reached by increasing PC in steps to the
corresponding voltage level. The sequence of PC steps can be chosen to have
approximately a quarter cosine wave ramp-up of PL(LB) or PL(HB) in order to prevent
violation of the GSM power mask, and at the same time prevent violation of the spectrum
due to transients.
To avoid violation of the lowest power level in the GSM power mask (indicated by *;
see Figure 3), the BGY288 provides sufficient isolation when TXON goes HIGH with PC
at minimum value and RF power at input of power amplifier.
In LB TX mode, the system specification for maximum output power of the handset is
−36 dBm. In HB TX mode, the system specification for maximum output power of the
handset is −48 dBm. In BGY288 transmit mode, the handset antenna switch can be used
to provide isolation between the power amplifier and the antenna by setting the antenna
switch to Rx mode. This condition is used for the transmit mode isolation parameters
given in Section 9.
6.2 Ramp-down
PC steps down from the voltage level for the current power level to off state. The
sequence of PC steps can be chosen to have approximately a quarter cosine wave
ramp-down of PL(LB) or PL(HB) in order to prevent violation of the GSM power mask, and at
the same time prevent violation of the spectrum due to transients.
The power control loop can be switched off (TXON goes LOW) as soon as PC has
reached the off state level. At the same time, BAND is allowed to change polarity and the
RF input power at the selected channel (PD(LB) or PD(HB)) can be removed. When input
power is removed, there is no additional isolation specification required to meet the GSM
system specification. In LB TX mode, the system specification for maximum output power
of the handset is −54 dBm. In HB TX mode the system specification for maximum output
power is −48 dBm.
At minimum td6 after TXON goes LOW (power control loop deactivates) and when all
charge in the power control loop capacitors is removed, the BGY288 can go into Idle
mode (VSTAB = 0 V).
9397 750 14011
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 February 2005
6 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
7. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
7
Unit
V
VBAT
DC supply voltage
Idle mode
-
HB TX or LB TX mode
-
5.3
+3.3
2
V
VSTAB
ISTAB
VPC
stabilized DC supply voltage
stabilized supply current
−0.5
V
-
mA
V
DC output power control voltage
current into output power control input
-
3
IPC
−2
+2
mA
dBm
dBm
dBm
V
PD(HB), PD(LB) input drive power on RFI_HB or RFI_LB
-
10
PL(LB)
PL(HB)
VBAND
IBAND
VTXON
ITXON
PBAT
load power on RFO_LB
load power on RFO_HB
band switch voltage
-
37
-
35
−0.5
+3.3
+2
band switch current
−2
mA
V
transmit control signal
−0.5
+3.3
+2
current into transmit control input
power from supply during pulse
−2
mA
W
HB TX mode
LB TX mode
HB TX mode
LB TX mode
-
4
-
7
W
IBAT
current from supply during pulse
-
1.6
2.2
+100
+100
+90
±500
±50
A
-
A
Tstg
Tmb
storage temperature
−40
−30
−30
-
°C
°C
°C
V
mounting base temperature
δ = 2 : 8
δ = 4 : 8
[1]
[2]
Vesd
electrostatic discharge voltage
human body model
machine model
-
V
[1] Class 1B according to EIA/JESD22-A114B
[2] Class A according to EIA/JESD22-A115A
8. Static characteristics
Table 6:
Static characteristics
ZS = ZL = 50 Ω; PD(HB), PD(LB) = 0 mW; VBAT = 3.6 V; VSTAB = 2.8 V; Tmb = 25 °C; unless otherwise specified.
Symbol Parameter
Voltage supply
Conditions
Min
Typ
Max
Unit
[1]
[2]
VBAT
battery supply voltage
2.9
3.1
4.6
-
-
3.1
4.6
5.2
1.5
10
V
typical operating range
3.6
V
-
V
IBAT
leakage current
supply voltage
Standby mode
-
mA
µA
V
Idle mode
-
-
VSTAB
Standby, HB TX or LB TX mode
Idle mode
2.6
0
2.8
-
3.0
0.2
V
9397 750 14011
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 February 2005
7 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
Table 6:
Static characteristics …continued
ZS = ZL = 50 Ω; PD(HB), PD(LB) = 0 mW; VBAT = 3.6 V; VSTAB = 2.8 V; Tmb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
1
Unit
mA
mA
ISTAB
current consumption
HB TX or LB TX mode
Standby mode
-
-
-
-
1
Digital inputs: TXON, BAND[3]
VIL
VIH
IIL
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
input capacitance
0
-
0.5
3
V
1.4
-
V
-
-
-
-
3
µA
µA
pF
IIH
-
15
-
Ci
4
Analog inputs: PC[3]
VPC
IPC
power control voltage
0
-
2.5
V
power control current
PC input capacitance
PC input resistance
−100
-
-
-
-
µA
pF
MΩ
CPC
RPC
-
-
4
1.2
[1] Power amplifier is functional from 2.9 V to 3.1 V, but will not meet all electrical specification points.
[2] Power amplifier is functional from 4.6 V to 5.2 V under 50 Ω conditions, but will not meet all electrical specification points.
[3] PD(LB) = 0 dBm to 4 dBm / PD(HB) = −2 dBm to +2 dBm; VBAT = 3.1 V to 4.6 V; VSTAB = 2.6 V to 3.0 V; Tmb = −20 °C to +85 °C;
δ = 1 : 8 to 4 : 8; unless otherwise specified.
9. Dynamic characteristics
Table 7:
Dynamic characteristics GSM850 and EGSM900 transmit mode
ZS = ZL = 50 Ω; VBAT = 3.6 V; VSTAB = 2.8 V; Tmb = 25 °C; δ = 1 : 8 to 4 : 8; tp = 575 µs to 2300 µs; PD(LB) = 2 dBm; spurious
signals on PD(LB) < −50 dBm; LB TX mode selected;
f = 824 MHz to 849 MHz for GSM850; f = 880 MHz to 915 MHz for EGSM900; unless otherwise specified.
Symbol
PD(LB)
VPC
Parameter
Conditions
Min
Typ
Max Unit
RF input power
0
-
2
-
4
2
dBm
V
reference voltage to set
output power
f = 897.5 MHz for EGSM900;
f = 836.5 MHz for GSM850;
PL(LB) = 35 dBm
f = 897.5 MHz for EGSM900;
f = 836.5 MHz for GSM850;
0.2
-
-
V
PL(LB) = 3 dBm
9397 750 14011
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 February 2005
8 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
Table 7:
Dynamic characteristics GSM850 and EGSM900 transmit mode …continued
ZS = ZL = 50 Ω; VBAT = 3.6 V; VSTAB = 2.8 V; Tmb = 25 °C; δ = 1 : 8 to 4 : 8; tp = 575 µs to 2300 µs; PD(LB) = 2 dBm; spurious
signals on PD(LB) < −50 dBm; LB TX mode selected;
f = 824 MHz to 849 MHz for GSM850; f = 880 MHz to 915 MHz for EGSM900; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
PL(LB)
available output power
GSM850
VPC = 2.2 V
34.2 35
-
-
dBm
dBm
VPC = 2.0 V; VBAT = 3.2 V;
32.8
-
P
D(LB) = 0 dBm; δ = 2 : 8
VPC = 2.0 V; VBAT = 3.2 V;
D(LB) = 0 dBm; δ = 2 : 8; Tmb = 85 °C
32.3
-
-
dBm
P
EGSM900
VPC = 2.2 V
35.2 36
-
-
dBm
dBm
VPC = 2.0 V; VBAT = 3.2 V;
33.8
-
P
D(LB) = 0 dBm; δ = 2 : 8
VPC = 2.0 V; VBAT = 3.2 V;
D(LB) = 0 dBm; δ = 2 : 8; Tmb = 85 °C
33.3
-
-
dBm
P
η
efficiency GSM850
saturated power
-
50
45
55
50
-
-
-
-
-
%
%
%
%
PL(LB) = 34 dBm
-
efficiency EGSM900
output power variation at
saturated power
-
PL(LB) = 34 dBm
-
[1] [2]
∆PL(LB)
PL(LB) = 31 dBm to 34 dBm for EGSM900
−0.7
+0.7 dB
nominal temperature range and PL(LB) = 31 dBm to 33 dBm for
GSM850; set by PC
[1] [2]
[1] [2]
[1] [3]
P
L(LB) = 13 dBm to 31 dBm; set by PC
−1.5
−2
-
-
-
+1.5 dB
PL(LB) = 6 dBm to 13 dBm; set by PC
+2
dB
output power variation at
PL(LB) = 31 dBm to 34 dBm for EGSM900
−1.2
+1.2 dB
extreme temperature range and PL(LB) = 31 dBm to 33 dBm for
GSM850; set by PC
[1] [3]
[1] [3]
[1] [4]
P
L(LB) = 13 dBm to 31 dBm; set by PC
−2
-
-
-
+2
+3
dB
dB
PL(LB) = 6 dBm to 13 dBm; set by PC
PL(LB) = 31 dBm to 34 dBm; set by PC
−3
output power variation of
frequency
−0.3
+0.3 dB
H2 to H13 harmonics
P
L(LB) ≤ 34 dBm
-
-
-
-
−5
dBm
isolation H2 into
DCS1800/PCS1900
measured at RFO_HB; PL(LB) = 34 dBm
−15
dBm
dBm
dBm
dBm
isolation H3 into
DCS1800/PCS1900
measured at RFO_HB; PL(LB) = 34 dBm
-
-
-
-
-
-
-
−25
−36
−36
6 : 1
isolation
PD(LB) = 4 dBm; VPC = 0.15 V; Standby
mode
PD(LB) = 4 dBm; VPC = 0.15 V; LB TX
mode
VSWRin
input VSWR
PL(LB) < 6 dBm
-
-
PL(LB) = 6 dBm to 34 dBm;
2 : 1 3 : 1
9397 750 14011
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 2 February 2005
9 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
Table 7:
Dynamic characteristics GSM850 and EGSM900 transmit mode …continued
ZS = ZL = 50 Ω; VBAT = 3.6 V; VSTAB = 2.8 V; Tmb = 25 °C; δ = 1 : 8 to 4 : 8; tp = 575 µs to 2300 µs; PD(LB) = 2 dBm; spurious
signals on PD(LB) < −50 dBm; LB TX mode selected;
f = 824 MHz to 849 MHz for GSM850; f = 880 MHz to 915 MHz for EGSM900; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
Pn
noise power
RBW = 100 kHz;
f0 = 897.5 MHz for EGSM900;
f0 = 836.5 MHz for GSM850
f0 + 27.5 MHz; PL(LB) < 34 dBm
f0 + 37.5 MHz; PL(LB) < 34 dBm
f ≥ 1805 MHz; PL(LB) < 34 dBm
-
-
-
-
-
-
-
-
−73
−82
−77
28
dBm
dBm
dBm
dB
CG
conversion gain
small signal gain
AM/AM conversion
f0 = 915 MHz for EGSM900;
f0 = 849 MHz for GSM850;
PL(LB) = 6 dBm to 34 dBm;
fSS1 = f0 − 20 MHz; PSS1 = −40 dBm;
CG = PL(CON) − PSS1; see Figure 4
SSG
AM/AM
f0 = 915 MHz for EGSM900;
f0 = 849 MHz for GSM850;
-
-
31
dB
PL(LB) = 6 dBm to 34 dBm;
fSS2 = f0 + 20 MHz; PSS2 = −40 dBm;
SSG = PL(SS2) − PSS2; see Figure 4
PL(LB) = 6 dBm to 34 dBm;
6.5 % AM modulation with
fmod = 67 kHz at RFI_LB
fmod = 140 kHz at RFI_LB
fmod = 271 kHz at RFI_LB
PD(LB) = 1.5 dBm to 2.5 dBm;
-
-
-
-
5
8
%
8
13
20
4
%
14
2
%
AM/PM
AM/PM conversion
deg/dB
PL(LB) = 6 dBm to 34 dBm
maximum control slope
carrier rise and fall time
PL(LB) = 6 dBm to 34 dBm
-
-
-
-
200
2
dB/V
tr, tf
fCL
PL(LB) = 5 dBm to 34 dBm or
34 dBm to 5 dBm
µs
control loop bandwidth
stability
-
-
200
-
-
kHz
P
L(LB) ≤ 34 dBm; VSWR ≤ 7 : 1 through all
−36
dBm
phases; VBAT = 3.2 V to 4.6 V
ruggedness
VBAT = 3.2 V to 4.6 V; PL(LB) ≤ 34 dBm;
δ = 4 : 8; VSWR ≤ 8 : 1 through all phases
no degradation
[1] Condition to set VPC: VBAT = 3.6 V; δ = 2 : 8; PD(LB) = 2 dBm; Tmb = 25 °C; f = 897.5 MHz for EGSM900; f = 836.5 MHz for GSM850.
[2] Conditions for power variation: PD(LB) = 0 dBm to 4 dBm; f = 824 MHz to 849 MHz for GSM850; f = 880 MHz to 915 MHz for EGSM900;
Tmb = 15 °C to 70 °C; VBAT = 3.2 V to 4.2 V; VSTAB = 2.8 V ± 20 mV.
[3] Conditions for power variation: PD(LB) = 0 dBm to 4 dBm; f = 824 MHz to 849 MHz for GSM850; f = 880 MHz to 915 MHz for EGSM900;
Tmb = −20 °C to +90 °C; VBAT = 3.2 V to 4.2 V; VSTAB = 2.8 V ± 20 mV.
[4] Conditions for power variation: PD(LB) = 2 dBm; f = 824 MHz to 849 MHz for GSM850; f = 880 MHz to 915 MHz for EGSM900;
Tmb = 25 °C; VBAT = 3.6 V; VSTAB = 2.8 V ± 20 mV.
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
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BGY288
Philips Semiconductors
Power amplifier with integrated control loop
Table 8:
Dynamic characteristics DCS1800/PCS1900 transmit mode
ZS = ZL = 50 Ω; VBAT = 3.6 V; VSTAB = 2.8 V; Tmb = 25 °C; δ = 1 : 8 to 4 : 8; tp = 575 µs to 2300 µs; PD(HB) = 0 dBm; spurious
signals on PD(HB) < −50 dBm; HB TX mode selected;
f = 1710 MHz to 1785 MHz for DCS1800; f = 1850 MHz to 1910 MHz for PCS1900; unless otherwise specified.
Symbol
PD(HB)
VPC
Parameter
Conditions
Min
−2
-
Typ
Max Unit
RF input power
0
-
+2
2
dBm
V
reference voltage to set
output power
f = 1747.6 MHz for DCS1800;
f = 1880 MHz for PCS1900;
PL(HB) = 32.5 dBm
f = 1747.6 MHz for DCS1800;
f = 1880 MHz for PCS1900;
0.2
-
-
V
PL(HB) = −3 dBm
PL(HB)
available output power
VPC = 2.2 V
32.7 33.5
-
-
dBm
dBm
VPC = 2.0 V; VBAT = 3.2 V;
31.8
-
P
D(HB) = −2 dBm; δ = 2 : 8
VPC = 2.0 V; VBAT = 3.2 V;
D(HB) = −2 dBm; δ = 2 : 8; Tmb = 85 °C
31.3
-
-
dBm
P
η
efficiency DCS1800
efficiency PCS1900
saturated power
-
50
45
50
45
-
-
-
-
-
%
%
%
%
PL(HB) = 31.3 dBm
-
saturated power
-
PL(HB) = 31.3 dBm
-
[1] [2]
[1] [2]
[1] [2]
[1] [2]
[1] [3]
[1] [3]
[1] [3]
[1] [3]
[1] [4]
∆PL(HB)
output power variation at
nominal temperature range
PL(HB) = 28 dBm to 32 dBm; set by PC
PL(HB) = 15 dBm to 28 dBm; set by PC
PL(HB) = 5 dBm to 15 dBm; set by PC
PL(HB) = 0 dBm to 5 dBm; set by PC
PL(HB) = 28 dBm to 32 dBm; set by PC
PL(HB) = 15 dBm to 28 dBm; set by PC
PL(HB) = 5 dBm to 15 dBm; set by PC
PL(HB) = 0 dBm to 5 dBm; set by PC
PL(HB) = 30 dBm to 32 dBm; set by PC
−0.7
−1
+0.7 dB
-
+1
+2
+3
dB
dB
dB
−2
-
−3
-
output power variation at
extreme temperature range
−1.2
−1.5
−2.5
−3.5
−0.3
-
+1.2 dB
+1.5 dB
+2.5 dB
+3.5 dB
+0.3 dB
-
-
-
output power variation of
frequency
-
H2 to H7
harmonics
isolation
P
L(HB) ≤ 32 dBm
-
-
-
-
−5
dBm
PD(HB) = 2 dBm; VPC = 0.15 V; Standby
mode
−36
dBm
PD(HB) = 2 dBm; VPC = 0.15 V; HB TX
mode
-
-
-
−36
dBm
VSWRin
Pn
input VSWR
noise power
PL(HB) < 0 dBm
-
-
-
6 : 1
PL(LB) = 2 dBm to 32 dBm
2 : 1 3 : 1
f0 = 1785 MHz for DCS1800;
f0 = 1910 MHz for PCS1900; f0 + 20 MHz;
RBW = 100 kHz; PL(HB) < 32 dBm
-
−77
dBm
dB
CG
conversion gain
f0 = 1785 MHz for DCS1800;
f0 = 1910 MHz for PCS1900;
-
-
25
PL(HB) = 0 dBm to 32 dBm;
fSS1 = f0 − 20 MHz; PSS1 = −40 dBm;
CG = PL(CON) − PSS1; see Figure 4
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
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BGY288
Philips Semiconductors
Power amplifier with integrated control loop
Table 8:
Dynamic characteristics DCS1800/PCS1900 transmit mode …continued
ZS = ZL = 50 Ω; VBAT = 3.6 V; VSTAB = 2.8 V; Tmb = 25 °C; δ = 1 : 8 to 4 : 8; tp = 575 µs to 2300 µs; PD(HB) = 0 dBm; spurious
signals on PD(HB) < −50 dBm; HB TX mode selected;
f = 1710 MHz to 1785 MHz for DCS1800; f = 1850 MHz to 1910 MHz for PCS1900; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
SSG
small signal gain
f0 = 1785 MHz for DCS1800;
f0 = 1910 MHz for PCS1900;
-
-
33
dB
PL(HB) = 0 dBm to 32 dBm;
fSS2 = f0 + 20 MHz; PSS2 = −40 dBm;
SSG = PL(SS2) − PSS2; see Figure 4
AM/AM
AM/PM
AM/AM conversion
AM/PM conversion
PL(HB) = 0 dBm to 32 dBm;
6.5 % AM modulation with
fmod = 67 kHz at RFI_HB
fmod = 140 kHz at RFI_HB
fmod = 271 kHz at RFI_HB
PD(HB) = −0.5 dBm to +0.5 dBm;
-
-
-
-
5
8
%
8
13
20
4
%
14
2
%
deg/dB
PL(HB) = 0 dBm to 32 dBm
maximum control slope
carrier rise and fall time
PL(HB) = 0 dBm to 32 dBm
-
-
-
-
200
2
dB/V
tr, tf
fCL
PL(HB) from 0 dBm to 32 dBm and
from 32 dBm to 0 dBm
µs
control loop bandwidth
stability
-
-
200
-
-
kHz
P
L(HB) ≤ 32 dBm; VSWR ≤ 7 : 1 through all
−36
dBm
phases; VBAT = 3.2 V to 4.6 V
ruggedness
VBAT = 3.2 V to 4.6 V; PL(HB) ≤ 32 dBm;
δ = 4 : 8; VSWR ≤ 8 : 1 through all phases
no degradation
[1] Condition to set VPC: VBAT = 3.6 V; δ = 2 : 8; PD(HB) = 0 dBm; Tmb = 25 °C; f = 1747.6 MHz for DCS1800; f = 1880 MHz for PCS1900.
[2] Conditions for power variation: PD(HB) = −2 dBm to +2 dBm; f = 1710 MHz to 1785 MHz for DCS1800;
f = 1850 MHz to 1910 MHz for PCS1900; Tmb = 15 °C to 70 °C; VBAT = 3.2 V to 4.2 V; VSTAB = 2.8 V ± 20 mV.
[3] Conditions for power variation: PD(HB) = −2 dBm to +2 dBm; f = 1710 MHz to 1785 MHz for DCS1800;
f = 1850 MHz to 1910 MHz for PCS1900; Tmb = −20 °C to +90 °C; VBAT = 3.2 V to 4.2 V; VSTAB = 2.8 V ± 20 mV.
[4] Conditions for power variation: PD(HB) = 0 dBm; f = 1710 MHz to 1785 MHz for DCS1800; f = 1850 MHz to 1910 MHz for PCS1900;
Tmb = 25 °C; VBAT = 3.6 V; VSTAB = 2.8 V ± 20 mV.
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
12 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
P
L
P
P
P
D
POWER
AMP
P
L(SS1)
P
L(CON)
P
f
SS1
f
f
f
2f − f
0 SS1
f
f
SS1
0
SS1
0
CG = P
− P
SS1
L(CON)
001aaa701
a. Conversion gain (CG)
P
L
P
P
P
D
POWER
AMP
P
L(SS2)
P
f
SS2
f
f
f
f
f
0
SS2
0
SS2
SSG = P
− P
SS2
L(SS2)
001aaa702
b. Small signal gain (SSG)
The total noise at the output of the power amplifier is the summation of three sources:
The noise present at the input of the power amplifier at fSS1 amplified by the conversion gain.
The noise present at the input of the power amplifier at fSS2 amplified by the small signal gain.
The noise generated by the power amplifier itself, when the noise at the input of the power
amplifier is zero.
Fig 4. Input and output signals
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Preliminary data sheet
Rev. 01 — 2 February 2005
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BGY288
Philips Semiconductors
Power amplifier with integrated control loop
10. Application information
V
BAT
C10
C3
C2
C4
C5
L1
RFI_HB
2
1
4
3
R1
R2
L3
L4
5
6
16
RFO_HB
TXON
PC
15
C1
BGY288
R3
R4
14
13
RFO_LB
7
8
V
STAB
BAND
9
10 11
12
001aab848
L2
RFI_LB
C6
C8
C7
C9
C11
V
BAT
Drive signals must not be applied to pin 9.
Components listed in Table 9.
Fig 5. Test circuit
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
14 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
V
BAT
C10
CON1
CON3
C2
C3
RFI_HB
RFO_HB
C4 C5
BGY288
R1
R2
R3
R4
R5
C1
CON5
C6 C7
C8 C9
CON2
CON4
RFI_LB
RFO_LB
C11
V
BAT
001aab849
CON6
Components listed in Table 9.
Fig 6. Printed-circuit board test circuit
Table 9: List of components
Component
Description
Value
PB005H1
Dimensions
Supplier
PCB
printed-circuit board
Roland Haefele
Johnson Components
CON1, CON2,
CON3, CON4
jack assembly end launch
SMA connector
142-0701-881
CON5
DC connector 5 pin
solder ring
CON6
C1
SMD capacitor
SMD capacitor
SMD capacitor
SMD capacitor
electrolytic capacitor[1]
SMD resistor
2.7 nF
0603 size
0805 size
0603 size
0603 size
C2, C3, C8, C9
C4, C5
100 nF
10 pF
C6, C7
33 pF
C10, C11
R1, R3, R4, R5
R2
47 µF; 35 V
0 Ω
Matsushita
0605 size
SMD resistor
stripline[2]
1 kΩ; 0.1 W
Z0 = 50 Ω
0603 size
L1, L2, L3, L4
width 1.4 mm
[1] C10 and C11 smooth the DC supply voltage (VBAT).
[2] The striplines are on a double etched printed-circuit board (εr = 4.6); thickness 0.8 mm.
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
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BGY288
Philips Semiconductors
Power amplifier with integrated control loop
11. Package outline
Leadless surface mounted package; plastic cap; 16 terminations
SOT775A
Z
(10×)
Z
(10×)
D1
D2
e
(2×)
e
e
Z (8×)
2
1
(2×) (12×)
Z
3
1
2
3
4
5
Z
(10×)
Z
(10×)
E1
E2
Z
4
16
15
14
6
7
8
Z
2
L (16×)
Z
(36×)
6
13
(2×)
12
11
10
9
Z
(36×)
b
b (14×)
5
1
Z
1
D
Dimensions solder resist
D
1
A
y
c
E
E
1
pin 1 index
0
5
10 mm
Z
Z
Z
Z
Z
Z
E2
5
6
D1
D2
E1
scale
0.6
0.6
0.3
0.6
0.3
0.6
DIMENSIONS (mm are the original dimensions)
A
y
Z
3
Z
4
b
b
c
D
D
E
E
1
e
e
e
2
L
Z
Z
1
Z
2
UNIT
1
1
1
max.
max.
8.2
7.8
7.95
7.65
8.2
7.8
7.95
7.65
mm
1.6
0.6
0.9
0.56
1.55
1.7
1.85
0.6
0.1
0.9
1
1.2
1.7
1.6
Note
1. General tolerance ±0.050 mm, unless specified otherwise.
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEITA
03-10-10
SOT775A
Fig 7. Package outline SOT775A
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
16 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
12. Soldering Recommendations
12.1 Reflow profile
The BGY288 is a laminate-based power amplifier module in a Leadless Grid Array (LGA)
package. The module can be assembled using a standard Surface Mount Technology
(SMT) reflow process in a convection or IR-oven. The minimum and maximum limits of the
temperature profile are shown in Figure 8. The actual profile has to be within these limits,
and will depend on the printed-circuit board material, the number and size of the
components to be assembled, and the type of solder which is being used.
temperature
T
P
T
R
T
E(max)
T
E(min)
α
α
β
t
t
t
R
E
001aaa705
Fig 8. Recommended reflow temperature profile
It is recommended to use a standard no-clean solder paste like SnPb for profiles having
leads containing solder, or SnAgCu for lead-free assembly processes. The parameters
and corresponding values for SnPb and SnAgCu solder are given in Table 10.
Table 10: Reflow soldering parameters
Symbol parameter
SnPb Solder
≤ 3
SnAgCu solder
≤ 3
Unit
°C/s
°C
α
temperature gradient
TE
tE
pre-heat (soak) temperature
pre-heat time
100 to 150
60 to 120
> 183
150 to 200
60 to 180
> 217
s
TR
tR
TP
β
reflow temperature
°C
reflow time
60 to 150
240
60 to 150
260
s
maximum peak temperature
temperature gradient
time 25 °C to peak temperature
°C
< 5
< 5
°C/s
6 minutes max.
8 minutes max.
12.2 Printed-circuit board layout
The printed-circuit board footprint layout is a copy of the metal pattern on the underside of
the LGA package. It is recommended that the printed-circuit board is designed with a
large ground plane, and that the solder lands of the ground plane solder mask are defined
as shown in Figure 9.
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
17 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
12.3 Stencil design
The recommended dimensions of the solder stencil are given in Figure 9 and are based
on a stencil thickness of 125 µm. Using a thinner or thicker stencil will require the stencil
aperture dimensions to be adjusted.
12.4 Rework
If rework is required, it is recommended that a BGA rework station with a programmable
top and bottom heater is used. The first step of the rework process is to pre-heat the
printed-circuit board with the bottom heater of the rework station. When the board has
reached the pre-heat temperature, the top heater can be used to increase the
temperature above the melting point of the solder. The component which has to be
replaced can be picked up with a vacuum nozzle. Before placing a new component the
remaining solder on the board must be removed. Fresh solder can be dispensed, a new
component placed, and the board heated as described previously.
12.5 Moisture sensitivity level
The BGY288 is tested according to the JEDEC standard JESD 22-A113C. The BGY288 is
classified on MSL3 for a lead soldering profile with a peak temperature of 240 °C, and on
MSL4 for a lead-free soldering profile with a peak temperature of 260 °C.
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
18 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
7.40
1.10
1.10
1.10
0.80
B
0.60
0.90
0.60
0.60
0.60
A
C
0.60
1.10
1.10
1.10
1.10
0.60
0.60
7.40
5.40
0.30
0.30
solder lands
0.40
0.60
solder stencil opening
DIMENSIONS in mm
5.20
0.60
0.57
0.90
0.85
0.60
0.55
0.60 0.57
0.60 0.57
0.60 0.55
detail A
detail B
detail C
(14×)
(2×)
(36×)
mgx467
Fig 9. Footprint layout and solder stencil design
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
19 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
13. Revision history
Table 11: Revision history
Document ID
Release date Data sheet status
20050202 Preliminary data sheet
Change notice Doc. number
9397 750 14011
Supersedes
BGY288_1
-
-
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
20 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
14. Data sheet status
Level Data sheet status[1] Product status[2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
15. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
ICs with GSM or 3G functionality — Purchase of a Philips IC with GSM
functionality does not convey an implied license under any patent right on the
GSM or 3G Standard. A license for the Philips portfolio of GSM and 3G
patents needs to be obtained via Philips Intellectual Property & Standards
(www.ip.philips.com), e-mail: info.licensing@philips.com.
16. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
17. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14011
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Preliminary data sheet
Rev. 01 — 2 February 2005
21 of 22
BGY288
Philips Semiconductors
Power amplifier with integrated control loop
18. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General features. . . . . . . . . . . . . . . . . . . . . . . . 1
RF performance . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.2.1
1.2.2
1.3
2
2.1
2.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
3
4
Ordering information. . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5
Functional description . . . . . . . . . . . . . . . . . . . 4
Operating conditions. . . . . . . . . . . . . . . . . . . . . 4
Power amplifier . . . . . . . . . . . . . . . . . . . . . . . . . 4
Control logic . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Power controller . . . . . . . . . . . . . . . . . . . . . . . . 4
Mode control. . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.1
5.2
5.3
5.4
5.5
6
6.1
6.2
Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Ramp-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ramp-down . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Application information. . . . . . . . . . . . . . . . . . 14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
8
9
10
11
12
Soldering Recommendations . . . . . . . . . . . . . 17
Reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . 17
Printed-circuit board layout. . . . . . . . . . . . . . . 17
Stencil design . . . . . . . . . . . . . . . . . . . . . . . . . 18
Rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Moisture sensitivity level . . . . . . . . . . . . . . . . . 18
12.1
12.2
12.3
12.4
12.5
13
14
15
16
17
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 21
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Contact information . . . . . . . . . . . . . . . . . . . . 21
© Koninklijke Philips Electronics N.V. 2005
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Date of release: 2 February 2005
Document number: 9397 750 14011
Published in The Netherlands
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