BLF6G20-180PN [NXP]

Power LDMOS transistor; 功率LDMOS晶体管
BLF6G20-180PN
型号: BLF6G20-180PN
厂家: NXP    NXP
描述:

Power LDMOS transistor
功率LDMOS晶体管

晶体 晶体管
文件: 总11页 (文件大小:84K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BLF6G20-180PN  
Power LDMOS transistor  
Rev. 03 — 30 March 2009  
Product data sheet  
1. Product profile  
1.1 General description  
180 W LDMOS power transistor for base station applications at frequencies from  
1800 MHz to 2000 MHz.  
Table 1.  
Typical performance  
RF performance at Tcase = 25 °C in a common source class-AB production test circuit.  
Mode of operation  
f
VDS  
(V)  
32  
PL(AV)  
(W)  
Gp  
ηD  
ACPR  
(dBc)  
35[1]  
(MHz)  
(dB)  
18  
(%)  
29.5  
2-carrier W-CDMA  
1805 to 1880  
50  
[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier;  
carrier spacing 5 MHz.  
CAUTION  
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken  
during transport and handling.  
1.2 Features  
I Typical 2-carrier W-CDMA performance at frequencies of 1805 MHz and 1880 MHz, a  
supply voltage of 32 V and an IDq of 1600 mA:  
N Average output power = 50 W  
N Power gain = 18 dB (typ)  
N Efficiency = 29.5 %  
N ACPR = 35 dBc  
I Easy power control  
I Integrated ESD protection  
I Excellent ruggedness  
I High efficiency  
I Excellent thermal stability  
I Designed for broadband operation (1800 MHz to 2000 MHz)  
I Internally matched for ease of use  
I Qualified up to a supply voltage of 32 V  
I Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances  
(RoHS)  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
1.3 Applications  
I RF power amplifiers for W-CDMA base stations and multicarrier applications in the  
1800 MHz to 2000 MHz frequency range  
2. Pinning information  
Table 2.  
Pinning  
Pin  
1
Description  
drain1  
Simplified outline  
Graphic symbol  
1
2
1
2
drain2  
5
3
gate1  
3
5
4
3
4
4
gate2  
[1]  
5
source  
2
sym117  
[1] Connected to flange.  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name Description  
Version  
BLF6G20-180PN  
-
flanged balanced LDMOST ceramic package;  
2 mounting holes; 4 leads  
SOT539A  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
Unit  
V
drain-source voltage  
gate-source voltage  
storage temperature  
case temperature  
junction temperature  
-
65  
VGS  
0.5 +13  
V
Tstg  
65  
+150 °C  
Tcase  
Tj  
-
-
150  
225  
°C  
°C  
BLF6G20-180PN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 30 March 2009  
2 of 11  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
5. Thermal characteristics  
Table 5.  
Thermal characteristics  
Symbol Parameter  
Conditions  
Typ Unit  
Rth(j-case) thermal resistance from junction to case Tcase = 80 °C; PL(AV) = 50 W  
0.45 K/W  
6. Characteristics  
Table 6.  
Characteristics  
Tj = 25 °C per section; unless otherwise specified.  
Symbol Parameter  
Conditions  
VGS = 0 V; ID = 0.5 mA  
Min  
Typ  
Max  
Unit  
V(BR)DSS drain-source breakdown  
voltage  
65  
-
-
V
VGS(th)  
VGSq  
IDSS  
gate-source threshold voltage VDS = 10 V; ID = 144 mA 1.575 1.9  
gate-source quiescent voltage VDS = 32 V; ID = 800 mA 1.725 2.1  
2.3  
V
V
2.45  
drain leakage current  
VGS = 0 V  
VDS = 28 V  
-
-
-
-
3
5
-
µA  
µA  
A
VDS = 60 V  
-
IDSX  
drain cut-off current  
VGS = VGS(th) + 3.75 V;  
25  
VDS = 10 V  
IGSS  
gfs  
gate leakage current  
VGS = 11 V; VDS = 0 V  
VDS = 10 V; ID = 7.2 A  
-
-
-
-
300  
-
nA  
S
forward transconductance  
10  
0.1  
RDS(on) drain-source on-state  
resistance  
VGS = VGS(th) + 3.75 V;  
ID = 5 A  
0.165  
7. Application information  
Table 7.  
Application information  
Mode of operation: 2-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test  
model 1; 1 to 64 PDPCH; f1 = 1802.5 MHz; f2 = 1807.5 MHz; f3 = 1872.5 MHz; f4 = 1877.5 MHz;  
RF performance at VDS = 32 V; IDq = 1600 mA; Tcase = 25 °C; unless otherwise specified; in a  
class-AB production test circuit.  
Symbol Parameter  
Conditions  
Min  
Typ Max  
19.2  
10 6.5  
29.5  
35 33  
Unit  
dB  
Gp  
power gain  
PL(AV) = 50 W  
PL(AV) = 50 W  
PL(AV) = 50 W  
PL(AV) = 50 W  
16.8 18  
RLin  
ηD  
input return loss  
-
dB  
drain efficiency  
26  
-
-
%
ACPR  
adjacent channel power ratio  
dBc  
Table 8.  
Application information  
Mode of operation: 1-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test  
model 1; 1 to 64 PDPCH; f1 = 1872.5 MHz; f2 = 1877.5 MHz; RF performance at VDS = 32 V;  
IDq = 1600 mA; Tcase = 25 °C; unless otherwise specified; in a class-AB production test circuit.  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
4.1 4.3 dB  
PARO  
output peak-to-average ratio PL(AV) = 115 W;  
-
at 0.01 % probability on CCDF  
BLF6G20-180PN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 30 March 2009  
3 of 11  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
7.1 Ruggedness in class-AB operation  
The BLF6G20-180PN is capable of withstanding a load mismatch corresponding to  
VSWR = 10 : 1 through all phases under the following conditions: VDS = 28 V;  
IDq = 1600 mA; PL = 180 W (CW); f = 1880 MHz.  
001aai017  
20  
60  
G
η
D
p
(dB)  
(%)  
G
p
18  
40  
η
D
16  
14  
20  
0
200  
(W)  
0
40  
80  
120  
160  
P
L(AV)  
VDS = 32 V; IDq = 1600 mA; f = 1880 MHz.  
Fig 1. One-tone CW power gain and drain efficiency as function of average load power;  
typical values  
001aai018  
001aai019  
22  
50  
10  
G
η
D
p
(dB)  
(%)  
IMD  
(dBc)  
20  
40  
IMD3  
G
p
30  
18  
16  
14  
12  
30  
20  
10  
0
η
IMD5  
IMD7  
D
50  
70  
0
100  
200  
300  
0
100  
200  
300  
P
(W)  
P
(W)  
L(PEP)  
L(PEP)  
VDS = 32 V; IDq = 1600 mA; f1 = 1880 MHz;  
f2 = 1880.1 MHz.  
VDS = 32 V; IDq = 1600 mA; f1 = 1880 MHz;  
f2 = 1880.1 MHz.  
Fig 2. Two-tone CW power gain and drain efficiency  
as function of peak envelope load power;  
typical values  
Fig 3. Two-tone intermodulation distortion as a  
function of peak envelope load power; typical  
values  
BLF6G20-180PN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 30 March 2009  
4 of 11  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
001aai020  
001aai021  
22  
40  
20  
G
(dB)  
η
(%)  
ACPR  
(dBc)  
p
D
20  
30  
30  
40  
50  
60  
G
p
18  
16  
14  
20  
10  
0
η
D
0
20  
40  
60  
0
20  
40  
60  
P
(W)  
P (W)  
L
L
VDS = 32 V; IDq = 1600 mA; f1 = 1872.5 MHz;  
f2 = 1877.5 MHz; carrier spacing 5 MHz.  
VDS = 32 V; IDq = 1600 mA; f1 = 1872.5 MHz;  
f2 = 1877.5 MHz; carrier spacing 5 MHz.  
Fig 4. 2-carrier W-CDMA power gain and drain  
efficiency as function of load power; typical  
values  
Fig 5. 2-carrier W-CDMA adjacent channel power  
ratio as a function of load power; typical  
values  
001aai022  
001aai023  
22  
40  
20  
ACPR,  
IMD3  
(dBc)  
G
(dB)  
η
D
(%)  
p
20  
30  
30  
IMD3  
G
p
18  
16  
14  
20  
10  
0
40  
η
D
ACPR  
50  
60  
0
20  
40  
60  
0
20  
40  
60  
P
(W)  
P (W)  
L
L
VDS = 32 V; IDq = 1600 mA; f1 = 1867.5 MHz;  
f2 = 1877.5 MHz; carrier spacing 10 MHz.  
VDS = 32 V; IDq = 1600 mA; f1 = 1867.5 MHz;  
f2 = 1877.5 MHz; carrier spacing 10 MHz.  
Fig 6. 2-carrier W-CDMA power gain and drain  
efficiency as function of load power; typical  
values  
Fig 7. 2-carrier W-CDMA adjacent channel power  
ratio and third order intermodulation distortion  
as function of load power; typical values  
BLF6G20-180PN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 30 March 2009  
5 of 11  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
8. Test information  
C3  
C9  
C13  
C5  
C14  
C11  
R3  
input  
output  
50 Ω  
50 Ω  
C1  
C6  
R1  
C7  
R2  
C2  
C8  
C10  
C12  
C4  
001aai024  
See Table 9 for list of components.  
Fig 8. Test circuit for operation at 1805 MHz and 1880 MHz  
BLF6G20-180PN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 30 March 2009  
6 of 11  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
C14  
C5  
C13  
C11  
R3  
C3 C9  
C6  
R1  
C1  
C7  
INPUT  
R2  
C2 C8  
R1  
C10 C12 C4  
TB  
OUTPUT  
R1  
TB  
001aai025  
Striplines are on a double copper-clad Rogers R04350 Printed-Circuit Board (PCB) with εr = 3.5 and thickness = 0.76 mm.  
See Table 9 for list of components.  
Fig 9. Component layout for 1805 MHz and 1880 MHz test circuit  
Table 9.  
List of components  
For test circuit, see Figure 8 and Figure 9.  
Component  
C1  
Description  
Value  
Remarks  
[1]  
[1]  
[2]  
[3]  
ATC multilayer ceramic chip capacitor  
ATC multilayer ceramic chip capacitor  
ATC multilayer ceramic chip capacitor  
ATC multilayer ceramic chip capacitor  
TDK multilayer ceramic chip capacitor  
AVX multilayer ceramic chip capacitor  
electrolytic capacitor  
6.2 pF  
16 pF  
C2, C3  
C4, C5, C6  
C7  
18 pF  
1.1 pF  
4.7 µF  
220 nF  
100 µF; 63 V  
33 Ω  
C8, C9, C10, C11  
C12, C13  
C14  
[2]  
R1  
chip resistor  
R2, R3  
chip resistor  
8.2 Ω  
[1] American Technical Ceramics type 100B or capacitor of same quality.  
[2] American Technical Ceramics type 180R or capacitor of same quality.  
[3] American Technical Ceramics type 100A or capacitor of same quality.  
BLF6G20-180PN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 30 March 2009  
7 of 11  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
9. Package outline  
Flanged balanced LDMOST ceramic package; 2 mounting holes; 4 leads  
SOT539A  
D
A
F
D
1
U
B
1
q
C
w
H
M
M
C
2
1
c
1
2
4
E
E
1
p
H
U
2
5
w
M
M
M
B
A
1
L
3
A
w
b
M
3
Q
e
0
5
10 mm  
scale  
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)  
c
A
b
D
D
e
E
E
F
H
H
L
p
Q
q
U
U
w
w
w
3
UNIT  
1
1
1
1
2
1
2
11.81  
11.56  
3.30 2.31  
3.05 2.01  
5.33  
3.96  
31.55 31.52  
30.94 30.96  
9.50 9.53 1.75 17.12 25.53 3.73  
9.30 9.27 1.50 16.10 25.27 2.72  
41.28 10.29  
41.02 10.03  
0.15  
0.08  
35.56  
1.400  
0.25 0.51 0.25  
0.010 0.020 0.010  
mm  
13.72  
0.465  
0.455  
0.130 0.091  
0.120 0.079  
0.210  
0.156  
1.242 1.241  
1.218 1.219  
0.374 0.375 0.069 0.674 1.005 0.147  
0.366 0.365 0.059 0.634 0.995 0.107  
1.625 0.405  
1.615 0.395  
0.006  
0.003  
inches  
0.540  
REFERENCES  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
JEDEC  
EIAJ  
99-12-28  
00-03-03  
SOT539A  
Fig 10. Package outline SOT539A  
BLF6G20-180PN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 30 March 2009  
8 of 11  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
10. Abbreviations  
Table 10. Abbreviations  
Acronym  
3GPP  
CCDF  
CW  
Description  
3rd Generation Partnership Project  
Complementary Cumulative Distribution Function  
Continuous Wave  
DPCH  
IMD  
Dedicated Physical CHannel  
InterModulation Distortion  
LDMOS  
LDMOST  
PAR  
Laterally Diffused Metal-Oxide Semiconductor  
Laterally Diffused Metal-Oxide Semiconductor Transistor  
Peak-to-Average power Ratio  
PDPCH  
RF  
transmission Power of the Dedicated Physical CHannel  
Radio Frequency  
VSWR  
W-CDMA  
Voltage Standing-Wave Ratio  
Wideband Code Division Multiple Access  
11. Revision history  
Table 11. Revision history  
Document ID  
Release date  
Data sheet status  
Product data sheet  
Preliminary data sheet  
Change notice  
Supersedes  
BLF6G20-180PN_3  
BLF6G20-180PN_2  
Modifications:  
20090330  
20090121  
-
-
BLF6G20-180PN_2  
BLF6G20-180PN_1  
Table 7 on page 3: Maximum adjacent channel power ratio changed  
Table 8 on page 3: Minimum output peak-to-average ratio changed  
BLF6G20-180PN_1  
20080428  
Objective data sheet  
-
-
BLF6G20-180PN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 30 March 2009  
9 of 11  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
12. Legal information  
12.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
12.2 Definitions  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
12.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
12.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
13. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
BLF6G20-180PN_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 30 March 2009  
10 of 11  
BLF6G20-180PN  
NXP Semiconductors  
Power LDMOS transistor  
14. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 3  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Application information. . . . . . . . . . . . . . . . . . . 3  
Ruggedness in class-AB operation. . . . . . . . . . 4  
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9  
3
4
5
6
7
7.1  
8
9
10  
11  
12  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
12.1  
12.2  
12.3  
12.4  
13  
14  
Contact information. . . . . . . . . . . . . . . . . . . . . 10  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2009.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 30 March 2009  
Document identifier: BLF6G20-180PN_3  

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Power LDMOS transistor
NXP

BLF6G20-40,112

RF FET LDMOS 65V 18.8DB SOT608A
ETC

BLF6G20-45

UHF power LDMOS transistor
NXP

BLF6G20-45,112

BLF6G20-45
NXP

BLF6G20-45,135

BLF6G20-45
NXP

BLF6G20-75

RF Manual 16th edition
NXP