BLF7G20LS-250P,118 [NXP]
BLF7G20LS-250P;型号: | BLF7G20LS-250P,118 |
厂家: | NXP |
描述: | BLF7G20LS-250P |
文件: | 总15页 (文件大小:425K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BLF7G20L-250P;
BLF7G20LS-250P
Power LDMOS transistor
Rev. 4 — 12 July 2013
Product data sheet
1. Product profile
1.1 General description
250 W LDMOS power transistor for base station applications at frequencies from
1805 MHz to 1880 MHz.
Table 1.
Typical performance
Typical RF performance at Tcase = 25 C in a common source class-AB production test circuit.
Mode of operation
f
IDq
VDS
(V)
28
PL(AV)
(W)
Gp
D
(%) (dBc)
35
29.5[1]
ACPR
(MHz)
(mA)
1900
(dB)
18
2-carrier W-CDMA
1805 to 1880
70
[1] Test signal: 3GPP; test model 1;64 DPCH; PAR = 8.4 dB at 0.01% probability on CCDF.
1.2 Features and benefits
Excellent ruggedness
High-efficiency
Low Rth providing excellent thermal stability
Designed for broadband operation (1805 MHz to 1880 MHz)
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent digital pre-distortion capability
Internally matched for ease of use
Integrated ESD protection
Compliant to Restriction of Hazardous Substances (RoHS) Directive 2002/95/EC
1.3 Applications
RF power amplifiers for W-CDMA base stations and multicarrier applications in the
1805 MHz to 1880 MHz frequency range
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
Pinning
Description
Simplified outline
Graphic symbol
BLF7G20L-250P (SOT539A)
1
2
3
4
5
drain1
drain2
gate1
gate2
source
1
3
2
4
1
5
3
5
4
[1]
2
sym117
BLF7G20LS-250P (SOT539B)
1
2
3
4
5
drain1
drain2
gate1
gate2
source
1
1
3
2
4
5
3
5
4
[1]
2
sym117
[1] Connected to flange.
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name Description
Version
BLF7G20L-250P
BLF7G20LS-250P
-
flanged balanced LDMOST ceramic package;
2 mounting holes; 4 leads
SOT539A
-
earless flanged balanced LDMOST ceramic package;
4 leads
SOT539B
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VGS
ID
Parameter
Conditions
Min
Max
65
Unit
V
drain-source voltage
gate-source voltage
drain current
-
0.5 +13
V
-
65
A
Tstg
Tj
storage temperature
junction temperature
65
+150 C
200 C
-
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
2 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol Parameter
Conditions
Typ
Unit
Rth(j-c)
thermal resistance from
Tcase = 80 C; PL = 70 W; VDS = 28 V;
0.20 K/W
junction to case
IDq = 1900 mA; Tj 150 C
6. Characteristics
Table 6.
Characteristics
Tj = 25 C unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
65
VDS = 10 V; ID = 150 mA 1.5
Max Unit
V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 1.5 mA
-
-
V
VGS(th)
IDSS
gate-source threshold voltage
drain leakage current
1.78 2.3
2.8
V
VGS = 0 V; VDS = 28 V
-
-
-
A
IDSX
drain cut-off current
VGS = VGS(th) + 3.75 V;
VDS = 10 V
33.4 37.54 A
IGSS
gfs
gate leakage current
VGS = 11 V; VDS = 0 V
VDS = 10 V; ID = 7.5 A
-
-
-
68.3
-
nA
S
forward transconductance
12.37 -
RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V;
ID = 5.25 A
0.078 0.135
7. Test information
Table 7.
2-carrier W-CDMA functional test information
Class-AB production test circuit; PAR = 8.4 dB at 0.01 % probability on the CCDF;
3GPP test model 1; 64 DPCH; f = 1805 MHz to 1880 MHz; RF performance at VDS = 28 V;
IDq = 1900 mA; Tcase = 25 C; unless otherwise specified.
Symbol
PL(AV)
Gp
Parameter
Conditions
Min Typ
Max Unit
average output power
power gain
-
70
-
-
-
-
W
PL(AV) = 70 W
PL(AV) = 70 W
PL(AV) = 70 W
PL(AV) = 70 W
16
-
18
dB
dB
%
RLin
input return loss
drain efficiency
12
35
D
30
-
ACPR
adjacent channel power ratio
29.5 24.5 dBc
7.1 Ruggedness in class-AB operation
The BLF7G20L-250P and BLF7G20LS-250P are capable of withstanding a load
mismatch corresponding to a VSWR = 10 : 1 through all phases under the following
conditions: VDS = 28 V; IDq = 1900 mA; PL(1dB) = 245 W (CW); f = 1805 MHz to
1880 MHz.
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
3 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
7.2 Impedance information
Table 8.
Typical impedance
Measured load-pull data half device; IDq = 950 mA; VDS = 28 V.
[1]
[1]
f
ZS
ZL
(MHz)
1750
1805
1845
1880
1930
()
()
1.31 j3.53
1.39 j3.75
1.48 j4.10
1.55 j4.19
1.97 j4.48
2.47 j3.91
2.27 j3.63
2.32 j3.19
1.89 j3.15
1.70 j2.95
[1] ZS and ZL defined in Figure 1.
drain
Z
L
gate
Z
S
001aaf059
Fig 1. Definition of transistor impedance
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
4 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
7.3 Single carrier W-CDMA
3GPP; test model 1; 64 DPCH; PAR = 7.2 dB at 0.01 % probability on CCDF. Channel
bandwidth is 3.84 MHz; channel spacing = 5 MHz; VDS = 28 V; IDq = 1900 mA
001aal942
001aal943
8
6
4
2
0
0
(1)
(2)
(3)
PAR
(dB)
ACPR
(dBc)
5M
-20
(1)
(2)
(3)
-40
-60
50
150
250
350
0
40
80
120
P
(W)
P
(W)
L(AV)
L(M)
(1) f = 1805 MHz.
(2) f = 1845 MHz.
(3) f = 1880 MHz.
(1) f = 1805 MHz.
(2) f = 1845 MHz.
(3) f = 1880 MHz.
Fig 2. Peak-to-average power ratio as a function of
peak output power; typical values
Fig 3. Adjacent channel power ratio (5 MHz) as a
function of average output power; typical
values
001aal950
001aal951
60
20
50
G
(dB)
η
D
(%)
p
η
D
(%)
19
40
(1)
(2)
(3)
G
p
40
18
17
16
15
30
20
10
0
η
D
20
0
0
100
200
300
0
40
80
120
P
L(AV)
(W)
P
(W)
L(AV)
(1) f = 1805 MHz.
(2) f = 1845 MHz.
(3) f = 1880 MHz.
Fig 4. Efficiency as a function of average output
power; typical values
Fig 5. Power gain and drain efficiency as a function
of average output power; typical values
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
5 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
7.4 One tone CW
VDS = 28 V; IDq = 1900 mA.
001aal949
001aal947
19
50
G
(dB)
η
D
p
(1)
(2)
(3)
(%)
18
40
(1)
(2)
(3)
17
16
15
14
30
20
10
0
0
100
200
300
0
20
40
60
80
100
120
L(AV)
140
(W)
P
L(AV)
(W)
P
(1) f = 1805 MHz.
(2) f = 1845 MHz.
(3) f = 1880 MHz.
(1) f = 1805 MHz.
(2) f = 1845 MHz.
(3) f = 1880 MHz.
Fig 6. Power gain as a function of average output
power; typical values
Fig 7. Efficiency as a function of average output
power; typical values
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
6 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
7.5 2-carrier WCDMA characteristics
VDS = 28 V; IDq = 1900 mA; channel spacing = 5 MHz; PAR = 8.4 dB at 0.01 % probability
on the CCDF.
001aal946
001aal947
18.5
50
G
(dB)
η
D
p
(1)
(2)
(3)
(1)
(2)
(3)
(%)
18.0
40
17.5
17.0
16.5
16.0
30
20
10
0
0
20
40
60
80
100
120
L(AV)
140
(W)
0
20
40
60
80
100
120
L(AV)
140
(W)
P
P
(1) f = 1805 MHz.
(2) f = 1845 MHz.
(3) f = 1880 MHz.
(1) f = 1805 MHz.
(2) f = 1845 MHz.
(3) f = 1880 MHz.
Fig 8. Power gain as a function of average output
power; typical values
Fig 9. Efficiency as a function of average output
power; typical values
001aal948
001aam087
0
18.5
50
G
p
G
η
D
(%)
p
(dB)
ACPR
(dBc)
5M
18.0
40
-20
η
D
17.5
17.0
16.5
16.0
30
20
10
0
(1)
(2)
(3)
-40
-60
0
20
40
60
80
100
120
P
140
(W)
10
50
90
130
P
L(AV)
(W)
L(AV)
(1) f = 1805 MHz.
(2) f = 1845 MHz.
(3) f = 1880 MHz.
Fig 10. Average power gain and drain efficiency as a
function of average output power; typical
values
Fig 11. Adjacent channel power ratio (5 MHz) as a
function of average output power;
typical values
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
7 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
7.6 Test circuit
Table 9.
List of components
For test circuit see Figure 12.
Component Description
Base plate [1]
Value
Code number
Type
Remarks
C3, C4, C9, multi layer ceramic chip capacitor 47 pF
C10
ATC 800B
mount on edge
mount on edge
C5
multi layer ceramic chip capacitor 1.2 pF
chip capacitor 560 pF
ATC 800B
ATC 100A
ATC 800B
TDK
C6, C7
C8
multi layer ceramic chip capacitor 68 pF
mount on edge
C11, C12
C13
multi layer ceramic chip capacitor 10 F
electrolytic capacitor
470 F; 63 V
C15, C16
R2, R3
multi layer ceramic chip capacitor 100 nF
Phillips 1206
Philips 0603
chip resistor
10
[1] See mechanical drawing (Figure 12).
C16
C3
C6
C9
C12
R2
C13
NXP
BLF7G20L-250P
Output Rev 03
C5
C8
C4
C15
R3
C7
C10
C11
NXP
BLF7G20L-250P Input Rev 03
001aam088
Printed-Circuit Board (PCB): Taconic RF35; r = 3.5 F/m; thickness = 0.76 mm; thickness copper plating = 35 m
See Table 9 for a list of components.
Fig 12. Component layout for class-AB production test circuit
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
8 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
8. Package outline
Flanged balanced ceramic package; 2 mounting holes; 4 leads
SOT539A
D
A
F
D
1
U
1
B
q
C
w
H
1
M
M
C
2
c
1
2
4
E
p
E
H
U
1
2
5
w
M
M
M
B
A
1
L
3
A
w
b
M
3
Q
e
0
5
10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
c
A
b
D
D
e
E
E
F
H
H
L
p
Q
q
U
U
w
w
w
UNIT
1
1
1
1
2
1
2
3
11.81
11.56
3.30 2.26
3.05 2.01
4.7
4.2
31.55 31.52
30.94 30.96
9.50 9.53 1.75 17.12 25.53 3.48
9.30 9.27 1.50 16.10 25.27 2.97
41.28 10.29
41.02 10.03
0.18
0.10
35.56
1.400
0.25 0.51 0.25
0.010 0.020 0.010
mm
13.72
0.465
0.455
0.130 0.089
0.120 0.079
0.185
0.165
1.242 1.241
1.218 1.219
0.374 0.375 0.069 0.674 1.005 0.137
0.366 0.365 0.059 0.634 0.995 0.117
1.625 0.405
1.615 0.395
0.007
0.004
0.540
inches
Note
1. millimeter dimensions are derived from the original inch dimensions.
2. recommended screw pitch dimension of 1.52 inch (38.6 mm) based on M3 screw.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
10-02-02
12-05-02
SOT539A
Fig 13. Package outline SOT539A
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
9 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
Earless flanged balanced ceramic package; 4 leads
SOT539B
D
A
F
5
D
1
D
U
H
1
c
w
2
D
1
1
2
E
1
U
E
H
2
L
3
4
b
w
3
Q
e
0
5
10 mm
scale
Dimensions
(1)
Unit
A
b
c
D
D
1
E
E
e
F
H
H
L
Q
U
1
U
2
w
2
w
3
1
1
max 4.7 11.81 0.18 31.55 31.52 9.5
mm nom
min 4.2 11.56 0.10 30.94 30.96 9.3
9.53
1.75 17.12 25.53 3.48 2.26 32.39 10.29
13.72
0.54
0.25 0.25
0.01 0.01
9.27
1.50 16.10 25.27 2.97 2.01 32.13 10.03
0.069 0.674 1.005 0.137 0.089 1.275 0.405
max 0.185 0.465 0.007 1.242 1.241 0.374 0.375
inches nom
min 0.165 0.455 0.004 1.218 1.219 0.366 0.365
0.059 0.634 0.995 0.117 0.079 1.265 0.395
Note
1. millimeter dimensions are derived from the original inch dimensions.
sot539b_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
12-05-02
13-05-24
SOT539B
Fig 14. Package outline SOT539B
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
10 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
9. Handling information
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
10. Abbreviations
Table 10. Abbreviations
Acronym
3GPP
Description
Third Generation Partnership Project
Complementary Cumulative Distribution Function
Continuous Wave
CCDF
CW
DPCH
ESD
Dedicated Physical CHannel
ElectroStatic Discharge
LDMOS
LDMOST
PAR
Laterally Diffused Metal-Oxide Semiconductor
Laterally Diffused Metal-Oxide Semiconductor Transistor
Peak-to-Average power Ratio
VSWR
W-CDMA
Voltage Standing Wave Ratio
Wideband Code Division Multiple Access
BLF7G20L-250P_7G20LS-250P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
11 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
11. Revision history
Table 11. Revision history
Document ID
Release
date
Data sheet status
Change Supersedes
notice
BLF7G20L-250P_7G20LS-250P v.4 20130712 Product data sheet
-
BLF7G20L-250P_7G20LS-250P v.3
Modifications:
• The package outline Figure 14 is updated.
• Translation disclaimer added to the legal text.
BLF7G20L-250P_7G20LS-250P v.3 20110103 Product data sheet
-
BLF7G20L-250P_7G20LS-250P v.2
Modifications:
• Data sheet status changed from Preliminary sheet to Product data sheet
• Table 1 on page 1: PDPCH has been changed to DPCH
• Section 1.1 on page 1: caution about ESD has been moved to Section 9 on
page 11
• Table 4 on page 2: ID value has been added.
• Table 7 on page 3: PDPCH has been changed to DPCH
• Section 7.2 on page 4: section has been added
• Figure 5 on page 5: redundant conditions about frequency have been removed
• Table 9 on page 8: title of table has been changed
• Table 9 on page 8: redundant information has been removed
• Section 9 on page 11: section has been added.
BLF7G20L-250P_7G20LS-250P v.2 20100909 Preliminary data sheet -
BLF7G20L-250P_7G20LS-250P v.1
BLF7G20L-250P_7G20LS-250P v.1 20091216 Objective data sheet
-
-
BLF7G20L-250P_7G20LS-250P
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
12 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
12.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
BLF7G20L-250P_7G20LS-250P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
13 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
BLF7G20L-250P_7G20LS-250P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 12 July 2013
14 of 15
BLF7G20L-250P; BLF7G20LS-250P
NXP Semiconductors
Power LDMOS transistor
14. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits. . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
2
3
4
5
6
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics . . . . . . . . . . . . . . . . . . 3
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 3
Ruggedness in class-AB operation . . . . . . . . . 3
Impedance information. . . . . . . . . . . . . . . . . . . 4
Single carrier W-CDMA . . . . . . . . . . . . . . . . . . 5
One tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2-carrier WCDMA characteristics . . . . . . . . . . . 7
Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7.1
7.2
7.3
7.4
7.5
7.6
8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Handling information. . . . . . . . . . . . . . . . . . . . 11
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
9
10
11
12
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
12.1
12.2
12.3
12.4
13
14
Contact information. . . . . . . . . . . . . . . . . . . . . 14
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 July 2013
Document identifier: BLF7G20L-250P_7G20LS-250P
相关型号:
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