BSH202,215 [NXP]

BSH202 - P-channel vertical D-MOS logic level FET TO-236 3-Pin;


型号：	BSH202,215
厂家：	NXP
描述：	BSH202 - P-channel vertical D-MOS logic level FET TO-236 3-Pin
文件：	总7页 (文件大小：106K)
中文：	中文翻译
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Philips Semiconductors

Product specification

P-channel enhancement mode

MOS transistor

BSH202

FEATURES

SYMBOL

QUICK REFERENCE DATA

• Low threshold voltage

• Fast switching

V_DS= -30 V

• Logic level compatible

• Subminiature surface mount

package

I_D= -0.52 A

_DS(ON)≤ 0.9 Ω (V_GS= -10 V)

GENERAL DESCRIPTION

PINNING

SOT23

P-channel, enhancement mode,

logic level, field-effect power

transistor. This device has low

threshold voltage and extremely

fast switching making it ideal for

battery powered applications and

high speed digital interfacing.

DESCRIPTION

gate

Top view

source

drain

The BSH202 is supplied in the

SOT23

subminiature

surface

mounting package.

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DS

V_DGR

V_GS

I_D

Drain-source voltage

-30

± 20

-0.52

-0.33

-2.1

0.417

0.17

150

Drain-gate voltage

Gate-source voltage

Drain current (DC)

R_GS= 20 kΩ

T_a= 25 ˚C

T_a= 100 ˚C

T_a= 25 ˚C

T_a= 100 ˚C

I_DM

P_tot

Drain current (pulse peak value)

Total power dissipation

˚C

T_stg, T_j

Storage & operating temperature

- 55

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

TYP.

MAX.

UNIT

R_{th j-a}

Thermal resistance junction to

ambient

FR4 board, minimum

footprint

300

K/W

August 1998

Rev 1.000

Philips Semiconductors

Product specification

P-channel enhancement mode

MOS transistor

BSH202

ELECTRICAL CHARACTERISTICS

T_j= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

V_(BR)DSS

V_GS(TO)

R_DS(ON)

Drain-source breakdown

voltage

Gate threshold voltage

V_GS= 0 V; I_D= -10 µA

-30

V_DS= V_GS; I_D= -1 mA

-1

-0.4

-1.9

0.63

0.89 1.35

0.95 1.35

0.7

±10 ±100

-50

-0.4

Ω

T_j= 150˚C

Drain-source on-state

resistance

V_GS= -10 V; I_D= -280 mA

V_GS= -4.5 V; I_D= -140 mA

0.9

V_GS= -10 V; I_D= -280 mA; T_j= 150˚C

g_fs

I_GSS

I_DSS

Forward transconductance

Gate source leakage current V_GS= ±20 V; V_DS= 0 V

Zero gate voltage drain

current

V_DS= -24 V; I_D= -280 mA

0.2

µA

V_DS= -24 V; V_GS= 0 V;

-100

-10

Q_g(tot)

Q_gs

Q_gd

Total gate charge

Gate-source charge

Gate-drain (Miller) charge

I_D= -0.3 A; V_DD= -15 V; V_GS= -10 V

2.9

0.4

0.5

t_{d on}

t_r

t_{d off}

t_f

Turn-on delay time

Turn-on rise time

Turn-off delay time

Turn-off fall time

V_DD= -15 V; I_D= -0.5 A;

V_GS= -10 V; R_G= 6 Ω

Resistive load

4.5

C_iss

C_oss

C_rss

Input capacitance

Output capacitance

Feedback capacitance

V_GS= 0 V; V_DS= -24 V; f = 1 MHz

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

T_j= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

I_DR

Continuous reverse drain

current

T_a= 25 ˚C

-0.56

I_DRM

V_SD

Pulsed reverse drain current

Diode forward voltage

-2.2

-1.3

I_F= -0.5 A; V_GS= 0 V

-0.87

t_rr

Q_rr

Reverse recovery time

Reverse recovery charge

I_F= -0.5 A; -dI_F/dt = 100 A/µs;

V_GS= 0 V; V_R= -24 V

August 1998

Rev 1.000

Philips Semiconductors

Product specification

P-channel enhancement mode

MOS transistor

BSH202

Normalised Power Dissipation, PD (%)

120

Peak Pulsed Drain Current, IDM (A)

D = 0.5

1000

100

0.2

0.1

0.05

0.02

single pulse

D = tp/T

0.1

100

125

150

1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01

Pulse width, tp (s)

Ambient Temperature, Ta (C)

Fig.1. Normalised power dissipation.

PD% = 100 P_D/P_{D 25 ˚C}= f(T_a)

Fig.4. Transient thermal impedance.

Z_{th j-a}= f(t); parameter D = t_p/T

BSH202

-3.5 V

Drain current, ID (A)

Tj = 25 C

Normalised Drain Current, ID (%)

-1.4

-1.2

-1

120

100

-4.5 V

VGS = -10 V

-3.3 V

-3.1 V

-0.8

-0.6

-0.4

-0.2

-2.9 V

-2.7 V

-2.5 V

100

125

150

-0.5

-1

-1.5

-2

Ambient Temperature, Ta (C)

Drain-Source Voltage, VDS (V)

Fig.2. Normalised continuous drain current.

ID% = 100 I_D/I_{D 25 ˚C}= f(T_a); conditions: V_GS≤ -10 V

Fig.5. Typical output characteristics, T_j= 25 ˚C.

I_D= f(V_DS); parameter V_GS

BSH202

Tj = 25 C

Drain-Source On Resistance, RDS(on) (Ohms)

2.8

2.6

2.4

2.2

1.8

1.6

1.4

1.2

BSH202

tp = 10us

Peak Pulsed Drain Current, IDM (A)

RDS(on) = VDS/ ID

-2.5 V

-2.9 V

-2.7 V

-3.1 V

-3.3 V

100 us

1 ms

-3.5 V

10 ms

0.1

100 ms

-4.5 V

d.c.

VGS = -10 V

0.8

0.6

0.4

0.2

0.01

0.001

0.1

100

-0.2

-0.4

-0.6

-0.8

-1

-1.2

-1.4

Drain Current, ID (A)

Drain-Source Voltage, VDS (V)

Fig.3. Safe operating area. T_a= 25 ˚C

I_D& I_DM= f(V_DS); I_DMsingle pulse; parameter t_p

Fig.6. Typical on-state resistance, T_j= 25 ˚C.

R_DS(ON)= f(I_D); parameter V_GS

August 1998

Rev 1.000

Philips Semiconductors

Product specification

P-channel enhancement mode

MOS transistor

BSH202

Drain Current, ID (A)

-2

BSH202

Threshold Voltage, VGS(to), (V)

1.8

1.6

1.4

1.2

-1.8

-1.6

-1.4

-1.2

-1

VDS > ID X RDS(on)

typical

Tj = 25 C

150 C

minimum

0.8

0.6

0.4

0.2

-0.8

-0.6

-0.4

-0.2

100

125

150

-0.5 -1 -1.5 -2 -2.5 -3 -3.5 -4 -4.5 -5 -5.5

Gate-Source Voltage, VGS (V)

Junction Temperature, Tj (C)

Fig.7. Typical transfer characteristics.

I_D= f(V_GS)

Fig.10. Gate threshold voltage.

_GS(TO)= f(T_j); conditions: I_D= 1 mA; V_DS= V_GS

Transconductance, gfs (S)

BSH202

150 C

BSH202

Drain Current, ID (A)

1.4

1.2

1E-01

1E-02

1E-03

1E-04

1E-05

1E-06

1E-07

VDS > ID X RDS(on)

VDS = -5 V

Tj = 25 C

0.8

0.6

0.4

0.2

-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 -1.1 -1.2 -1.3 -1.4

Drain Current, ID (A)

-2.5

-2

-1.5

-1

Gate-Source Voltage, VGS (V)

Fig.8. Typical transconductance, T_j= 25 ˚C.

g_fs= f(I_D)

Fig.11. Sub-threshold drain current.

I_D= f(V_GS); conditions: T_j= 25 ˚C

BSH202

Capacitances, Ciss, Coss, Crss (pF)

Normalised Drain-Source On Resistance

1000

100

1.9

1.8

1.7

1.6

1.5

1.4

1.3

1.2

1.1

RDS(ON) @ Tj

RDS(ON) @ 25C

VGS = -10 V

Ciss

-4.5 V

Coss

0.9

0.8

0.7

0.6

0.5

Crss

100

125

150

-0.1

-1.0

-10.0

-100.0

Junction Temperature, Tj (C)

Drain-Source Voltage, VDS (V)

Fig.9. Normalised drain-source on-state resistance.

R_DS(ON)/R_{DS(ON)25 ˚C}= f(T_j)

Fig.12. Typical capacitances, C_iss, C_oss, C_rss.

C = f(V_DS); conditions: V_GS= 0 V; f = 1 MHz

August 1998

Rev 1.000

Philips Semiconductors

Product specification

P-channel enhancement mode

MOS transistor

BSH202

Gate-source voltage, VGS (V)

BSH202

Source-Drain Diode Current, IF (A)

-14

-12

-10

-8

3.5

VDD = 15 V

RD = 50 Ohms

Tj = 25 C

2.5

150 C

-6

1.5

Tj = 25 C

-4

0.5

-2

0.5

1.5

Drain-Source Voltage, VSDS (V)

Gate charge, (nC)

Fig.13. Typical turn-on gate-charge characteristics.

V_GS= f(Q_G)

Fig.14. Typical reverse diode current.

I_F= f(V_SDS); conditions: V_GS= 0 V; parameter T_j

August 1998

Rev 1.000

Philips Semiconductors

Product specification

P-channel enhancement mode

MOS transistor

BSH202

MECHANICAL DATA

Plastic surface mounted package; 3 leads

SOT23

w M

detail X

2 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT

max.

1.1

0.9

0.48

0.38

0.15

0.09

3.0

2.8

1.4

1.2

2.5

2.1

0.45

0.15

0.55

0.45

0.1

1.9

0.95

0.2

0.1

REFERENCES

JEDEC

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

EIAJ

97-02-28

SOT23

Fig.15. SOT23 surface mounting package.

Notes

1. This product is supplied in anti-static packaging. The gate-source input must be protected against static

discharge during transport or handling.

2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.

3. Epoxy meets UL94 V0 at 1/8".

August 1998

Rev 1.000

Philips Semiconductors

Product specification

P-channel enhancement mode

MOS transistor

BSH202

DEFINITIONS

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and

operation of the device at these or at any other conditions above those given in the Characteristics sections of

this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Philips Electronics N.V. 1998

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the

The information presented in this document does not form part of any quotation or contract, it is believed to be

accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any

consequence of its use. Publication thereof does not convey nor imply any license under patent or other

industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these

products can be reasonably expected to result in personal injury. Philips customers using or selling these products

for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting

from such improper use or sale.

August 1998

Rev 1.000

BSH202,215 [NXP]

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