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BSP126T/R [NXP]

TRANSISTOR 375 mA, 250 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, PLASTIC, SMD, SC-73, 4 PIN, FET General Purpose Small Signal;
BSP126T/R
型号： BSP126T/R
厂家： NXP    NXP
描述：

TRANSISTOR 375 mA, 250 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, PLASTIC, SMD, SC-73, 4 PIN, FET General Purpose Small Signal
文件： 总12页 (文件大小：67K)
中文：  中文翻译
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DISCRETE SEMICONDUCTORS  
DATA SHEET  
book, halfpage  
BSP126  
N-channel enhancement mode  
vertical D-MOS transistor  
Product specification  
2002 Feb 19  
Supersedes data of 1997 Jun 23  
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
FEATURES  
PINNING - SOT223  
PIN  
• Direct interface to C-MOS, TTL, etc.  
• High-speed switching  
DESCRIPTION  
1
2
3
4
gate  
• No secondary breakdown.  
drain  
source  
drain  
APPLICATIONS  
• Line current interruptor in telephone sets  
• Relay, high-speed and line transformer drivers.  
d
s
4
handbook, halfpage  
DESCRIPTION  
N-channel enhancement mode vertical D-MOS transistor  
in a miniature SOT223 package.  
g
1
2
3
MARKING  
Top view  
MAM054  
TYPE NUMBER  
BSP126  
MARKING CODE  
Fig.1 Simplified outline and symbol.  
BSP126  
QUICK REFERENCE DATA  
SYMBOL  
VDS  
PARAMETER  
drain-source voltage (DC)  
CONDITIONS  
TYP.  
MAX.  
250  
UNIT  
−
−
−
V
ID  
drain current (DC)  
375  
1.5  
5
mA  
W
Ω
Ptot  
total power dissipation  
Tamb ≤ 25 °C  
RDSon  
VGSth  
drain-source on-state resistance ID = 300 mA; VGS = 10 V  
gate-source threshold voltage ID = 1 mA; VDS = VGS  
2.8  
−
2
V
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
SYMBOL  
VDS  
VGSO  
ID  
PARAMETER  
drain-source voltage (DC)  
gate-source voltage (DC)  
drain current (DC)  
CONDITIONS  
MIN.  
MAX.  
UNIT  
−
250  
±20  
375  
1.3  
V
open drain  
−
V
−
mA  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
−
total power dissipation  
storage temperature  
junction temperature  
T
amb ≤ 25 °C; note 1  
−
1.5  
W
°C  
°C  
−55  
−
+150  
150  
Note  
1. Device mounted on a 40 × 40 × 1.5 mm epoxy printed-circuit board; mounting pad for the drain tab minimum 6 cm2.  
2002 Feb 19  
2
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
THERMAL CHARACTERISTICS  
SYMBOL  
Rth j-a  
Note  
PARAMETER  
thermal resistance from junction to ambient; note 1  
VALUE  
83.3  
UNIT  
K/W  
1. Device mounted on a 40 × 40 × 1.5 mm epoxy printed-circuit board; mounting pad for the drain tab minimum 6 cm2.  
CHARACTERISTICS  
Tj = 25 °C unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
ID = 10 µA; VGS = 0  
MIN. TYP. MAX. UNIT  
V(BR)DSS  
IGSS  
drain-source breakdown voltage  
gate-source leakage current  
gate-source threshold voltage  
drain-source on-state resistance  
250  
−
−
−
V
VGS = ±20 V; VDS = 0  
−
±100 nA  
VGSth  
ID = 1 mA; VDS = VGS  
0.8  
−
−
2
V
RDSon  
ID = 20 mA; VGS = 2.4 V  
ID = 300 mA; VGS = 10 V  
VDS = 200 V; VGS = 0  
−
7.5  
5
Ω
−
2.8  
−
Ω
IDSS  
Yfs  
drain-source leakage current  
transfer admittance  
−
1
µA  
mS  
pF  
pF  
pF  
ID = 300 mA; VDS = 25 V  
VDS = 25 V; VGS = 0; f = 1 MHz  
VDS = 25 V; VGS = 0; f = 1 MHz  
VDS = 25 V; VGS = 0; f = 1 MHz  
200  
−
600  
100  
21  
10  
−
Ciss  
Coss  
Crss  
input capacitance  
120  
30  
15  
output capacitance  
−
feedback capacitance  
−
Switching times (see Figs 2 and 3)  
ton  
turn-on time  
ID = 250 mA; VDD = 50 V;  
VGS = 0 to 10 V  
−
−
6
10  
60  
ns  
ns  
toff  
turn-off time  
ID = 250 mA; VDD = 50 V;  
47  
VGS = 10 to 0 V  
2002 Feb 19  
3
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
handbook, halfpage  
INPUT  
90 %  
V
= 50 V  
handbook, halfpage  
DD  
10 %  
90 %  
OUTPUT  
10 V  
0 V  
I
D
10 %  
50 Ω  
t
t
off  
on  
MBB691  
MBB692  
Fig.2 Switching times test circuit.  
Fig.3 Input and output waveforms.  
MBB693  
MGU569  
2
1.2  
handbook, halfpage  
(1)  
(2)  
(3)  
handbook, halfpage  
P
tot  
(W)  
I
D
(A)  
1.6  
(4)  
0.8  
1.2  
0.8  
(5)  
0.4  
(6)  
(7)  
0.4  
0
0
0
0
50  
100  
150  
200  
(°C)  
2
4
6
8
10  
(V)  
T
V
DS  
amb  
Tj = 25 °C.  
(1) VGS = 10 V.  
(2) VGS = 5 V.  
(3) VGS = 4 V.  
(4) VGS = 3.5 V.  
(5) VGS = 3 V.  
(6) VGS = 2.5 V.  
(7) VGS = 2 V.  
Fig.4 Power derating curve.  
Fig.5 Typical output characteristics.  
2002 Feb 19  
4
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
MGU570  
MGU571  
1.6  
20  
handbook, halfpage  
I
handbook, halfpage  
(1)  
D
R
(A)  
DSon  
(Ω)  
1.4  
(2)  
1.2  
1
15  
0.8  
0.6  
0.4  
0.2  
0
10  
5
(3)  
(4)  
(5)  
(6)  
0
10  
−1  
1
10  
0
2
4
6
8
V
10  
(V)  
I
(A)  
D
GS  
Tj = 25 °C.  
(1) VGS = 2.5 V.  
(2) VGS = 3 V.  
(3) VGS = 3.5 V.  
(4) VGS = 4 V.  
(5) VGS = 5 V.  
(6) VGS = 10 V.  
VDS = 10 V; Tj = 25 °C.  
Fig.7 Drain-source on-state resistance as a  
function of drain current; typical values.  
Fig.6 Typical transfer characteristics.  
MGU572  
250  
handbook, halfpage  
C
(pF)  
200  
150  
Ciss  
100  
50  
Coss  
Crss  
0
0
10  
20  
30  
V
(V)  
DS  
VGS = 0; f = 1 MHz; Tj = 25 °C.  
Fig.8 Input, output and feedback capacitance as  
functions of drain-source voltage; typical  
values.  
2002 Feb 19  
5
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
MGU573  
MGU574  
2
1.25  
handbook, halfpage  
handbook, halfpage  
k
k
(1)  
1
1.5  
(2)  
0.75  
0.5  
1
0.5  
0
0.25  
0
−50  
−50  
0
50  
100  
150  
0
50  
100  
150  
T (°C)  
T (°C)  
j
j
RDSon at Tj  
k =  
-----------------------------------------  
RDSon at 25 °C  
VGSth at Tj  
---------------------------------------  
VGSth at 25 °C  
k =  
Typical RDSon:  
(1) ID = 250 mA; VGS = 10 V.  
Typical VGSth at 1 mA.  
(2)  
ID = 20 mA; VGS = 2.4 V.  
Fig.9 Temperature coefficient of drain-source  
on-state resistance; typical values.  
Fig.10 Temperature coefficient of gate-source  
threshold voltage; typical values.  
2002 Feb 19  
6
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
PACKAGE OUTLINE  
Plastic surface mounted package; collector pad for good heat transfer; 4 leads  
SOT223  
D
B
E
A
X
c
y
H
v
M
A
E
b
1
4
Q
A
A
1
L
1
2
3
p
e
b
p
w
M
B
detail X  
1
e
0
2
4 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
UNIT  
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
1
E
1.8  
1.5  
0.10 0.80  
0.01 0.60  
3.1  
2.9  
0.32  
0.22  
6.7  
6.3  
3.7  
3.3  
7.3  
6.7  
1.1  
0.7  
0.95  
0.85  
mm  
4.6  
2.3  
0.2  
0.1  
0.1  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
97-02-28  
99-09-13  
SOT223  
SC-73  
2002 Feb 19  
7
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
DATA SHEET STATUS  
PRODUCT  
DATA SHEET STATUS(1)  
STATUS(2)  
DEFINITIONS  
Objective data  
Development This data sheet contains data from the objective specification for product  
development. Philips Semiconductors reserves the right to change the  
specification in any manner without notice.  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product.  
Product data  
Production  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in order  
to improve the design, manufacturing and supply. Changes will be  
communicated according to the Customer Product/Process Change  
Notification (CPCN) procedure SNW-SQ-650A.  
Notes  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was  
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.  
DEFINITIONS  
DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes, without notice, in the  
products, including circuits, standard cells, and/or  
software, described or contained herein in order to  
improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for  
the use of any of these products, conveys no licence or title  
under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that  
these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified.  
Application information  
Applications that are  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2002 Feb 19  
8
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
NOTES  
2002 Feb 19  
9
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
NOTES  
2002 Feb 19  
10  
Philips Semiconductors  
Product specification  
N-channel enhancement mode  
vertical D-MOS transistor  
BSP126  
NOTES  
2002 Feb 19  
11  
Philips Semiconductors – a worldwide company  
Contact information  
For additional information please visit http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.  
© Koninklijke Philips Electronics N.V. 2002  
SCA74  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
613510/03/pp12  
Date of release: 2002 Feb 19  
Document order number: 9397 750 09311  

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