BSP204 [NXP]
P-channel enhancement mode vertical D-MOS transistor; P沟道增强型垂直的D- MOS晶体管
| 型号： | BSP204 |
| 厂家： | 
NXP |
| 描述： | P-channel enhancement mode vertical D-MOS transistor |
| 文件： | 总12页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
BSP204; BSP204A
P-channel enhancement mode
vertical D-MOS transistor
April 1995
Product specification
File under Discrete Semiconductors, SC13b
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
FEATURES
QUICK REFERENCE DATA
• Direct interface to C-MOS, TTL,
etc.
SYMBOL
PARAMETER
CONDITIONS
MAX.
200
UNIT
−VDS
−ID
drain-source voltage
drain current
V
• High-speed switching
DC value
250
15
mA
• No secondary breakdown.
RDS(on)
drain-source
on-resistance
−ID = 200 mA
−VGS = 10 V
Ω
DESCRIPTION
VGS(th)
gate-source threshold
voltage
−ID = 1 mA
2.8
V
V
GS = VDS
P-channel enhancement mode
vertical D-MOS transistor in a TO-92
variant envelope, intended for use in
relay, high-speed and line
PIN CONFIGURATION
transformer drivers.
PINNING - TO-92 variant (BSP204)
d
s
handbook, halfpage
1
PIN
DESCRIPTION
2
3
1
2
3
gate
g
drain
source
MAM147
PINNING - TO-92 variant
(BSP204A)
PIN
DESCRIPTION
Fig.1 Simplified outline and symbol.
1
2
3
source
gate
drain
April 1995
2
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
drain-source voltage
CONDITIONS
MIN. MAX. UNIT
−VDS
±VGSO
−ID
−
200
20
V
gate-source voltage
drain current
−
V
DC value
−
250
600
1
mA
mA
W
−IDM
Ptot
drain current
peak value
−
total power dissipation
storage temperature range
junction temperature
up to Tamb = 25 °C (note 1)
−
Tstg
Tj
−65
−
150
150
°C
°C
Note
1. Device mounted on an epoxy printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead
minimum 10 mm x 10 mm.
THERMAL RESISTANCE
SYMBOL
Rth j-a
Note
PARAMETER
from junction to ambient (note 1)
VALUE
125
UNIT
K/W
1. Device mounted on an epoxy printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead
minimum 10 mm x 10 mm.
April 1995
3
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
−ID = 10 µA
GS = 0
MIN. TYP. MAX. UNIT
−V(BR)DSS
drain-source breakdown voltage
200
−
−
V
V
−IDSS
±IGSS
−VGS(th)
RDS(on)
| Yfs|
drain-source leakage current
gate-source leakage current
gate-source threshold voltage
drain-source on-resistance
transfer admittance
−VDS = 160 V
VGS = 0
−
−
1
µA
nA
V
±VGS = 20 V
VDS = 0
−
−
100
2.8
15
−
−ID = 1 mA
VGS = VDS
0.8
−
−
−ID = 200 mA
−VGS = 10 V
10
Ω
−ID = 200 mA
−VDS = 25 V
100 200
mS
pF
Ciss
input capacitance
−VDS = 25 V
−VGS = 0
f = 1 MHz
−
−
−
65
20
6
90
Coss
output capacitance
−VDS = 25 V
−VGS = 0
f = 1 MHz
30
15
pF
pF
Crss
feedback capacitance
−VDS = 25 V
−VGS = 0
f = 1 MHz
Switching times (see Figs 2 and 3)
ton
turn-on time
−ID = 250 mA
−VDD = 50 V
−VGS = 0 to 10 V
−
−
5
10
30
ns
ns
toff
turn-off time
−ID = 250 mA
−VDD = 50 V
20
−VGS = 0 to 10 V
April 1995
4
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
handbook, halfpage
V
= −50 V
DD
handbook, halfpage
INPUT
10 %
90 %
10 %
0 V
I
D
OUTPUT
−10 V
50 Ω
90 %
MBB689
t
t
off
on
MBB690
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
MRC238
MDA706
1.2
−1
handbook, halfpage
handbook, halfpage
V
= −10 V
−6 V
GS
I
D
(A)
P
tot
−0.8
(W)
0.8
−0.6
−0.4
−5 V
−4 V
0.4
−0.2
−3 V
−15
0
0
0
0
50
100
150
200
(°C)
−5
−10
−20
V
−25
(V)
T
amb
DS
Fig.4 Power derating curve.
Fig.5 Typical output characteristics; Tj = 25 °C.
April 1995
5
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
MDA707
MDA708
3
−10
−1
handbook, halfpage
handbook, halfpage
V
= −10 V
GS
I
D
−5 V
(A)
I
−0.8
D
(mA)
−4 V
−0.6
−0.4
2
−10
−0.2
0
−10
8
12
16
20
24
R
28
(Ω)
0
−2
−4
−6
−8
V
−10
(V)
DSon
GS
Fig.6 Typical transfer characteristic; −VDS = 10 V;
Tj = 25 °C.
Fig.7 Typical on-resistance as a function of drain
current; Tj = 25 °C.
MDA710
MDA734
2.5
160
handbook, halfpage
handbook, halfpage
C
k
(pF)
2
120
80
1.5
1
C
iss
40
0.5
0
C
oss
C
rss
0
−50
0
50
100
150
0
−5
−10
−15
−20
V
−25
(V)
T (°C)
j
DS
Fig.9 Temperature coefficient of drain-source
on-resistance;
RDS (on) at Tj
----------------------------------------------
;
Fig.8 Typical capacitances as a function of
drain-source voltage; VGS = 0; f = 1 MHz;
Tj = 25 °C.
k =
RDS (on) at 25 °C
typical RDS(on) at −200 mA/−10 V.
April 1995
6
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
MDA711
1.1
handbook, halfpage
k
1
0.9
0.8
0.7
−50
0
50
100
150
T (°C)
j
Fig.10 Temperature coefficient of gate-source
threshold voltage;
–VGS (th) at Tj
------------------------------------------------
k =
;
–VGS (th) at 25 °C
typical −VGS(th) at −1 mA.
April 1995
7
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
PACKAGE OUTLINE
Plastic single-ended leaded (through hole) package; 3 leads (on-circle)
SOT54 variant
c
L
2
E
d
A
L
b
1
2
e
1
e
D
3
b
1
L
1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
L
L
2
1
UNIT
mm
A
b
b
c
D
d
E
e
e
L
1
1
max
max
5.2
5.0
0.48
0.40
0.66
0.56
0.45
0.40
4.8
4.4
1.7
1.4
4.2
3.6
14.5
12.7
2.54
1.27
2.5
2.5
Notes
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
REFERENCES
OUTLINE
EUROPEAN
ISSUE DATE
PROJECTION
VERSION
IEC
JEDEC
EIAJ
97-04-14
SOT54 variant
TO-92
SC-43
April 1995
8
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995
9
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
NOTES
April 1995
10
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP204; BSP204A
NOTES
April 1995
11
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SCA54
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Date of release: April 1995
Document order number: 9397 750 02478
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