BT132-600D,412 [NXP]

BT132-600D;
BT132-600D,412
型号: BT132-600D,412
厂家: NXP    NXP
描述:

BT132-600D

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DISCRETE SEMICONDUCTORS  
D
ATA SHEET  
BT132 series D  
Triacs  
logic level  
Product specification  
January 1998  
NXP Semiconductors  
Product specification  
Triacs  
logic level  
BT132 series D  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
Glass passivated, sensitive gate  
triacs in a plastic envelope, intended  
for use in general purpose  
bidirectional switching and phase  
control applications. These devices  
are intended to be interfaced directly  
to microcontrollers, logic integrated  
circuits and other low power gate  
trigger circuits.  
SYMBOL PARAMETER  
MAX. MAX. UNIT  
BT132- 500D 600D  
Repetitive peak off-state voltages 500 600  
RMS on-state current  
Non-repetitive peak on-state current  
VDRM  
IT(RMS)  
ITSM  
V
A
A
1
16  
1
16  
PINNING - TO92  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
main terminal 2  
T2  
T1  
2
gate  
3
main terminal 1  
G
3
2 1  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134).  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
V
-500  
5001  
-600  
6001  
VDRM  
Repetitive peak off-state  
voltages  
-
-
IT(RMS)  
ITSM  
RMS on-state current  
Non-repetitive peak  
on-state current  
full sine wave; Tlead 51 ˚C  
full sine wave; Tj = 25 ˚C prior to  
surge  
1
A
t = 20 ms  
t = 16.7 ms  
t = 10 ms  
ITM = 1.5 A; IG = 0.2 A;  
dIG/dt = 0.2 A/μs  
T2+ G+  
-
-
-
16  
17.6  
1.28  
A
A
I2t  
dIT/dt  
I2t for fusing  
Repetitive rate of rise of  
on-state current after  
triggering  
A2s  
-
-
-
-
-
-
-
-
50  
50  
50  
10  
2
5
5
0.5  
150  
125  
A/μs  
A/μs  
A/μs  
A/μs  
A
V
W
W
˚C  
T2+ G-  
T2- G-  
T2- G+  
IGM  
Peak gate current  
Peak gate voltage  
Peak gate power  
Average gate power  
Storage temperature  
Operating junction  
temperature  
VGM  
PGM  
PG(AV)  
Tstg  
Tj  
over any 20 ms period  
-40  
-
˚C  
1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the triac may  
switch to the on-state. The rate of rise of current should not exceed 3 A/μs.  
January 1998  
1
Rev 1.000  
ꢁꢂꢃ Semiconductorsꢀ  
Product specification  
Triacs  
logic level  
BT132 series D  
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
Rth j-lead  
Rth j-a  
Thermal resistance  
junction to lead  
Thermal resistance  
junction to ambient  
full cycle  
half cycle  
pcb mounted;lead length = 4mm  
-
-
-
-
-
60  
80  
-
K/W  
K/W  
K/W  
150  
STATIC CHARACTERISTICS  
Tj = 25 ˚C unless otherwise stated  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
IGT  
Gate trigger current  
VD = 12 V; IT = 0.1 A  
T2+ G+  
-
-
-
-
2.0  
2.5  
2.5  
5.0  
5
5
5
10  
mA  
mA  
mA  
mA  
T2+ G-  
T2- G-  
T2- G+  
IL  
Latching current  
VD = 12 V; IGT = 0.1 A  
T2+ G+  
T2+ G-  
T2- G-  
T2- G+  
-
-
-
-
-
-
1.6  
4.5  
1.2  
2.2  
1.2  
1.4  
0.7  
0.4  
0.1  
10  
15  
10  
15  
mA  
mA  
mA  
mA  
mA  
V
V
V
mA  
IH  
VT  
VGT  
Holding current  
On-state voltage  
Gate trigger voltage  
VD = 12 V; IGT = 0.1 A  
IT = 5 A  
VD = 12 V; IT = 0.1 A  
10  
1.70  
1.5  
-
-
0.25  
-
VD = 400 V; IT = 0.1 A; Tj = 125 ˚C  
Off-state leakage current VD = VDRM(max); Tj = 125 ˚C  
ID  
0.5  
DYNAMIC CHARACTERISTICS  
Tj = 25 ˚C unless otherwise stated  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
dVD/dt  
tgt  
Critical rate of rise of  
off-state voltage  
Gate controlled turn-on  
time  
VDM = 67% VDRM(max); Tj = 125 ˚C;  
exponential waveform; RGK = 1 kΩ  
ITM = 6 A; VD = VDRM(max); IG = 0.1 A;  
dIG/dt = 5 A/μs  
-
-
5
2
-
-
V/μs  
μs  
January 1998  
2
Rev 1.000  
ꢁꢂꢃ Semiconductors  
Product specification  
Triacs  
logic level  
BT132 series D  
IT(RMS) / A  
Ptot / W  
1.4  
Tmb(max) / C  
=180  
41  
53  
65  
77  
89  
101  
1.2  
1
51 C  
1.2  
1
120  
90  
1
0.8  
0.6  
0.4  
0.2  
0
0.8  
0.6  
0.4  
0.2  
60  
30  
113  
125  
0
0
-50  
0
50  
100  
150  
0
0
0.2  
0.4  
0.6  
IT(RMS) / A  
0.8  
1
1.2  
Tmb / C  
Fig.1. Maximum on-state dissipation, Ptot, versus rms  
on-state current, IT(RMS), where α = conduction angle.  
Fig.4. Maximum permissible rms current IT(RMS) ,  
versus lead temperature Tlead.  
ITSM / A  
IT(RMS) / A  
1000  
3
2.5  
24  
1.5  
1
I
TSM  
time  
I
T
T
Tj initial = 25 C max  
100  
dIT/dt limit  
T2- G+ quadrant  
0.5  
10  
10us  
0
0.01  
100us  
1ms  
T / s  
10ms  
100ms  
0.1  
surge duration / s  
1
10  
Fig.2. Maximum permissible non-repetitive peak  
on-state current ITSM, versus pulse width tp, for  
sinusoidal currents, tp 20ms.  
Fig.5. Maximum permissible repetitive rms on-state  
current IT(RMS), versus surge duration, for sinusoidal  
currents, f = 50 Hz; Tlead 51˚C.  
VGT(Tj)  
VGT(25 C)  
ITSM / A  
20  
15  
10  
1.6  
1.4  
1.2  
1
I
TSM  
time  
I
T
T
Tj initial = 25 C max  
0.8  
0.6  
0.4  
5
0
10 100  
Number of cycles at 50Hz  
1000  
-50  
0
50  
Tj / C  
100  
150  
Fig.3. Maximum permissible non-repetitive peak  
on-state current ITSM, versus number of cycles, for  
sinusoidal currents, f = 50 Hz.  
Fig.6. Normalised gate trigger voltage  
VGT(Tj)/ VGT(25˚C), versus junction temperature Tj.  
January 1998  
3
Rev 1.000  
ꢁꢂꢃ Semiconductors  
Product specification  
Triacs  
logic level  
BT132 series D  
IGT(Tj)  
IGT(25 C)  
3
IT / A  
12  
10  
8
Tj = 125 C  
Tj = 25 C  
T2+ G+  
T2+ G-  
typ  
max  
2.5  
2
Vo = 1.27 V  
Rs = 0.091 ohms  
T2- G-  
T2- G+  
6
1.5  
1
4
2
0.5  
0
0
0
0.5  
1
1.5  
VT / V  
2
2.5  
3
-50  
0
50  
Tj / C  
100  
150  
Fig.7. Normalised gate trigger current  
IGT(Tj)/ IGT(25˚C), versus junction temperature Tj.  
Fig.10. Typical and maximum on-state characteristic.  
IL(Tj)  
IL(25 C)  
Zth j-sp (K/W)  
100  
10  
3
2.5  
2
unidirectional  
bidirectional  
1
1.5  
1
t
P
D
p
0.1  
0.01  
t
0.5  
0
10us  
0.1ms  
1ms  
10ms  
tp / s  
0.1s  
1s  
10s  
-50  
0
50  
Tj / C  
100  
150  
Fig.8. Normalised latching current IL(Tj)/ IL(25˚C),  
versus junction temperature Tj.  
Fig.11. Transient thermal impedance Zth j-lead, versus  
pulse width tp.  
dVD/dt (V/us)  
1000  
IH(Tj)  
IH(25C)  
3
2.5  
2
100  
10  
1
1.5  
1
0.5  
0
-50  
0
50  
Tj / C  
100  
150  
0
50  
100  
150  
Tj / C  
Fig.9. Normalised holding current IH(Tj)/ IH(25˚C),  
versus junction temperature Tj.  
Fig.12. Typical, critical rate of rise of off-state voltage,  
dVD/dt versus junction temperature Tj.  
January 1998  
4
Rev 1.000  
ꢁꢂꢃ Semiconductors  
ꢀꢀProduct specification  
Triacs  
logic level  
BT132 series D  
MECHANICAL DATA  
Dimensions in mm  
Net Mass: 0.2 g  
2.54  
0.66  
0.56  
1.6  
4.2 max  
4.8 max  
5.2 max  
12.7 min  
0.48  
0.40  
0.40  
min  
3 2 1  
Fig.13. TO92 Variant; plastic envelope.  
Notes  
1. Epoxy meets UL94 V0 at 1/8".  
January 1998  
5
Rev 1.000  
NXP Semiconductors  
Legal information  
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DOCUMENT  
STATUS(1)  
PRODUCT  
STATUS(2)  
DEFINITION  
Objective data sheet  
Development  
This document contains data from the objective specification for product  
development.  
Preliminary data sheet  
Product data sheet  
Qualification  
Production  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Notes  
1. Please consult the most recently issued document before initiating or completing a design.  
2. The product status of device(s) described in this document may have changed since this document was published  
and may differ in case of multiple devices. The latest product status information is available on the Internet at  
URL http://www.nxp.com.  
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