BUK127-50GT,115 [NXP]
BUK127-50GT - PowerMOS transistor Logic level TOPFET SC-73 4-Pin;
| 型号： | BUK127-50GT,115 |
| 厂家： | 
NXP |
| 描述： | BUK127-50GT - PowerMOS transistor Logic level TOPFET SC-73 4-Pin 驱动 光电二极管 接口集成电路 |
| 文件： | 总7页 (文件大小：46K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK127-50GT
DESCRIPTION
QUICK REFERENCE DATA
Monolithic temperature and
overload protected logic level power
MOSFET in TOPFET2 technology
assembled in a 3 pin surface mount
plastic package.
SYMBOL
PARAMETER
MAX.
50
UNIT
V
VDS
ID
Continuous drain source voltage
Continuous drain current
Total power dissipation
2.1
A
APPLICATIONS
PD
1.8
W
General purpose switch for driving
Tj
Continuous junction temperature
Drain-source on-state resistance
150
200
˚C
lamps
motors
RDS(ON)
mΩ
solenoids
heaters
in automotive systems and other
applications.
FEATURES
FUNCTIONAL BLOCK DIAGRAM
TrenchMOS output stage
Current trip protection
DRAIN
Overload protection
Overtemperature protection
Protection latched reset by input
5 V logic compatible input level
Control of output stage
and supply of overload
protection circuits
O / V
CLAMP
POWER
INPUT
MOSFET
RIG
derived from input
Low operating input current
permits direct drive by
micro-controller
LOGIC AND
PROTECTION
ESD protection on all pins
Overvoltage clamping for turn
off of inductive loads
SOURCE
Fig.1. Elements of the TOPFET.
PINNING - SOT223
PIN CONFIGURATION
SYMBOL
PIN
1
DESCRIPTION
4
D
S
TOPFET
input
drain
2
I
P
3
source
4
drain (tab)
2
3
1
December 2001
1
Rev 2.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK127-50GT
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
ID
ID
Continuous drain source voltage1
-
-
-
-
-
-
-
-
50
current trip
2.1
V
A
A
mA
mA
W
˚C
˚C
Drain current2
Continuous drain current
Continuous input current
Non-repetitive peak input current
Total power dissipation
Storage temperature
Ta = 25˚C
clamping
tp ≤ 1 ms
Ta = 25 ˚C
-
II
3
10
1.8
150
IIRM
PD
Tstg
Tj
-55
-
Continuous junction temperature
normal operation3
150
ESD LIMITING VALUE
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VC
Electrostatic discharge capacitor
voltage
Human body model;
C = 250 pF; R = 1.5 kΩ
-
2
kV
OVERVOLTAGE CLAMPING LIMITING VALUES
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
EDSM
Non-repetitive clamping energy
Ta ≤ 25 ˚C; IDM ≤ ID(TO)
;
-
100
mJ
inductive load
EDRM
Repetitive clamping energy
Tsp ≤ 125 ˚C; IDM = 1 A;
f = 250 Hz
-
5
mJ
OVERLOAD PROTECTION LIMITING VALUES
With the protection supply provided via the input pin, TOPFET can protect itself from short circuit loads.
Overload protection operates by means of drain current trip or by activating the overtemperature protection.
SYMBOL PARAMETER
REQUIRED CONDITION
MIN.
MAX.
UNIT
VDDP
Protected drain source supply voltage VIS ≥ 4 V
-
35
V
THERMAL CHARACTERISTICS
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Thermal resistance
Rth j-sp
Rth j-b
Rth j-a
Junction to solder point
Junction to board4
Junction to ambient
-
-
-
12
40
-
18
-
70
K/W
K/W
K/W
Mounted on any PCB
Mounted on PCB of fig. 4
1 Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
2 Refer to OVERLOAD PROTECTION CHARACTERISTICS.
3 Not in an overload condition with drain current limiting.
4 Temperature measured 1.3 mm from tab.
December 2001
2
Rev 2.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK127-50GT
OUTPUT CHARACTERISTICS
Limits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
Off-state
CONDITIONS
MIN. TYP. MAX. UNIT
VIS = 0 V
V(CL)DSS
Drain-source clamping voltage ID = 10 mA
ID = 200 mA; tp ≤ 300 µs; δ ≤ 0.01
VDS = 40 V
50
50
-
-
V
V
60
70
IDSS
Drain source leakage current
-
-
-
100
10
µA
µA
Tmb = 25 ˚C
VIS ≥ 4 V; tp ≤ 300 µs; δ ≤ 0.01
ID = 100 mA
0.1
On-state
RDS(ON)
Drain-source resistance
-
-
-
380
200
mΩ
mΩ
Tmb = 25 ˚C
150
INPUT CHARACTERISTICS
The supply for the logic and overload protection is taken from the input.
Limits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER
VIS(TO) Input threshold voltage
CONDITIONS
MIN. TYP. MAX. UNIT
VDS = 5 V; ID = 1 mA
0.6
1.1
-
2.4
2.1
V
V
Tmb = 25˚C
1.6
IIS
Input supply current
Input supply current
normal operation;
protection latched;
VIS = 5 V
VIS = 4 V
100
80
220
195
400
330
µA
µA
IISL
VIS = 5 V
VIS = 3 V
1.4
0.7
2
1.1
2.5
1.5
mA
mA
VISR
tlr
Protection reset voltage1
Latch reset time
reset time tr ≥ 100 µs
VIS1 = 5 V, VIS2 < 1 V
II = 1.5 mA
1.5
10
5.5
-
2
40
-
2.5
100
8.5
-
V
µs
V
V(CL)IS
RIG
Input clamping voltage
Input series resistance2
Tmb = 25˚C
2.5
kΩ
to gate of power MOSFET
OVERLOAD PROTECTION CHARACTERISTICS
TOPFET switches off to protect itself when one of the overload thresholds is exceeded. It remains latched off until
reset by the input.
SYMBOL PARAMETER
Overload protection
CONDITIONS
VIS = 4 V to 5.5 V
Tj = 25˚C
MIN. TYP. MAX. UNIT
ID(TO)
Drain current trip threshold
4
3
-
-
8
9
A
A
-40˚C ≤ Tj ≤ 150˚C
Overtemperature protection
Tj(TO)
Threshold junction temperature VIS = 4 V to 5.5 V
150
170
-
˚C
1 The input voltage below which the overload protection circuits will be reset.
2 Not directly measureable from device terminals.
December 2001
3
Rev 2.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK127-50GT
SWITCHING CHARACTERISTICS
Ta = 25 ˚C; resistive load RL = 50 Ω; adjust VDD to obtain ID = 250 mA; refer to test circuit and waveforms
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
td on
tr
td off
tf
Turn-on delay time
Rise time
VIS = 0 V to VIS = 5 V
-
-
-
-
0.5
0.7
3.2
1.6
0.9
1.5
6.5
3.5
µs
µs
µs
µs
Turn-off delay time
Fall time
VIS = 5 V to VIS = 0 V
REVERSE DIODE LIMITING VALUE
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
IS
Continuous forward current
Tmb ≤ 25 ˚C; VIS = 0 V
-
2
A
REVERSE DIODE CHARACTERISTICS
Limits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
VSDO
trr
Forward voltage
IS = 2 A; VIS = 0 V; tp = 300 µs
not applicable1
-
-
0.83
-
1.1
-
V
-
Reverse recovery time
1 The reverse diode of this type is not intended for applications requiring fast reverse recovery.
December 2001
4
Rev 2.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK127-50GT
MECHANICAL DATA
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
SOT223
D
B
E
A
X
c
y
H
v
M
A
E
b
1
4
Q
A
A
1
L
1
2
3
p
e
b
p
w
M
B
detail X
1
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
1
E
1.8
1.5
0.10 0.80
0.01 0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
7.3
6.7
1.1
0.7
0.95
0.85
mm
4.6
2.3
0.2
0.1
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
SC-73
97-02-28
99-09-13
SOT223
Fig.2. SOT223 surface mounting package1.
1 For further information, refer to surface mounting instructions for SOT223 envelope. Epoxy meets UL94 V0 at 1/8". Net Mass: 0.11 g
December 2001
5
Rev 2.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK127-50GT
MOUNTING INSTRUCTIONS
PRINTED CIRCUIT BOARD
Dimensions in mm.
Dimensions in mm.
3.8
36
min
1.5
min
18
60
4.5
4.6
9
2.3
6.3
1.5
min
10
(3x)
1.5
min
7
15
4.6
50
Fig.4. PCB for thermal resistance and power rating.
PCB: FR4 epoxy glass (1.6 mm thick),
copper laminate (35 µm thick).
Fig.3. Soldering pattern for surface mounting.
December 2001
6
Rev 2.000
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
BUK127-50GT
DEFINITIONS
DATA SHEET STATUS
DATA SHEET
STATUS1
PRODUCT
DEFINITIONS
STATUS2
Objective data
Development
This data sheet contains data from the objective specification for
product development. Philips Semiconductors reserves the right to
change the specification in any manner without notice
Preliminary data
Qualification
Production
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product
Product data
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in
order to improve the design, manufacturing and supply. Changes will
be communicated according to the Customer Product/Process
Change Notification (CPCN) procedure SNW-SQ-650A
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
1 Please consult the most recently issued datasheet before initiating or completing a design.
2 The product status of the device(s) described in this datasheet may have changed since this datasheet was published. The latest information is
available on the Internet at URL http://www.semiconductors.philips.com.
December 2001
7
Rev 2.000
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