BUK664R4-55C,118 [NXP]
BUK664R4-55C - N-channel TrenchMOS intermediate level FET D2PAK 3-Pin;
| 型号： | BUK664R4-55C,118 |
| 厂家： | 
NXP |
| 描述： | BUK664R4-55C - N-channel TrenchMOS intermediate level FET D2PAK 3-Pin |
| 文件： | 总16页 (文件大小：202K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BUK664R4-55C
AK
D2P
N-channel TrenchMOS intermediate level FET
Rev. 03 — 21 December 2010
Product data sheet
1. Product profile
1.1 General description
Intermediate level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Suitable for thermally demanding
environments due to 175 °C rating
Suitable for intermediate level gate
drive sources
1.3 Applications
12 V and 24 V automotive systems
Start-Stop micro-hybrid applications
Transmission control
Electric and electro-hydraulic power
steering
Ultra high performance power
Motors, lamps and solenoid control
switching
1.4 Quick reference data
Table 1.
Quick reference data
Conditions
Symbol Parameter
Min Typ Max Unit
VDS
ID
drain-source
voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
-
-
-
-
55
V
[1]
drain current
VGS = 10 V; Tmb = 25 °C;
see Figure 1
100
204
A
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
W
Static characteristics
RDSon drain-source
VGS = 5 V; ID = 15 A; Tj = 25 °C;
-
-
11.1 13
4.2 4.9
mΩ
mΩ
on-state resistance see Figure 13
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 14
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
Table 1.
Quick reference data …continued
Symbol Parameter
Conditions
Min Typ Max Unit
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
ID = 100 A; Vsup ≤ 55 V;
RGS = 50 Ω; VGS = 10 V;
Tj(init) = 25 °C
-
-
263 mJ
avalanche energy
Dynamic characteristics
QGD
gate-drain charge
ID = 25 A; VDS = 44 V; VGS = 10 V;
see Figure 18; see Figure 17
-
31.5
-
nC
[1] Continuous current is limited by package.
2. Pinning information
Table 2.
Pinning information
Symbol Description
Pin
1
Simplified outline
Graphic symbol
G
D
S
D
gate
mb
D
S
2
drain
3
source
G
mb
mounting base; connected to drain
mbb076
2
1
3
SOT404 (D2PAK)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
BUK664R4-55C
D2PAK
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
2 of 16
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
55
Unit
V
drain-source voltage
gate-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
[1]
[2]
[3]
VGS
DC
-16
16
V
pulsed
-20
20
V
ID
drain current
Tmb = 25 °C; VGS = 10 V; see Figure 1
Tmb = 100 °C; VGS = 10 V; see Figure 1
-
-
-
100
97
A
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
550
A
see Figure 3
Ptot
Tstg
Tj
total power dissipation
storage temperature
junction temperature
Tmb = 25 °C; see Figure 2
-
204
175
175
W
-55
-55
°C
°C
Source-drain diode
[3]
IS
source current
peak source current
Tmb = 25 °C
-
-
100
550
A
A
ISM
pulsed; tp ≤ 10 µs; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
ID = 100 A; Vsup ≤ 55 V; RGS = 50 Ω;
VGS = 10 V; Tj(init) = 25 °C
-
-
263
-
mJ
J
avalanche energy
[4][5][6]
EDS(AL)R
repetitive drain-source
avalanche energy
[1] -16 V accumulated duration not to exceed 168 hrs.
[2] Accumulated pulse duration not to exceed 5 mins.
[3] Continuous current is limited by package.
[4] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
[5] Repetitive avalanche rating limited by an average junction temperature of 170 °C.
[6] Refer to application note AN10273 for further information.
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
3 of 16
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
03aa16
003aae850
120
200
ID
P
(%)
(A)
der
150
80
100
(1)
40
50
0
0
0
50
100
150
200
0
50
100
150
200
T
mb (°C)
T
mb
(°C)
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aae707
104
ID
(A)
103
Limit RDSon = VDS / ID
tp = 10 μs
100 μs
102
10
1 ms
DC
10 ms
1
100 ms
10-1
10-1
1
10
102
V DS (V)
Tmb = 25 °C; IDM is a single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
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NXP Semiconductors
N-channel TrenchMOS intermediate level FET
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from junction to
mounting base
see Figure 4
-
-
0.74
K/W
003aae531
1
Z
δ = 0.5
th(j-mb)
(K/W)
0.2
−1
0.1
10
0.05
0.02
t
p
P
δ =
−2
10
T
single shot
t
t
p
T
t
−3
10
−6
−5
−4
−3
−2
−1
10
10
10
10
10
10
1
(s)
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
5 of 16
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
55
27
50
1.8
-
-
V
V
V
V
-
-
ID = 250 µA; VGS = 0 V; Tj = -55 °C
-
-
VGS(th)
gate-source threshold voltage
gate-source threshold voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 9; see Figure 10
2.3
2.8
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 11
0.5
1.1
-
-
-
V
V
V
V
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 11; see Figure 12
1.5
2
VGSth
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
-
-
3.3
-
ID = 2.5 mA; VDS = VGS; Tj = 175 °C;
see Figure 10
0.8
IDSS
drain leakage current
gate leakage current
VDS = 55 V; VGS = 0 V; Tj = 25 °C
VDS = 30 V; VGS = 0 V; Tj = 175 °C
VDS = 55 V; VGS = 0 V; Tj = 175 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = -15 V; VDS = 0 V; Tj = 25 °C
-
-
-
-
-
-
-
-
1
µA
µA
µA
nA
nA
nA
mΩ
-
500
500
100
100
100
13
-
IGSS
2
2
2
RDSon
drain-source on-state resistance VGS = 5 V; ID = 15 A; Tj = 25 °C;
see Figure 13
11.1
VGS = 4.5 V; ID = 15 A; Tj = 25 °C;
see Figure 13
-
-
-
-
-
-
11.4
4.2
5.2
5.7
10
12
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
VGS = 10 V; ID = 25 A; Tj = 25 °C;
4.9
6.6
7.7
11.7
10.8
see Figure 14
VGS = 5 V; ID = 25 A; Tj = 25 °C;
see Figure 14
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
see Figure 14
VGS = 10 V; ID = 15 A; Tj = 25 °C;
see Figure 13
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 15; see Figure 14
-
Dynamic characteristics
QG(tot)
total gate charge
ID = 45 A; VDS = 15 V; VGS = 4.5 V;
Tj = 25 °C; see Figure 16;
see Figure 17
-
5.9
-
C
ID = 25 A; VDS = 44 V; VGS = 5 V;
see Figure 18; see Figure 17
-
-
67
-
-
nC
nC
ID = 25 A; VDS = 44 V; VGS = 10 V;
see Figure 17; see Figure 18
124
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
6 of 16
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NXP Semiconductors
N-channel TrenchMOS intermediate level FET
Table 6.
Symbol
QGS
QGD
Ciss
Characteristics …continued
Parameter
Conditions
Min
Typ
19
Max
Unit
nC
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
ID = 25 A; VDS = 44 V; VGS = 10 V;
see Figure 18; see Figure 17
-
-
-
-
-
-
-
-
-
-
-
-
31.5
nC
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 19
5800 7750 pF
Coss
Crss
td(on)
tr
550
380
25
660
pF
pF
ns
ns
ns
ns
nH
520
VDS = 45 V; RL = 1.8 Ω; VGS = 10 V;
RG(ext) = 10 Ω
-
-
-
-
-
65
td(off)
tf
turn-off delay time
fall time
252
116
7.5
LD
internal drain inductance
from source lead to source bond
pad ; Tj = 25 °C
LS
internal source inductance
from upper edge of drain mounting
base to centre of die ; Tj = 25 °C
-
-
3.5
-
nH
V
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 20
0.83
1.2
trr
reverse recovery time
recovered charge
IS = 20 A; dIS/dt = -100 A/µs;
VGS = 0 V; VDS = 25 V
-
-
55
-
-
ns
Qr
112
nC
003aae708
003aae852
160
fs
250
ID
(A)
VGS (V) = 10
6.0
5.0
g
(S)
4.5
200
120
150
100
50
80
40
0
4.0
3.8
3.6
3.4
3.2
0
0
20
40
60
80
0
0.5
1
1.5
2
V
DS (V)
I
D
(A)
Tj = 25°C; VDS = 25 V
Fig 5. Forward transconductance as a function of
drain current; typical values
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
7 of 16
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
003aae854
003aae857
160
20
RDSon
(mΩ)
ID
(A)
120
80
15
10
5
40
Tj = 175 °C
Tj = 25 °C
0
0
0
1
2
3
4
5
0
5
10
15
20
V
GS (V)
VGS (V)
Fig 7. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 8. Drain-source on-state resistance as a function
of gate-source voltage; typical values
003aad806
003aae542
10-1
4
ID
(A)
VGS(th)
(V)
10-2
3
2
1
0
max @1mA
min
typ
max
10-3
10-4
10-5
10-6
typ @1mA
min @2.5mA
0
1
2
3
4
-60
0
60
120
180
VGS (V)
Tj (°C)
Fig 9. Sub-threshold drain current as a function of
gate-source voltage
Fig 10. Gate-source threshold voltage as a function of
junction temperature
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
8 of 16
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
003aac337
003aab271
10-1
3
ID
(A)
10-2
VGS(th)
(V)
max
2
min
typ
max
10-3
10-4
10-5
10-6
typ
min
1
0
-60
0
1
2
V
GS (V)
3
0
60
120
180
Tj (°C)
Fig 11. Gate-source threshold voltage as a function of
junction temperature
Fig 12. Sub-threshold drain current as a function of
gate-source voltage
003aaf017
003aae855
40
16
4.0
VGS (V) =
3.8
3.4
V
(V) = 3.5
3.6
RDSon
(mΩ)
3.2
3.0
GS
R
(mΩ)
DSon
30
20
10
0
12
8
4.5
5.0
6.0
3.8
4.0
4.5
4
10.0
10.0
0
0
20
40
60
0
50
100
150
200
I
(A)
D
ID (A)
Fig 13. Drain-source on-state resistance as a function
of drain current; typical values
Fig 14. Drain-source on-state resistance as a function
of drain current; typical values
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
9 of 16
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
003aad803
003aaf019
2.5
a
10
V
GS
(V)
15V
2
1.5
1
8
6
4
2
0
24V
V
= 6V
DS
0.5
0
-60
0
60
120
180
0
10
20
30
40
(nC)
Q
G
Tj (°C)
Fig 15. Normalized drain-source on-state resistance
factor as a function of junction temperature
Fig 16. Gate-source voltage as a function of gate
charge; typical values
003aae713
10
V
DS
V
GS
(V)
I
D
8
6
4
2
0
V
GS(pl)
V
DS
= 14 V
V
GS(th)
V
DS
= 44 V
V
GS
Q
Q
GS1
GS2
Q
Q
GD
GS
Q
G(tot)
003aaa508
0
50
100
150
Q
G
(nC)
Tj = 25°C; ID = 25 A
Fig 17. Gate charge waveform definitions
Fig 18. Gate-source voltage as a function of gate
charge; typical values
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
10 of 16
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
003aae716
003aae714
5
160
10
I
S
C
(pF)
(A)
120
4
10
C
C
iss
80
40
0
3
10
T = 175 °C
T = 25 °C
j
j
oss
C
rss
2
10
−2
−1
2
10
10
1
10
10
0
0.4
0.8
1.2
V (V)
SD
V
(V)
DS
VGS = 0 V; f = 1 MHz
VGS = 0 V
Fig 19. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
Fig 20. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
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NXP Semiconductors
N-channel TrenchMOS intermediate level FET
7. Package outline
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
SOT404
A
A
E
1
mounting
base
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
D
E
A
A
b
UNIT
c
D
e
L
H
Q
1
1
p
D
max.
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
1.60
1.20
10.30
9.70
2.90 15.80 2.60
2.10 14.80 2.20
mm
11
2.54
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
05-02-11
06-03-16
SOT404
Fig 21. Package outline SOT404 (D2PAK)
BUK664R4-55C
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© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
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NXP Semiconductors
N-channel TrenchMOS intermediate level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BUK664R4-55C v.3
Modifications:
20101221
Product data sheet
-
BUK664R4-55C v.2
• Status changed from objective to product.
• Various changes to content.
BUK664R4-55C v.2
20100923
Objective data sheet
-
BUK664R4-55C v.1
BUK664R4-55C
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Product data sheet
Rev. 03 — 21 December 2010
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NXP Semiconductors
N-channel TrenchMOS intermediate level FET
9. Legal information
9.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Suitability for use in automotive applications — This NXP
9.2 Definitions
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
suitable for use in medical, military, aircraft, space or life support equipment,
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. NXP Semiconductors accepts no
liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
9.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
BUK664R4-55C
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
14 of 16
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
BUK664R4-55C
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 21 December 2010
15 of 16
BUK664R4-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .12
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .13
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .14
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .15
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 21 December 2010
Document identifier: BUK664R4-55C
相关型号：
BUK6C1R5-40C
TRANSISTOR 319 A, 40 V, 0.0021 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, D2PAK-7, FET General Purpose Power
NXP
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