BUK765R0-100E [NXP]

N-channel TrenchMOS standard level FET; N沟道的TrenchMOS标准水平FET
BUK765R0-100E
型号: BUK765R0-100E
厂家: NXP    NXP
描述:

N-channel TrenchMOS standard level FET
N沟道的TrenchMOS标准水平FET

文件: 总14页 (文件大小:236K)
中文:  中文翻译
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BUK765R0-100E  
AK  
D2P  
N-channel TrenchMOS standard level FET  
Rev. 2 — 16 May 2012  
Product data sheet  
1. Product profile  
1.1 General description  
Standard level N-channel MOSFET in a SOT404 package using TrenchMOS technology.  
This product has been designed and qualified to AEC Q101 standard for use in high  
performance automotive applications.  
1.2 Features and benefits  
AEC Q101 compliant  
Suitable for thermally demanding  
environments due to 175 °C rating  
Repetitive avalanche rated  
True standard level gate with VGS(th)  
rating of greater than 1V at 175 °C  
1.3 Applications  
12V, 24V and 48V Automotive  
Start-Stop micro-hybrid applications  
Transmission control  
systems  
Electric and electro-hydraulic power  
Ultra high performance power  
steering  
switching  
Motors, lamps and solenoid control  
1.4 Quick reference data  
Table 1.  
Symbol  
VDS  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
100  
120  
357  
Unit  
V
drain-source voltage  
drain current  
Tj 25 °C; Tj 175 °C  
VGS = 10 V; Tmb = 25 °C; see Figure 1  
-
-
-
-
-
-
[1]  
ID  
A
Ptot  
total power dissipation Tmb = 25 °C; see Figure 2  
W
Static characteristics  
RDSon drain-source on-state  
resistance  
Dynamic characteristics  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
see Figure 11  
-
-
3.9  
65  
5
-
mΩ  
QGD  
gate-drain charge  
VGS = 10 V; ID = 25 A; VDS = 80 V;  
nC  
Tj = 25 °C; see Figure 13; see Figure 14  
[1] Continuous current is limited by package.  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
2. Pinning information  
Table 2.  
Pinning information  
Symbol Description  
Pin  
1
Simplified outline  
Graphic symbol  
G
D
S
D
gate  
mb  
D
2
drain  
source  
3
G
mb  
mounting base;  
connected to drain  
mbb076  
S
2
1
3
SOT404 (D2PAK)  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
BUK765R0-100E  
D2PAK  
plastic single-ended surface-mounted package (D2PAK);  
3 leads (one lead cropped)  
SOT404  
4. Marking  
Table 4.  
Marking codes  
Type number  
BUK765R0-100E  
Marking code  
BUK765R0-100E  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
2 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
5. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
100  
100  
20  
Unit  
V
drain-source voltage  
drain-gate voltage  
gate-source voltage  
drain current  
Tj 25 °C; Tj 175 °C  
RGS = 20 kΩ  
-
VDGR  
VGS  
-
V
-20  
V
[1]  
ID  
Tmb = 25 °C; VGS = 10 V; see Figure 1  
Tmb = 100 °C; VGS = 10 V; see Figure 1  
-
-
-
120  
115  
650  
A
A
IDM  
peak drain current  
Tmb = 25 °C; pulsed; tp 10 µs;  
A
see Figure 4  
Ptot  
Tstg  
Tj  
total power dissipation  
storage temperature  
junction temperature  
Tmb = 25 °C; see Figure 2  
-
357  
175  
175  
W
-55  
-55  
°C  
°C  
Source-drain diode  
[1]  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
120  
650  
A
A
ISM  
pulsed; tp 10 µs; Tmb = 25 °C  
Avalanche ruggedness  
EDS(AL)S non-repetitive drain-source  
avalanche energy  
[2][3]  
ID = 120 A; Vsup 100 V; RGS = 50 ;  
VGS = 10 V; Tj(init) = 25 °C; unclamped;  
see Figure 3  
-
385  
mJ  
[1] Continuous current is limited by package.  
[2] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.  
[3] Refer to application note AN10273 for further information.  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
3 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
03aa16  
003aaf632  
120  
200  
ID  
(A)  
160  
P
(%)  
der  
80  
120  
(1)  
80  
40  
0
40  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
Tmb ( C)  
°
T
(°C)  
mb  
Fig 1. Continuous drain current as a function of  
mounting base temperature  
Fig 2. Normalized total power dissipation as a  
function of mounting base temperature  
003aah029  
103  
IAL  
(A)  
102  
(1)  
10  
(2)  
(3)  
1
10-1  
10-3  
10-2  
10-1  
1
10  
tAL (ms)  
Fig 3. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
4 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aaf633  
103  
Limit RDSon = VDS / ID  
ID  
(A)  
t =10  
p
s
μ
102  
100  
s
μ
10  
1
DC  
1 ms  
10 ms  
100 ms  
10-1  
10-1  
1
10  
102  
103  
VDS (V)  
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
6. Thermal characteristics  
Table 6.  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from  
junction to mounting base  
see Figure 5  
-
-
0.42  
K/W  
Rth(j-a)  
thermal resistance from  
junction to ambient  
minimum footprint; mounted on  
a printed-circuit board  
-
50  
-
K/W  
003aaf570  
1
Zth(j-mb)  
(K/W)  
= 0.5  
0.2  
0.1  
10-1  
10-2  
10-3  
0.05  
0.02  
tp  
T
P
t
tp  
single shot  
T
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
1
tp (s)  
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration.  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
5 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
7. Characteristics  
Table 7.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
100  
90  
-
-
V
V
V
-
-
VGS(th)  
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;  
2.4  
3
4
voltage  
see Figure 9; see Figure 10  
ID = 1 mA; VDS = VGS; Tj = 175 °C;  
see Figure 9  
1
-
-
-
-
V
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;  
see Figure 9  
4.5  
IDSS  
drain leakage current  
gate leakage current  
VDS = 100 V; VGS = 0 V; Tj = 25 °C  
VDS = 100 V; VGS = 0 V; Tj = 175 °C  
VGS = 20 V; VDS = 0 V; Tj = 25 °C  
VGS = -20 V; VDS = 0 V; Tj = 25 °C  
-
-
-
-
-
0.15  
-
2
µA  
µA  
nA  
nA  
mΩ  
500  
100  
100  
5
IGSS  
2
2
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
see Figure 11  
3.9  
VGS = 10 V; ID = 25 A; Tj = 175 °C;  
see Figure 11; see Figure 12  
-
-
13.5  
mΩ  
Dynamic characteristics  
QG(tot)  
QGS  
QGD  
Ciss  
total gate charge  
ID = 25 A; VDS = 80 V; VGS = 10 V;  
Tj = 25 °C; see Figure 13; see Figure 14  
-
-
-
-
-
-
180  
34  
-
-
-
nC  
nC  
nC  
gate-source charge  
gate-drain charge  
input capacitance  
output capacitance  
65  
VGS = 0 V; VDS = 25 V; f = 1 MHz;  
Tj = 25 °C; see Figure 15  
8860 11810 pF  
Coss  
Crss  
770  
546  
925  
750  
pF  
pF  
reverse transfer  
capacitance  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 80 V; RL = 3.2 ; VGS = 10 V;  
RG(ext) = 5 Ω  
-
-
-
-
-
37  
-
-
-
-
-
ns  
ns  
ns  
ns  
nH  
62  
turn-off delay time  
fall time  
158  
80  
LD  
internal drain  
inductance  
from upper edge of mounting base to  
centre of die  
2.5  
LS  
internal source  
inductance  
measured from source lead to source  
bond pad; Tj = 25 °C  
-
-
7.5  
-
nH  
V
Source-drain diode  
VSD  
source-drain voltage  
IS = 25 A; VGS = 0 V; Tj = 25 °C;  
see Figure 16  
0.77  
1.2  
trr  
reverse recovery time IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;  
-
-
65  
-
-
ns  
VDS = 25 V  
Qr  
recovered charge  
191  
nC  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
6 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aaf634  
003aaf639  
200  
15  
10  
6.0  
5.5  
5.0  
VGS (V) =  
ID  
RDSon  
(mΩ)  
(A)  
150  
10  
100  
50  
0
4.5  
5
0
0
0.5  
1
1.5  
2
0
5
10  
15  
20  
V
DS (V)  
V
GS (V)  
Tj = 25 °C; tp = 300 μs  
Fig 6. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
Fig 7. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
003aaf635  
003aah027  
400  
5
V
GS(th)  
(V)  
ID  
(A)  
max  
4
300  
200  
100  
typ  
3
min  
2
1
0
°
Tj = 175  
C
°
Tj = 25  
C
0
-60  
0
60  
120  
180  
0
2
4
6
8
T ( C)  
V
GS (V)  
°
j
Fig 8. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
Fig 9. Gate-source threshold voltage as a function of  
junction temperature  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
7 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aah028  
003aaf640  
-1  
10  
10  
RDSon  
(mΩ)  
VGS (V) =  
I
4.5  
5.0  
D
(A)  
-2  
10  
8
6
4
2
0
typ  
max  
min  
5.5  
-3  
10  
6.0  
7.0  
-4  
10  
10  
-5  
10  
-6  
10  
0
2
4
6
0
50  
100  
150  
200  
V
(V)  
ID (A)  
GS  
Tj = 25 °C; tp = 300 µs  
Fig 10. Sub-threshold drain current as a function of  
gate-source voltage  
Fig 11. Drain-source on-state resistance as a function  
of drain current; typical values  
003aag818  
003aaf641  
3
10  
VGS  
(V)  
a
2.4  
8
14 V  
1.8  
1.2  
0.6  
0
6
VDS = 80 V  
4
2
0
-60  
0
60  
120  
180  
0
50  
100  
150  
200  
°
Tj ( C)  
QG (nC)  
Tj = 25 °C; ID = 25 A  
Fig 12. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
Fig 13. Gate-source voltage as a function of gate  
charge; typical values  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
8 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
003aaf637  
105  
C
(pF)  
V
DS  
I
D
104  
Ciss  
V
GS(pl)  
V
GS(th)  
GS  
103  
V
Coss  
Crss  
Q
Q
GS1  
GS2  
Q
Q
GD  
GS  
Q
G(tot)  
102  
10-1  
003aaa508  
1
10  
102  
103  
VDS (V)  
VGS = 0 V; f = 1 MHz  
Fig 14. Gate charge waveform definitions  
Fig 15. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
003aaf642  
200  
IS  
(A)  
150  
100  
50  
Tj = 175 °C  
Tj = 25 °C  
0
0
0.3  
0.6  
0.9  
1.2  
V
SD (V)  
VGS = 0 V  
Fig 16. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
9 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
8. Package outline  
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)  
SOT404  
A
A
E
1
mounting  
base  
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
D
E
A
A
b
UNIT  
c
D
e
L
H
Q
1
1
p
D
max.  
4.50  
4.10  
1.40  
1.27  
0.85  
0.60  
0.64  
0.46  
1.60  
1.20  
10.30  
9.70  
2.90 15.80 2.60  
2.10 14.80 2.20  
mm  
11  
2.54  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
05-02-11  
06-03-16  
SOT404  
Fig 17. Package outline SOT404 (D2PAK)  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
10 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
9. Revision history  
Table 8.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
BUK765R0-100E v.2  
Modifications:  
20120516  
Product data sheet  
-
BUK765R0-100E v.1  
Status changed from objective to product.  
Various changes to content.  
BUK765R0-100E v.1  
20120404  
Objective data sheet  
-
-
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
11 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
10. Legal information  
10.1 Data sheet status  
Document status[1] [2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URLhttp://www.nxp.com.  
Right to make changes — NXP Semiconductors reserves the right to make  
10.2 Definitions  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Preview — The document is a preview version only. The document is still  
subject to formal approval, which may result in modifications or additions.  
NXP Semiconductors does not give any representations or warranties as to  
the accuracy or completeness of information included herein and shall have  
no liability for the consequences of use of such information.  
Suitability for use in automotive applications — This NXP  
Semiconductors product has been qualified for use in automotive  
applications. Unless otherwise agreed in writing, the product is not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
10.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with theTerms and conditions of commercial sale of NXP Semiconductors.  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
12 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published athttp://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
10.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Adelante,Bitport,Bitsound,CoolFlux,CoReUse,DESFire,EZ-HV,FabKey,G  
reenChip,HiPerSmart,HITAG,I²C-bus  
logo,ICODE,I-CODE,ITEC,Labelution,MIFARE,MIFARE Plus,MIFARE  
Ultralight,MoReUse,QLPAK,Silicon  
Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMedia  
andUCODE — are trademarks of NXP B.V.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
HD Radio andHD Radio logo — are trademarks of iBiquity Digital  
Corporation.  
Export control — This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
11. Contact information  
For more information, please visit:http://www.nxp.com  
For sales office addresses, please send an email to:salesaddresses@nxp.com  
BUK765R0-100E  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 16 May 2012  
13 of 14  
BUK765R0-100E  
NXP Semiconductors  
N-channel TrenchMOS standard level FET  
12. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
2
3
4
5
6
7
8
9
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3  
Thermal characteristics . . . . . . . . . . . . . . . . . . .5  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11  
10  
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
10.1  
10.2  
10.3  
10.4  
11  
Contact information. . . . . . . . . . . . . . . . . . . . . .13  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2012.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 16 May 2012  
Document identifier: BUK765R0-100E  

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