BUT12XI [NXP]
Silicon Diffused Power Transistor; 硅扩散型功率晶体管
| 型号： | BUT12XI |
| 厂家： | 
NXP |
| 描述： | Silicon Diffused Power Transistor |
| 文件： | 总7页 (文件大小：61K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12XI
GENERAL DESCRIPTION
Improved high-voltage, high-speed glass-passivated npn power transistor in a plastic full-pack envelope specially
suited for overhead/high frequency lighting ballast applications and converters, inverters, switching regulators,
motor control systems, etc.
QUICK REFERENCE DATA
SYMBOL PARAMETER
CONDITIONS
TYP. MAX. UNIT
VCESM
VCEO
IC
Collector-emitter voltage peak value
VBE = 0 V
-
-
-
-
-
-
1000
450
8
V
V
Collector-emitter voltage (open base)
Collector current (DC)
A
ICM
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
20
A
W
V
Ptot
VCEsat
Ths ≤ 25 ˚C
33
1.5
IC = 5.0 A;IB = 0.86 A
ICsat
tf
Collector saturation current
Inductive fall time
5
-
-
A
ns
ICon = 5.0A;IBon = 1.0A,Tj ≤100˚C
300
PINNING - SOT186A
PIN CONFIGURATION
SYMBOL
PIN
1
DESCRIPTION
c
case
base
2
collector
emitter
b
3
case isolated
1
2 3
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN. MAX. UNIT
VCESM
VCEO
IC
Collector-emitter voltage peak value
VBE = 0 V
-
1000
450
8
V
V
Collector-emitter voltage (open base)
Collector current (DC)
-
-
A
ICM
IB
Collector current peak value
Base current (DC)
-
20
A
-
4
6
33
150
150
A
IBM
Ptot
Tstg
Tj
Base current peak value
Total power dissipation
Storage temperature
-
-
A
Ths ≤ 25 ˚C
W
˚C
˚C
-65
-
Junction temperature
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
TYP. MAX. UNIT
Rth j-hs
Rth j-a
Junction to heatsink
Junction to ambient
with heatsink compound
in free air
-
3.65
-
K/W
K/W
55
June 1997
1
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12XI
ISOLATION LIMITING VALUE & CHARACTERISTIC
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Visol
Cisol
R.M.S. isolation voltage from all f = 50-60 Hz; sinusoidal
-
2500
V
three terminals to external
heatsink
waveform;
R.H. ≤ 65% ; clean and dustfree
Capacitance from T2 to external f = 1 MHz
heatsink
-
10
-
pF
STATIC CHARACTERISTICS
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
ICES
ICES
Collector cut-off current 1
VBE = 0 V; VCE = VCESMmax
VBE = 0 V; VCE = VCESMmax
Tj = 125 ˚C
-
-
-
-
1.0
3.0
mA
mA
;
IEBO
VCEOsust
Emitter cut-off current
Collector-emitter sustaining voltage IB = 0 A; IC = 100 mA;
L = 25 mH
Collector-emitter saturation voltages IC = 5 A; IB = 0.86 A
Base-emitter saturation voltage
DC current gain
VEB = 9 V; IC = 0 A
-
-
-
10
-
mA
V
450
VCEsat
VBEsat
hFE
-
-
10
14
-
-
18
20
1.5
1.3
35
V
V
IC = 5 A; IB = 0.86 A
IC = 10 mA; VCE = 5 V
IC = 1 A; VCE = 5 V
hFE
35
hFEsat
IC = 5 A; VCE = 1.5 V
5.8
10
12.5
DYNAMIC CHARACTERISTICS
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
TYP. MAX. UNIT
Switching times (resistive load)
ICon = 5.0 A; IBon = -IBoff = 1.0 A
ton
ts
tf
Turn-on time
-
-
-
1.0
4.0
0.8
µs
µs
µs
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
I
Con = 5.0 A; IBon = 1.0 A; LB = 1 µH;
-VBB = 5 V; Tj = 100 ˚C
ts
tf
Turn-off storage time
Turn-off fall time
1.9
150
2.5
300
µs
ns
1 Measured with half sine-wave voltage (curve tracer).
June 1997
2
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12XI
ICon
90 %
90 %
+ 50v
100-200R
IC
10 %
ts
Horizontal
Oscilloscope
Vertical
tf
ton
toff
IBon
IB
10 %
1R
300R
tr 30ns
6V
30-60 Hz
-IBoff
Fig.1. Test circuit for VCEOsust
.
Fig.4. Switching times waveforms with resistive load.
IC / mA
VCC
LC
250
200
IBon
LB
100
0
T.U.T.
-VBB
min
VCE / V
VCEOsust
Fig.2. Oscilloscope display for VCEOsust
.
Fig.5. Test circuit inductive load.
VCC = 300 V; -VBE = 5 V;LB = 1 uH
ICon
90 %
VCC
IC
R
L
VIM
10 %
R
B
tf
ts
t
0
T.U.T.
toff
tp
IBon
IB
T
t
-IBoff
Fig.3. Test circuit resistive load. VIM = -6 to +8 V
Fig.6. Switching times waveforms with inductive load.
VCC = 250 V; tp = 20 µs; δ = tp / T = 0.01.
RB and RL calculated from ICon and IBon requirements.
June 1997
3
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12XI
VCEsat / V
VCC
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
IC/IB=
12
10
8
LC
5
VCL
Tj = 25 C
Tj = 125 C
IBend
-VBB
LB
CFB
T.U.T.
0.1
1
10
IC / A
Fig.7. Test circuit RBSOA. VCC = 150 V; -VBB = 5 V
Fig.10. Typical collector-emitter saturation voltage.
VCEsat = f(IC); parameter IC/IB
LC = 200 µH; VCL ≤ 850 V; LB = 1 µH
VBEsat / V
1.2
Tj = 25 C
Tj = 125 C
1.1
Normalised Power Derating
PD%
120
110
100
90
80
70
60
50
40
30
20
10
0
1
0.9
IC =
0.8
0.7
6A
3A
2A
0.6
0
0.4
0.8
1.2
1.6
2
2.4
0
20
40
60
80
Tmb /
100
120
140
C
IB / A
Fig.8. Normalised power dissipation.
PD% = 100 PD/PD 25˚C = f (Tmb)
Fig.11. Typical base-emitter saturation voltage.
VBEsat = f(IB); parameter IC
VBEsat / V
VCEsat / V
10
1.2
1.1
1
Tj = 25 C
Tj = 125 C
Tj = 25 C
Tj = 125 C
0.9
0.8
0.7
0.6
0.5
0.4
6A
1
4A
IC/IB=
8
10
IC=2A
12
0.1
0.1
1
IC / A
10
0.1
1
IB / A
10
Fig.9. Typical base-emitter saturation voltage.
VBEsat = f(IC); parameter IC/IB
Fig.12. Typical collector-emitter saturation voltage.
VCEsat = f(IB); parameter IC
June 1997
4
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12XI
hFE
IC / A
100
100
10
1
5V
ICMmax
10
1V
Tj = 25 C
Tj = 125 C
ICmax
II
0.01
0.1
10
1
1
IC / A
Fig.14. Typical DC current gain. hFE = f(IC)
parameter VCE
I
IC / A
0.1
8
7
6
5
DC
0.01
4
3
2
1
1
10
100
1000
VCE / V
Fig.13. Forward bias safe operating area. Tmb = 25˚C
I
Region of permissible DC operation.
Extension for repetitive pulse operation.
Mounted with heatsink compound and
30 ± 5 newton force on the centre of the
envelope.
0
0
200
400
600
800
1000
II
VCE / V
NB:
Fig.15. Reverse bias safe operating area. Tj ≤ Tj max
Zth / (K/W)
BUX100
1E+01
1E+00
1E-01
1E-02
1.0
0.5
0.2
0.1
0.05
tp
t
p
P
D
D =
0.02
D=0
T
t
T
1E-05
1E-03
t / s
1E-01
1E+01
Fig.16. Transient thermal impedance. Zth j-mb = f(t); parameter D= tp/T
June 1997
5
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12XI
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
10.3
max
4.6
max
3.2
3.0
2.9 max
2.8
Recesses (2x)
2.5
6.4
0.8 max. depth
15.8
max
seating
plane
15.8
max.
19
max.
3 max.
not tinned
3
2.5
13.5
min.
1
2
3
M
0.4
1.0 (2x)
0.6
2.5
0.9
0.7
2.54
0.5
5.08
1.3
Fig.17. SOT186A; The seating plane is electrically isolated from all terminals.
Notes
1. Refer to mounting instructions for F-pack envelopes.
2. Epoxy meets UL94 V0 at 1/8".
June 1997
6
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12XI
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1997
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
June 1997
7
Rev 1.000
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