CBT3245ABQ-Q100X [NXP]
Octal bus switch QFN 20-Pin;
| 型号： | CBT3245ABQ-Q100X |
| 厂家： | 
NXP |
| 描述： | Octal bus switch QFN 20-Pin |
| 文件： | 总14页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CBT3245A-Q100
Octal bus switch
Rev. 1 — 20 March 2013
Product data sheet
1. General description
The CBT3245A-Q100 provides 8 bits of high-speed TTL-compatible bus switching. The
low ON resistance of the switch allows connections to be made with minimal propagation
delay.
The CBT3245A-Q100 is organized as one 8-bit bus switches with one output enable (OE)
input. When OE is LOW, the switch is on and port A is connected to the B port. When OE
is HIGH, each switch is disabled.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 3) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 3)
Specified from 40 C to +85 C
5 switch connection between two ports
TTL-compatible control input levels
Multiple package options
Latch-up protection exceeds 500 mA per JESD78
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115B exceeds 150 V (C = 200 pF, R = 0 )
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature
range
Name
Description
Version
CBT3245AD-Q100
40 C to +85 C SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
SOT360-1
SOT764-1
CBT3245APW-Q100 40 C to +85 C TSSOP20
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
CBT3245ABQ-Q100 40 C to +85 C DHVQFN20 plastic dual-in-line compatible thermal enhanced
very thin quad flat package; no leads; 20 terminals;
body 2.5 4.5 0.85 mm
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
4. Functional diagram
2
18
11
A1
B1
B8
9
A8
19
OE
001aao117
Fig 1. Logic diagram
5. Pinning information
5.1 Pinning
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(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 2. Pin configuration for SOT163-1 (SO20) and
SOT360-1 (TSSOP20)
Fig 3. Pin configuration for SOT764-1 (DHVQFN20)
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
2 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
5.2 Pin description
Table 2.
Symbol
n.c.
Pin description
Pin
Description
1
not connected
A1 to A8
GND
2, 3, 4, 5, 6, 7, 8, 9
data input/output (A port)
ground (0 V)
10
B1 to B8
OE
18, 17, 16, 15, 14, 13, 12, 11
data input/output (B port)
19
20
output enable input (active LOW)
positive supply voltage
VCC
6. Functional description
Table 3.
Function selection[1]
Input
OE
L
Input/output
An, Bn
An = Bn
Z
H
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Tamb = 40 C to +85 C, unless otherwise specified.
Symbol
VCC
VI
Parameter
Conditions
Min
0.5
0.5
50
0.5
-
Max
+7.0
+7.0
-
Unit
V
supply voltage
[2]
[2]
input voltage
V
IOK
output clamping current
output voltage
VO < 0 V
mA
V
VO
+7.0
128
-
IO
output current
VO < 0 V
VI = 0 V
mA
mA
C
IIK
input clamping current
storage temperature
50
65
Tstg
+150
[1] Stresses beyond the listed ones, may permanently damage the device. The ratings are stress ratings only and functional operation of
the device at or beyond any conditions, other than those conditions indicated in Section 8., is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
[2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
3 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
8. Recommended operating conditions
Table 5.
Operating conditions
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
Symbol
VCC
Parameter
Conditions
Min
4.0
2.0
-
Typ
Max
5.5
-
Unit
V
supply voltage
-
-
-
-
VIH
HIGH-level input voltage
LOW-level input voltage
ambient temperature
V
VIL
0.8
+85
V
Tamb
operating in free air
40
C
9. Static characteristics
Table 6.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
Tamb = 40 C to +85 C
Unit
Min
Typ[1]
Max
1.2
5
VIK
II
input clamping voltage
VCC = 4.5 V; II = 18 mA
-
-
-
-
-
V
input leakage current
supply current
VCC = 5.5 V; VI = GND or 5.5 V
A
A
ICC
VCC = 5.5 V; IO = 0 mA;
VI = VCC or GND
1
3
[2]
ICC
additional supply current per input pin; VCC = 5.5 V; 1 input at
3.4 V, other inputs at VCC or GND
-
-
3.5
mA
CI
input capacitance
control pins; VI = 3 V or 0 V
-
-
3.2
6.6
-
-
pF
pF
Cio(off)
off-state input/output
capacitance
port off; VI = 3 V or 0 V; OE = VCC
[3]
[3]
[3]
RON
ON resistance
VCC = 4.5 V; VI = 0 V; II = 64 mA
VCC = 4.5 V; VI = 0 V; II = 30 mA
VCC = 4.5 V; VI = 2.4 V; II = 15 mA
-
-
-
5
5
7
7
10
15
[1] All typical values are at VCC = 5 V, Tamb = 25 C.
[2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
[3] Measured by the voltage drop between the An and the Bn terminals at the indicated current through the switch. The lowest voltage of
the two (An or Bn) terminals, determines ON resistance.
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
4 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6.
Symbol
tpd
Parameter
Conditions
Tamb = 40 C to +85 C Unit
Min
Max
0.25
5.9
[1][2]
[2]
propagation delay
enable time
An, Bn to Bn, An; see Figure 4
VCC = 5.0 V 0.5 V
-
ns
ns
ns
ten
OE to An or Bn; see Figure 5
VCC = 5.0 V 0.5 V
1.0
1.0
[2]
tdis
disable time
OE to An or Bn; see Figure 5
VCC = 5.0 V 0.5 V
6.0
[1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2] tpd is the same as tPLH and tPHL
ten is the same as tPZL and tPZH
.
.
tdis is the same as tPLZ and tPHZ
.
11. Waveforms
V
I
V
An, Bn input
M
GND
t
t
PLH
PHL
V
OH
V
Bn, An output
M
V
OL
001aam475
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 4. The data input (An, Bn) to output (Bn, An) propagation delay times
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
5 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
V
I
V
OE input
output
M
GND
3.5 V
t
t
PZL
PLZ
V
LOW-to-OFF
OFF-to-LOW
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aam476
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 5. Enable and disable times
Table 8. Measurement points
Supply voltage
VCC
Input
VI
Output
VM
VM
VX
VY
VCC = 5.0 V 0.5 V GND to 3.0 V
1.5 V
1.5 V
VOL + 0.3 V
VOH 0.3 V
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
6 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
12. Test information
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
R
V
CC
L
V
V
O
I
G
DUT
R
T
C
L
R
L
001aae331
Test data is given in Table 9.
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz; Zo = 50 .
The outputs are measured one at a time with one transition per measurement.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
V
EXT = External voltage for measuring switching times.
Fig 6. Test circuit for measuring switching times
Table 9. Test data
Supply voltage
Input
VI
Load
CL
VEXT
tr, tf
RL
tPLH, tPHL
open
tPLZ, tPZL
tPHZ, tPZH
VCC = 5.0 V 0.5 V
GND to 3.0 V 2.5 ns
50 pF
500
7.0 V
open
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
7 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
13. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT163-1
075E04
MS-013
Fig 7. Package outline SOT163-1 (SO20)
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
8 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
D
E
A
X
c
H
v
M
A
y
E
Z
11
20
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.5
0.2
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT360-1
MO-153
Fig 8. Package outline SOT360-1 (TSSOP20)
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
9 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm
SOT764-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
9
L
1
10
E
h
e
20
11
19
12
D
h
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
1
h
h
max.
0.05 0.30
0.00 0.18
4.6
4.4
3.15
2.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
3.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT764-1
- - -
MO-241
- - -
Fig 9. Package outline SOT764-1 (DHVQFN20)
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
10 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
14. Abbreviations
Table 10. Abbreviations
Acronym
CDM
ESD
DUT
HBM
MIL
Description
Charged Device Model
ElectroStatic Discharge
Device Under Test
Human Body Model
Military
MM
Machine Model
PRR
TTL
Pulse Rate Repetition
Transistor-Transistor Logic
15. Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
CBT3245A_Q100 v.1 20130320
Product data sheet
-
-
CBT3245A_Q100
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
11 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use in automotive applications — This NXP
16.2 Definitions
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
CBT3245A_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
12 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
CBT3245A_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 20 March 2013
13 of 14
NXP Semiconductors
CBT3245A-Q100
Octal bus switch
18. Contents
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
7
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 20 March 2013
Document identifier: CBT3245A_Q100
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