CBT3306PW-T [NXP]

IC CBT/FST/QS/5C/B SERIES, DUAL 1-BIT DRIVER, TRUE OUTPUT, PDSO8, 4.4, PLASTIC, MO-153, SOT-530-1, TSSOP-8, Bus Driver/Transceiver;
CBT3306PW-T
型号: CBT3306PW-T
厂家: NXP    NXP
描述:

IC CBT/FST/QS/5C/B SERIES, DUAL 1-BIT DRIVER, TRUE OUTPUT, PDSO8, 4.4, PLASTIC, MO-153, SOT-530-1, TSSOP-8, Bus Driver/Transceiver

驱动 光电二极管 输出元件 逻辑集成电路
文件: 总13页 (文件大小:68K)
中文:  中文翻译
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CBT3306  
Dual bus switch  
Rev. 02 — 17 November 2005  
Product data sheet  
1. General description  
The CBT3306 dual FET bus switch features independent line switches. Each switch is  
disabled when the associated output enable (OE) input is HIGH.  
The CBT3306 is characterized for operation from 40 °C to +85 °C.  
2. Features  
5 switch connection between two ports  
TTL-compatible input levels  
Package options include plastic small outline (SO) and thin shrink small outline  
(TSSOP)  
Latch-up protection exceeds 100 mA per JESD78  
ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per  
JESD22-C101  
3. Quick reference data  
Table 1:  
Quick reference data  
Tamb = 25 °C; GND = 0 V  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
tPD  
propagation delay  
from input (nA or nB) to  
output (nB or nA);  
CL = 50 pF;  
-
-
0.25  
ns  
VCC = 5.0 V ± 0.5 V  
Cio(off)  
ICC  
off-state input/output VI = 3 V or 0 V; OE = VCC  
capacitance  
-
-
6.45  
-
-
pF  
quiescent supply  
current  
VCC = 5.5 V; IO = 0 mA;  
VI = VCC or GND  
3
µA  
4. Ordering information  
Table 2:  
Ordering information  
Type number  
Package  
Name  
SO8  
Description  
Version  
CBT3306D  
plastic small outline package; 8 leads;  
body width 3.9 mm  
SOT96-1  
CBT3306PW  
TSSOP8  
plastic thin shrink small outline package; 8 leads;  
body width 4.4 mm  
SOT530-1  
 
 
 
 
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
5. Functional diagram  
2
1
5
7
3
6
1A  
1OE  
2A  
1B  
2B  
2OE  
002aab985  
Fig 1. Logic diagram of CBT3306 (positive logic)  
6. Pinning information  
6.1 Pinning  
1
2
3
4
8
7
6
5
1OE  
V
CC  
1
2
3
4
8
7
6
5
1OE  
1A  
V
CC  
1A  
1B  
2OE  
2B  
CBT3306D  
2OE  
2B  
CBT3306PW  
1B  
GND  
2A  
GND  
2A  
002aab983  
002aab984  
Fig 2. Pin configuration for SO8  
Fig 3. Pin configuration for TSSOP8  
6.2 Pin description  
Table 3:  
Pin description  
Symbol  
1OE  
1A  
Pin  
1
Description  
output enable 1  
A port input 1  
B port output 1  
ground (0 V)  
2
1B  
3
GND  
2A  
4
5
A port input 2  
B port output 2  
output enable 2  
2B  
6
2OE  
VCC  
7
8
positive supply voltage  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
2 of 13  
 
 
 
 
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
7. Functional description  
Refer to Figure 1 “Logic diagram of CBT3306 (positive logic)”.  
7.1 Function selection  
Table 4:  
Function selection  
Input  
OE  
L
Function  
A port = B port  
disconnect  
H
8. Limiting values  
Table 5:  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). [1]  
Tamb = 40 °C to +85 °C, unless otherwise specified.  
Symbol  
VCC  
VI  
Parameter  
Conditions  
Min  
0.5  
0.5[2]  
-
Max  
+7.0  
+7.0  
128  
Unit  
V
supply voltage  
input voltage  
V
IO  
output current  
mA  
mA  
°C  
IIK  
input clamping current  
storage temperature  
VI/O = 0 V  
-
50  
Tstg  
65  
+150  
[1] Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only  
and functional operation of the device at these or any other conditions beyond those indicated under  
Section 9 “Recommended operating conditions” is not implied. Exposure to absolute-maximum-rated  
conditions for extended periods may affect device reliability.  
[2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current  
ratings are observed.  
9. Recommended operating conditions  
Table 6:  
Operating conditions  
All unused control inputs of the device must be held at VCC or GND to ensure proper device  
operation.  
Symbol  
VCC  
Parameter  
Conditions  
Min  
4.5  
2.0  
-
Typ  
Max  
5.5  
-
Unit  
V
supply voltage  
-
-
-
-
VIH  
HIGH-state input voltage  
LOW-state input voltage  
ambient temperature  
V
VIL  
0.8  
+85  
V
Tamb  
operating in free air  
40  
°C  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
3 of 13  
 
 
 
 
 
 
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
10. Static characteristics  
Table 7:  
Static characteristics  
Tamb = 40 °C to +85 °C, unless otherwise specified.  
Symbol Parameter  
Conditions  
Min  
Typ [1]  
Max  
1.2  
±1  
Unit  
V
VIK  
ILI  
input clamping voltage  
input leakage current  
VCC = 4.5 V; II = 18 mA  
VCC = 5.5 V; VI = GND or 5.5 V  
-
-
-
-
-
-
µA  
µA  
ICC  
quiescent supply current VCC = 5.5 V; IO = 0 mA;  
VI = VCC or GND  
3
Vpass  
pass voltage  
output HIGH; VI = VCC = 5.0 V;  
IO = 100 µA  
3.4  
-
3.6  
-
3.9  
2.5  
V
ICC  
additional quiescent  
supply current[2]  
per input pin; VCC = 5.5 V;  
one input at 3.4 V, other inputs at  
mA  
VCC or GND  
Ci  
input capacitance  
control pin; VI = 3 V or 0 V  
-
-
3.15  
6.45  
-
-
pF  
pF  
Cio(off)  
off-state input/output  
capacitance  
port off; VI = 3 V or 0 V; OE = VCC  
[3]  
[3]  
[3]  
Ron  
ON-state resistance  
VCC = 4.5 V; VI = 0 V; II = 64 mA  
VCC = 4.5 V; VI = 0 V; II = 30 mA  
VCC = 4.5 V; VI = 2.4 V; II = 15 mA  
-
-
-
3.4  
3.4  
6.8  
5
5
15  
[1] All typical values are at VCC = 5 V, Tamb = 25 °C.  
[2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.  
[3] Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. ON-state resistance is  
determined by the lowest voltage of the two (A or B) terminals.  
11. Dynamic characteristics  
Table 8:  
Dynamic characteristics  
VCC = +5.0 V ± 0.5 V; Tamb = 40 °C to +85 °C; CL = 50 pF; unless otherwise specified.  
Symbol Parameter  
Conditions  
Min  
-
Typ  
Max  
0.25  
5
Unit  
ns  
[1]  
tPD  
ten  
tdis  
propagation delay  
from input (nA or nB) to output (nB or nA)  
from input (nOE) to output (nA or nB)  
from input (nOE) to output (nA or nB)  
-
-
-
enable time[2]  
disable time[3]  
1.8  
1
ns  
5
ns  
[1] The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load  
capacitance, when driven by an ideal voltage source (zero output impedance).  
[2] Output enable time to HIGH and LOW level.  
[3] Output disable time from HIGH and LOW level.  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
4 of 13  
 
 
 
 
 
 
 
 
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
11.1 AC waveforms  
VI = GND to 3.0 V.  
tPLZ and tPHZ are the same as tdis.  
tPZL and tPZH are the same as ten.  
tPLH and tPHL are the same as tPD  
.
3.0 V  
0 V  
input  
1.5 V  
1.5 V  
t
t
PHL  
PLH  
V
V
OH  
OL  
1.5 V  
output  
1.5 V  
002aab665  
Fig 4. Input to output propagation delay  
3 V  
0 V  
output control  
1.5 V  
1.5 V  
(LOW-level enabling)  
t
t
PZL  
PLZ  
3.5 V  
output  
1.5 V  
1.5 V  
waveform 1  
S1 at 7 V  
V
V
+ 0.3 V  
(1)  
OL  
OL  
V
V
OL  
t
t
PZH  
PHZ  
OH  
output  
0.3 V  
waveform 2  
(2)  
S1 open  
0 V  
002aab666  
(1) Waveform 1 is for an output with internal conditions such that the output is LOW except when  
disabled by the output control.  
(2) Waveform 2 is for an output with internal conditions such that the output is HIGH except when  
disabled by the output control.  
Fig 5. 3-state output enable and disable times  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
5 of 13  
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
12. Test information  
R
L
7 V  
S1  
from output under test  
open  
GND  
500  
C
50 pF  
R
L
500 Ω  
L
002aab667  
Test data are given in Table 9.  
All input pulses are supplied by generators having the following characteristics:  
PRR 10 MHz; Zo = 50 ; tr 2.5 ns; tf 2.5 ns.  
The outputs are measured one at a time with one transition per measurement.  
CL = load capacitance includes jig and probe capacitance.  
RL = load resistance.  
Fig 6. Test circuit  
Table 9:  
Test  
Test data  
Load  
CL  
Switch  
RL  
tPD  
50 pF  
50 pF  
50 pF  
500 Ω  
500 Ω  
500 Ω  
open  
7 V  
tPLZ, tPZL  
tPHZ, tPZH  
open  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
6 of 13  
 
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
13. Package outline  
SO8: plastic small outline package; 8 leads; body width 3.9 mm  
SOT96-1  
D
E
A
X
v
c
y
H
M
A
E
Z
5
8
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
4
e
w
M
detail X  
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(2)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
5.0  
4.8  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.27  
0.05  
1.05  
0.041  
1.75  
0.25  
0.01  
0.25  
0.01  
0.25  
0.1  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.20  
0.014 0.0075 0.19  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches 0.069  
0.01 0.004  
Notes  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT96-1  
076E03  
MS-012  
Fig 7. Package outline SOT96-1 (SO8)  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
7 of 13  
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm  
SOT530-1  
E
A
D
X
c
y
H
E
v
M
A
Z
8
5
A
2
(A )  
A
3
A
1
pin 1 index  
θ
L
p
L
detail X  
1
4
e
w M  
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
A
A
A
b
c
D
E
e
H
L
L
UNIT  
v
w
y
Z
θ
1
2
3
p
E
p
max.  
0.15  
0.05  
0.95  
0.85  
0.30  
0.19  
0.20  
0.13  
3.1  
2.9  
4.5  
4.3  
6.5  
6.3  
0.7  
0.5  
0.70  
0.35  
8°  
0°  
mm  
1.1  
0.65  
0.25  
0.94  
0.1  
0.1  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
00-02-24  
03-02-18  
SOT530-1  
MO-153  
Fig 8. Package outline SOT530-1 (TSSOP8)  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
8 of 13  
CBT3306  
Philips Semiconductors  
Dual bus switch  
14. Soldering  
14.1 Introduction to soldering surface mount packages  
This text gives a very brief insight to a complex technology. A more in-depth account of  
soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages  
(document order number 9398 652 90011).  
There is no soldering method that is ideal for all surface mount IC packages. Wave  
soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch  
SMDs. In these situations reflow soldering is recommended.  
14.2 Reflow soldering  
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and  
binding agent) to be applied to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement. Driven by legislation and  
environmental forces the worldwide use of lead-free solder pastes is increasing.  
Several methods exist for reflowing; for example, convection or convection/infrared  
heating in a conveyor type oven. Throughput times (preheating, soldering and cooling)  
vary between 100 seconds and 200 seconds depending on heating method.  
Typical reflow peak temperatures range from 215 °C to 270 °C depending on solder paste  
material. The top-surface temperature of the packages should preferably be kept:  
below 225 °C (SnPb process) or below 245 °C (Pb-free process)  
for all BGA, HTSSON..T and SSOP..T packages  
for packages with a thickness 2.5 mm  
for packages with a thickness < 2.5 mm and a volume 350 mm3 so called  
thick/large packages.  
below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a  
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages.  
Moisture sensitivity precautions, as indicated on packing, must be respected at all times.  
14.3 Wave soldering  
Conventional single wave soldering is not recommended for surface mount devices  
(SMDs) or printed-circuit boards with a high component density, as solder bridging and  
non-wetting can present major problems.  
To overcome these problems the double-wave soldering method was specifically  
developed.  
If wave soldering is used the following conditions must be observed for optimal results:  
Use a double-wave soldering method comprising a turbulent wave with high upward  
pressure followed by a smooth laminar wave.  
For packages with leads on two sides and a pitch (e):  
larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be  
parallel to the transport direction of the printed-circuit board;  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
9 of 13  
 
 
 
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the  
transport direction of the printed-circuit board.  
The footprint must incorporate solder thieves at the downstream end.  
For packages with leads on four sides, the footprint must be placed at a 45° angle to  
the transport direction of the printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
During placement and before soldering, the package must be fixed with a droplet of  
adhesive. The adhesive can be applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the adhesive is cured.  
Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C  
or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.  
A mildly-activated flux will eliminate the need for removal of corrosive residues in most  
applications.  
14.4 Manual soldering  
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage  
(24 V or less) soldering iron applied to the flat part of the lead. Contact time must be  
limited to 10 seconds at up to 300 °C.  
When using a dedicated tool, all other leads can be soldered in one operation within  
2 seconds to 5 seconds between 270 °C and 320 °C.  
14.5 Package related soldering information  
Table 10: Suitability of surface mount IC packages for wave and reflow soldering methods  
Package [1]  
Soldering method  
Wave  
Reflow[2]  
BGA, HTSSON..T[3], LBGA, LFBGA, SQFP,  
SSOP..T[3], TFBGA, VFBGA, XSON  
not suitable  
suitable  
DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP,  
HSQFP, HSSON, HTQFP, HTSSOP, HVQFN,  
HVSON, SMS  
not suitable[4]  
suitable  
PLCC[5], SO, SOJ  
suitable  
suitable  
LQFP, QFP, TQFP  
not recommended[5] [6]  
not recommended[7]  
not suitable  
suitable  
SSOP, TSSOP, VSO, VSSOP  
CWQCCN..L[8], PMFP[9], WQCCN..L[8]  
suitable  
not suitable  
[1] For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026);  
order a copy from your Philips Semiconductors sales office.  
[2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the  
maximum temperature (with respect to time) and body size of the package, there is a risk that internal or  
external package cracks may occur due to vaporization of the moisture in them (the so called popcorn  
effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit  
Packages; Section: Packing Methods.  
[3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no  
account be processed through more than one soldering cycle or subjected to infrared reflow soldering with  
peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package  
body peak temperature must be kept as low as possible.  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
10 of 13  
 
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
[4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the  
solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink  
on the top side, the solder might be deposited on the heatsink surface.  
[5] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave  
direction. The package footprint must incorporate solder thieves downstream and at the side corners.  
[6] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is  
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
[7] Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger  
than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
[8] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered  
pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by  
using a hot bar soldering process. The appropriate soldering profile can be provided on request.  
[9] Hot bar soldering or manual soldering is suitable for PMFP packages.  
15. Abbreviations  
Table 11: Abbreviations  
Acronym  
CDM  
ESD  
Description  
Charged Device Model  
ElectroStatic Discharge  
Field Effect Transistor  
Human Body Model  
FET  
HBM  
PRR  
Pulse Rate Repetition  
Transistor-Transistor Logic  
TTL  
16. Revision history  
Table 12: Revision history  
Document ID  
CBT3306_2  
Release date Data sheet status  
20051117 Product data sheet  
Change notice  
Doc. number  
Supersedes  
-
CBT3306_2  
CBT3306_1  
Modifications:  
The format of this data sheet has been redesigned to comply with the new presentation and  
information standard of Philips Semiconductors.  
Table 1 “Quick reference data”:  
added Min and Max columns; moved tPD and ICC values to Max column  
under ‘Conditions’ for Cio(off): changed “VO” to “VI”  
Table 5 “Limiting values”:  
changed parameter description for IIK from “diode current” to “input clamping current”  
deleted old table note [3]  
Table 7 “Static characteristics”:  
changed symbol for input leakage current from “II” to “ILI”  
under ‘Conditions’ for Cio(off): changed “VO” to “VI”  
Ron maximum value for condition VCC = 4.5 V; VI = 2.4 V; II = 15 mA: changed from “7.5 ” to  
“15 ”  
CBT3306_1  
20011108  
Product data  
853-2304 27313 9397 750 09115  
-
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
11 of 13  
 
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
17. Data sheet status  
Level Data sheet status[1] Product status[2] [3]  
Definition  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips  
Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
[3]  
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
18. Definitions  
Short-form specification The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes in the products - including circuits, standard cells, and/or  
software - described or contained herein in order to improve design and/or  
performance. When the product is in full production (status ‘Production’),  
relevant changes will be communicated via a Customer Product/Process  
Change Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
20. Trademarks  
Notice — All referenced brands, product names, service names and  
19. Disclaimers  
trademarks are the property of their respective owners.  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
21. Contact information  
For additional information, please visit: http://www.semiconductors.philips.com  
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com  
CBT3306_2  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 02 — 17 November 2005  
12 of 13  
 
 
 
 
 
CBT3306  
Philips Semiconductors  
Dual bus switch  
22. Contents  
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 1  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2  
7
7.1  
8
Functional description . . . . . . . . . . . . . . . . . . . 3  
Function selection. . . . . . . . . . . . . . . . . . . . . . . 3  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Recommended operating conditions. . . . . . . . 3  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 4  
AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7  
9
10  
11  
11.1  
12  
13  
14  
14.1  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Introduction to soldering surface mount  
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . . 9  
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Manual soldering . . . . . . . . . . . . . . . . . . . . . . 10  
Package related soldering information . . . . . . 10  
14.2  
14.3  
14.4  
14.5  
15  
16  
17  
18  
19  
20  
21  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Contact information . . . . . . . . . . . . . . . . . . . . 12  
© Koninklijke Philips Electronics N.V. 2005  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner. The information presented in this document does  
not form part of any quotation or contract, is believed to be accurate and reliable and may  
be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under  
patent- or other industrial or intellectual property rights.  
Date of release: 17 November 2005  
Document number: CBT3306_2  
Published in The Netherlands  

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