ERJ-1GN0R00C [NXP]
Power Amplifier Module for LTE and 5G;型号: | ERJ-1GN0R00C |
厂家: | NXP |
描述: | Power Amplifier Module for LTE and 5G LTE |
文件: | 总16页 (文件大小:469K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Document Number: A3M35TL039
Rev. 2, 12/2020
NXP Semiconductors
Technical Data
Power Amplifier Module for LTE and
5G
A3M35TL039
The A3M35TL039 is a fully integrated Doherty power amplifier module
designed for wireless infrastructure applications that demand high
performance in the smallest footprint. Ideal for applications in massive MIMO
systems, outdoor small cells and low power remote radio heads. The
field--proven LDMOS power amplifiers are designed for TDD and FDD LTE
systems.
3400–3650 MHz, 28 dB, 7 W Avg.
AIRFAST POWER AMPLIFIER
MODULE
3400–3650 MHz
Typical LTE Performance: Pout = 7 W Avg., VDD = 26 Vdc, 1 20 MHz LTE,
Input Signal PAR = 8 dB @ 0.01% Probability on CCDF. (1)
Carrier Center
Frequency
Gain
(dB)
ACPR
(dBc)
PAE
(%)
3410 MHz
3500 MHz
3590 MHz
3640 MHz
28.6
28.3
28.1
28.1
–28.8
–30.7
–31.6
–30.8
40.8
40.5
39.4
38.9
10 mm 6 mm Module
1. All data measured with device soldered in NXP reference circuit.
Features
Frequency: 3400–3650 MHz
Advanced high performance in--package Doherty
Fully matched (50 ohm input/output, DC blocked)
Designed for low complexity analog or digital linearization systems
2020 NXP B.V.
Pin 1
index area
GND
1
2
3
4
5
18 GND
N.C.
17 RF
out
(1)
V
16 GND
15 GND
14 GND
DC2ꢀꢀ
V
DC1
RF
in
(Top View)
5
4
3
2
1
14
15
16
17
18
27
Pin 1
index area
(Bottom View)
Note: Exposed backside of the package is DC and RF ground.
Figure 1. Pin Connections
1. V
and V
are DC coupled internal to the package and must be powered by a single DC power supply.
DP2
DC2
A3M35TL039
RF Device Data
NXP Semiconductors
2
Table 1. Functional Pin Description
Pin Number
Pin Function
GND
Pin Description
1, 13, 14, 15, 16, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27
Ground
2, 12
3
N.C.
No Connection
V
V
Carrier Drain Supply, Stage 2
Carrier Drain Supply, Stage 1
RF Input
DC2
DC1
4
5
RF
in
GP2
GP1
GC1
GC2
6
V
V
V
V
Peaking Gate Supply, Stage 2
Peaking Gate Supply, Stage 1
Carrier Gate Supply, Stage 1
Carrier Gate Supply, Stage 2
Peaking Drain Supply, Stage 1
Peaking Drain Supply, Stage 2
RF Output
7
8
9
10
11
17
V
V
DP1
DP2
RF
out
A3M35TL039
RF Device Data
NXP Semiconductors
3
Table 2. Maximum Ratings
Rating
Symbol
Value
–0.5 to +10
24 to 30
–65 to +150
125
Unit
Vdc
Vdc
C
Gate--Bias Voltage Range
Operating Voltage Range
Storage Temperature Range
Case Operating Temperature
Peak Input Power
V
G
V
DD
T
stg
T
C
C
in
P
25
dBm
(3500 MHz, Pulsed CW, 10 sec(on), 10% Duty Cycle)
Table 3. Lifetime
Characteristic
Symbol
Value
Unit
Mean Time to Failure
MTTF
>10
Years
Case Temperature 125C, 7 W Avg., 30 Vdc
Table 4. ESD Protection Characteristics
Test Methodology
Class
1B
Human Body Model (per JS--001--2017)
Charge Device Model (per JS--002--2014)
C2a
Table 5. Moisture Sensitivity Level
Test Methodology
Rating
Package Peak Temperature
Unit
Per JESD22--A113, IPC/JEDEC J--STD--020
3
260
C
A3M35TL039
RF Device Data
NXP Semiconductors
4
Table 6. Electrical Characteristics (T = 25C unless otherwise noted)
A
Characteristic
Symbol
Typ
Range
Unit
Carrier Stage 1 — On Characteristics
(1)
Gate Threshold Voltage
V
V
1.3
2.0
5.9
0.4
0.4
1.4
Vdc
Vdc
Vdc
GS(th)
GS(Q)
GG(Q)
(V = 10 Vdc, I = 2 Adc)
DS
D
Gate Quiescent Voltage
(V = 26 Vdc, I
= 23 mAdc)
DQ1A
DS
Fixture Gate Quiescent Voltage
(V = 26 Vdc, I = 23 mAdc, Measured in Functional Test)
V
DD
DQ1A
Carrier Stage 2 — On Characteristics
(1)
Gate Threshold Voltage
V
1.3
1.8
3.0
0.4
0.4
1.2
Vdc
Vdc
Vdc
GS(th)
(V = 10 Vdc, I = 19 Adc)
DS
D
Gate Quiescent Voltage
(V = 26 Vdc, I
V
GS(Q)
= 72 mAdc)
DQ2A
DS
Fixture Gate Quiescent Voltage
V
V
GG(Q)
(V = 26 Vdc, I
= 72 mAdc, Measured in Functional Test)
DD
DQ2A
(1)
Peaking Stage 1 — On Characteristics
Gate Threshold Voltage
1.3
1.5
1.5
0.4
0.4
0.4
Vdc
Vdc
Vdc
GS(th)
(V = 10 Vdc, I = 4 Adc)
DS
D
Gate Quiescent Voltage
(V = 26 Vdc, I
V
GS(Q)
= 85 Adc)
DQ1A
DS
Fixture Gate Quiescent Voltage
V
V
GG(Q)
(V = 26 Vdc, I
= 85 Adc, Measured in Functional Test)
DD
DQ1A
(1)
Peaking Stage 2 — On Characteristics
Gate Threshold Voltage
1.3
1.4
1.4
0.4
0.4
0.4
Vdc
Vdc
Vdc
GS(th)
(V = 10 Vdc, I = 38 Adc)
DS
D
Gate Quiescent Voltage
(V = 26 Vdc, I
V
GS(Q)
= 550 Adc)
DQ2A
DS
Fixture Gate Quiescent Voltage
(V = 26 Vdc, I = 550 Adc, Measured in Functional Test)
V
GG(Q)
DD
DQ2A
1. Each side of device measured separately.
(continued)
A3M35TL039
RF Device Data
NXP Semiconductors
5
Table 6. Electrical Characteristics (T = 25C unless otherwise noted) (continued)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(1)
(2)
Functional Tests — 3400 MHz
(In NXP Doherty Production ATE
= (V – 0.2) Vdc, V = (V – 0.25) Vdc, P = 7 W Avg., 1--tone CW, f = 3400 MHz.
t GS2B
Test Fixture, 50 ohm system) V = 26 Vdc, I
= 23 mA,
DD
DQ1A
I
= 72 mA, V
DQ2A
GS1B
t
out
Gain
Drain Efficiency
@ 3 dB Compression Point
G
26.8
36.0
46.0
28.8
42.7
47.0
—
dB
%
D
—
P
P3dB
—
dBm
out
(1)
(2)
Functional Tests — 3600 MHz
(In NXP Doherty Production ATE
Test Fixture, 50 ohm system) V = 26 Vdc, I
= 23 mA,
DD
DQ1A
I
= 72 mA, V = (V – 0.2) Vdc, V
= (V – 0.25) Vdc, P = 7 W Avg., 1--tone CW, f = 3600 MHz.
DQ2A
GS1B
t
GS2B
t
out
Gain
Drain Efficiency
@ 3 dB Compression Point
G
26.5
34.5
45.4
27.8
39.4
46.2
—
—
—
dB
%
D
P
P3dB
dBm
out
(3)
Wideband Ruggedness (In NXP Doherty Power Amplifier Module Reference Circuit, 50 ohm system) I
= 23 mA, I
= 72 mA,
DQ2A
DQ1A
V
= 1.5 Vdc, V
= 1.35 Vdc, f = 3500 MHz, Additive White Gaussian Noise (AWGN) with 10 dB PAR
GSP1
GSP2
ISBW of 400 MHz at 30 Vdc, 3 dB Input Overdrive from 7 W Avg.
Modulated Output Power
No Device Degradation
(3)
Typical Performance (In NXP Doherty Power Amplifier Module Reference Circuit, 50 ohm system) V = 26 Vdc, I
= 23 mA,
DQ1A
DD
I
= 72 mA, V
= 1.5 Vdc, V
= 1.35 Vdc, P = 7 W Avg., 3500 MHz
GSP2 out
DQ2A
GSP1
VBW Resonance Point, 2--tone, 1 MHz Tone Spacing
(IMD Third Order Intermodulation Inflection Point)
VBW
—
360
—
MHz
%
res
(4)
Quiescent Current Accuracy over Temperature
I
QT
with 2.2 k Gate Feed Resistors (–40 to 85C) Stage 1
with 2.2 k Gate Feed Resistors (–40 to 85C) Stage 2
—
—
2.8
6.3
—
—
1--carrier 20 MHz LTE, 8 dB Input Signal PAR
Gain
G
—
—
—
—
—
—
28.3
40.5
—
—
—
—
—
—
dB
%
Power Added Efficiency
PAE
ACPR
ALT1
ALT2
Adjacent Channel Power Ratio
Adjacent Channel Power Ratio
Adjacent Channel Power Ratio
–30.7
–40.1
–50.7
0.5
dBc
dBc
dBc
dB
(5)
Gain Flatness
G
F
Fast CW, 27 ms Sweep
P
@ 3 dB Compression Point
P3dB
—
—
—
47.2
–28
—
—
—
dBm
out
AM/PM @ P3dB
Gain Variation @ Avg. Power over Temperature
G
0.037
dB/C
(–40C to +105C)
P3dB Variation over Temperature
P3dB
—
0.013
—
dB/C
(–40C to +105C)
Table 7. Ordering Information
Device
Tape and Reel Information
T2 Suffix = 2,000 Units, 24 mm Tape Width, 13--inch Reel
Package
A3M35TL039T2
10 mm 6 mm Module
1. Part input and output matched to 50 ohms.
2. ATE is a socketed test environment.
3. All data measured in fixture with device soldered in NXP reference circuit.
4. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current
Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.
5. Gain flatness = Max(G(f
to f
)) – Min(G(f
to f
))
Low
High
Low
High
A3M35TL039
RF Device Data
NXP Semiconductors
6
VD3
VD4
Rev. 5.0
RF
IN
RF
OUT
Q1
R1
C4
C1
C2
C3
L1
D136390
C10
L2
C5
C8
C6
R8
C7
R9
R7
R6
R3
R4
R5
R2
C9
R10
Cꢁ11
C13
C12
V
GP2
V
GP1
V
GC1
V
GC2
VD1
VD2
aaa--037621
Figure 2. A3M35TL039 Reference Circuit Component Layout
Table 8. A3M35TL039 Reference Circuit Component Designations and Values
Part
Description
10 F Chip Capacitor
Part Number
Manufacturer
C1, C4, C11, C12
GRM31CR61H106KA12
GRM188R61H105KAAL
GRM155R61H104KE19
MCGPR100V227M16X26
BLM15PD300SN1
A3M35TL039
Murata
C2, C3, C9, C10
C5, C6, C7, C8
C13
1 F Chip Capacitor
Murata
0.1 F Chip Capacitor
Murata
220 F, 100 V Electrolytic Capacitor
30 Ferrite Bead
Multicomp
Murata
L1, L2
Q1
Power Amplifier Module
5.1 , 1/10 W Chip Resistor
2.2 k, 1/20 W Chip Resistor
0 , 1/20 W Chip Resistor
2.0 , 1/20 W Chip Resistor
NXP
R1, R6
ERJ-2GEJ5R1X
Panasonic
Panasonic
Panasonic
Panasonic
MTL
R2, R3, R4, R5
R7, R8, R10
R9
ERJ-1GNJ222C
ERJ-1GN0R00C
ERJ-1GNJ2R0C
PCB
Rogers RO4350B, 0.020, = 3.66
D136390
r
A3M35TL039
RF Device Data
NXP Semiconductors
7
A3M35TL039
AWLYYWWZ
Figure 3. Product Marking
A3M35TL039
RF Device Data
NXP Semiconductors
8
PACKAGE INFORMATION
A3M35TL039
RF Device Data
NXP Semiconductors
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A3M35TL039
RF Device Data
NXP Semiconductors
10
A3M35TL039
RF Device Data
NXP Semiconductors
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A3M35TL039
RF Device Data
NXP Semiconductors
12
A3M35TL039
RF Device Data
NXP Semiconductors
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A3M35TL039
RF Device Data
NXP Semiconductors
14
PRODUCT DOCUMENTATION AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family
Development Tools
Printed Circuit Boards
FAILURE ANALYSIS
At this time, because of the physical characteristics of the part, failure analysis is limited to electrical signature analysis.
In cases where NXP is contractually obligated to perform failure analysis (FA) services, full FA may be performed by third
party vendors with moderate success. For updates contact your local NXP Sales Office.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
1
2
May 2020
Sept. 2020
Dec. 2020
Initial release of data sheet
General updates made to align data sheet to current standard
Changed higher frequency operation of the part from 3600 MHz to 3650 MHz. Added 3640 MHz to
performance table with corresponding measured data, p. 1
Table 4, ESD Protection Characteristics: updated Human Body Model ESD from Class 1A to 1B to reflect
actual Qual Report results, p. 4
A3M35TL039
RF Device Data
NXP Semiconductors
15
Information in this document is provided solely to enable system and software
implementers to use NXP products. There are no express or implied copyright licenses
granted hereunder to design or fabricate any integrated circuits based on the information
in this document. NXP reserves the right to make changes without further notice to any
products herein.
How to Reach Us:
Home Page:
nxp.com
Web Support:
nxp.com/support
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products for any particular purpose, nor does NXP assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation consequential or incidental damages. “Typical” parameters
that may be provided in NXP data sheets and/or specifications can and do vary in
different applications, and actual performance may vary over time. All operating
parameters, including “typicals,” must be validated for each customer application by
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E 2020 NXP B.V.
Document Number: A3M35TL039
Rev. 2, 12/2020
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