HEF4557BP,652 [NXP]
HEF4557B - 1-to-64 bit variable length shift register DIP 16-Pin;![HEF4557BP,652](http://pdffile.icpdf.com/pdf2/p00304/img/icpdf/HEF4557BP-65_1832432_icpdf.jpg)
型号: | HEF4557BP,652 |
厂家: | ![]() |
描述: | HEF4557B - 1-to-64 bit variable length shift register DIP 16-Pin 光电二极管 逻辑集成电路 触发器 |
文件: | 总16页 (文件大小:744K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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HEF4557B
1-to-64 bit variable length shift register
Rev. 7 — 1 April 2016
Product data sheet
1. General description
The HEF4557B is a static clocked serial shift register whose length may be programmed
to be any number of bits between 1 and 64. The number of bits selected is equal to the
sum of the subscripts of the enabled length control inputs (L1, L2, L4, L8, L16, and L32)
plus one. Serial data may be selected from the DA or DB data inputs with the A/B select
input. This feature is useful for recirculation purposes. Information on DA or DB is shifted
into the first register position and all the data in the register is shifted one position to the
right on the LOW to HIGH transition of CP0 while CP1 is LOW or on the HIGH to LOW
transition of CP1 while CP0 is HIGH. A HIGH on master reset (MR) resets the register and
forces Q to LOW and Q to HIGH, independent of the other inputs.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C
Complies with JEDEC standard JESD 13-B
3. Ordering information
Table 1.
Ordering information
All types operate from 40 C to +85 C
Type number
Package
Name
Description
Version
HEF4557BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
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Fig 1. Logic diagram
HEF4557B
Nexperia
1-to-64 bit variable length shift register
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Fig 2. Functional diagram
5. Pinning information
5.1 Pinning
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Fig 3. Pin configuration
5.2 Pin description
Table 2.
Pin description table
Symbol
Pin
Description
L1, L2, L4, L8, L16, L32
2, 1, 15, 14, 13, 12
bit-length control input
asynchronous master reset
clock input
MR
3
CP0
CP1
DA, DB
VSS
4
5
clock input
7, 6
8
data input
ground (0 V)
A/B
9
select data input
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
3 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
Table 2.
Symbol
Q
Pin description table …continued
Pin
10
11
Description
buffered output
Q
complementary buffered output
supply voltage
VDD
16
6. Functional description
Table 3.
Function table[1]
Inputs
Output
MR
L
A/B
L
DA
D1
D1
D1
D1
X
DB
D2
D2
D2
D2
X
CP0
CP1
L
Q
D2
D1
D2
D1
L
L
H
L
L
L
H
L
H
H
H
X
X
X
[1] The moment Dn appears at Q depends on the bit-length shown in Table 4; H = HIGH voltage level; L = LOW voltage level;
X = don’t care; = positive-going transition; = negative-going transition; D1, D2 = either HIGH or LOW.
Table 4.
Bit-length select function table
L32
L
L16
L
L8
L
L4
L
L2
L
L1
L
Register length
1-bit
L
L
L
L
L
H
L
2-bits
L
L
L
L
H
H
L
3-bits
L
L
L
L
H
L
4-bits
L
L
L
H
H
H
H
5-bits
L
L
L
L
H
L
6-bits
L
L
L
H
H
7-bits
L
L
L
H
8-bits
L1 to L16 continue to increment in a binary count with L32 LOW
L
H
L
L
H
L
L
H
L
L
H
L
L
H
L
32-bits
33-bits
34-bits
H
H
H
L1 to L16 continue to increment in a binary count with L32 HIGH
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
61-bits
62-bits
63-bits
64-bits
L
H
L
H
H
H
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
4 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
7. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDD
IIK
Parameter
Conditions
Min
Max
+18
Unit
V
supply voltage
0.5
input clamping current
input voltage
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
-
10
mA
V
VI
0.5
VDD + 0.5
10
IOK
output clamping current
input/output current
supply current
-
mA
mA
mA
C
II/O
-
10
IDD
-
65
40
-
50
Tstg
Tamb
Ptot
P
storage temperature
ambient temperature
total power dissipation
power dissipation
+150
+85
C
[1]
SO16 package
per output
500
mW
mW
-
100
[1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
8. Recommended operating conditions
Table 6.
Symbol
VDD
Recommended operating conditions
Parameter
Conditions
Min
Typ
Max
Unit
supply voltage
3
-
-
-
-
-
-
15
V
VI
input voltage
0
VDD
+85
3.75
0.5
V
Tamb
ambient temperature
input transition rise and fall rate
in free air
VDD = 5 V
VDD = 10 V
VDD = 15 V
40
C
t/V
-
-
-
s/V
s/V
s/V
0.08
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
5 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
9. Static characteristics
Table 7.
Static characteristics
VSS = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter
Conditions
VDD
Tamb = 40 C Tamb = 25 C
Tamb = 85 C Unit
Min
Max
-
Min
Max
-
Min
Max
VIH
HIGH-level input voltage
LOW-level input voltage
IO < 1 A
5 V
3.5
3.5
3.5
-
-
V
V
V
V
V
V
V
V
V
V
V
V
10 V
15 V
5 V
7.0
-
7.0
-
7.0
11.0
-
11.0
-
11.0
-
VIL
IO < 1 A
-
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
10 V
15 V
5 V
-
-
-
-
-
-
VOH
VOL
IOH
HIGH-level output voltage IO < 1 A
4.95
4.95
4.95
10 V
15 V
5 V
9.95
-
9.95
-
9.95
-
14.95
-
14.95
-
14.95
-
LOW-level output voltage
IO < 1 A
-
0.05
0.05
0.05
1.7
0.52
1.3
3.6
-
-
0.05
0.05
0.05
1.4
0.44
1.1
3.0
-
-
0.05
0.05
0.05
10 V
15 V
5 V
-
-
-
-
-
-
HIGH-level output current VO = 2.5 V
-
-
-
1.1 mA
0.36 mA
0.9 mA
2.4 mA
VO = 4.6 V
VO = 9.5 V
VO = 13.5 V
5 V
-
-
-
10 V
15 V
5 V
-
-
-
-
-
-
IOL
LOW-level output current
VO = 0.4 V
VO = 0.5 V
VO = 1.5 V
0.52
0.44
0.36
-
-
-
mA
mA
mA
10 V
15 V
15 V
5 V
1.3
-
1.1
-
0.9
3.6
-
3.0
-
2.4
II
input leakage current
supply current
-
-
-
-
-
0.3
50
100
200
-
-
-
-
-
-
0.3
50
-
-
-
-
-
1.0 A
375 A
750 A
1500 A
IDD
IO = 0 A
10 V
15 V
-
100
200
7.5
CI
input capacitance
-
pF
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
6 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
10. Dynamic characteristics
Table 8.
Dynamic characteristics
VSS = 0 V; Tamb = 25 C; for test circuit see Figure 6; unless otherwise specified.
Symbol Parameter
tPHL HIGH to LOW
propagation delay see Figure 4
Conditions
VDD
5 V
Extrapolation formula
213 ns + (0.55 ns/pF)CL
79 ns + (0.23 ns/pF)CL
57 ns + (0.16 ns/pF)CL
143 ns + (0.55 ns/pF)CL
69 ns + (0.23 ns/pF)CL
52 ns + (0.16 ns/pF)CL
213 ns + (0.55 ns/pF)CL
79 ns + (0.23 ns/pF)CL
57 ns + (0.16 ns/pF)CL
113 ns + (0.55 ns/pF)CL
59 ns + (0.23 ns/pF)CL
47 ns + (0.16 ns/pF)CL
10 ns + (1.00 ns/pF)CL
9 ns + (0.42 ns/pF)CL
6 ns + (0.28 ns/pF)CL
Min
Typ
240
90
Max Unit
480 ns
180 ns
130 ns
340 ns
160 ns
120 ns
480 ns
180 ns
130 ns
280 ns
140 ns
110 ns
120 ns
[1]
CP0, CP1 to Q, Q;
-
10 V
15 V
-
-
65
MR to Q; see Figure 4 5 V
-
-
170
80
10 V
15 V
5 V
-
60
[1]
tPLH
LOW to HIGH
CP0, CP1 to Q, Q;
-
240
90
propagation delay see Figure 4
10 V
15 V
-
-
65
MR to Q; see Figure 4 5 V
-
140
70
10 V
15 V
5 V
-
-
55
[1]
[2]
tt
transition time
set-up time
see Figure 4
-
60
10 V
15 V
5 V
-
30
60
40
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
20
tsu
DA, DB, A/B to CP0,
CP1; L1 to L32 = LOW;
see Figure 5
360
140
90
+40
+35
+30
40
10
0
180
70
10 V
15 V
5 V
-
45
-
DA, DB, A/B to CP0,
CP1; L32 = HIGH;
see Figure 5
20
10
5
-
10 V
15 V
5 V
-
-
[2]
th
hold time
DA, DB, A/B to CP0,
CP1; L1 to L32 = LOW;
see Figure 5
110
45
30
30
-
10 V
15 V
5 V
-
-
DA, DB, A/B to CP0,
CP1;
L1 to L32 = HIGH;
see Figure 5
90
60
50
-
10 V
15 V
20
-
15
-
tW
pulse width
CP0 input LOW;
minimum width;
see Figure 5
5 V
180
60
90
30
20
90
30
20
75
35
25
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
10 V
15 V
5 V
40
CP1 input HIGH;
minimum width;
see Figure 5
180
60
10 V
15 V
5 V
40
MR input HIGH;
minimum width;
see Figure 5
150
70
10 V
15 V
50
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
7 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
Table 8.
Dynamic characteristics …continued
VSS = 0 V; Tamb = 25 C; for test circuit see Figure 6; unless otherwise specified.
Symbol Parameter
Conditions
VDD
5 V
Extrapolation formula
Min
500
250
150
110
70
Typ
250
125
75
Max Unit
[2]
trec
recovery time
MR input;
L1 to L32 = LOW;
see Figure 5
-
-
-
-
-
-
-
-
-
ns
10 V
15 V
5 V
ns
ns
MR input;
L32 = HIGH
50
ns
10 V
15 V
5 V
30
ns
60
25
ns
fmax
maximum
frequency
see Figure 5
2.5
7
5
MHz
MHz
MHz
10 V
15 V
14
10
20
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] The set-up, hold, and recovery times vary with the minimum number of bits selected. For intermediate numbers not specified, interpolate
as shown in Table 9.
Table 9.
Length control inputs
Interpolation table [1]
Minimum number of Set-up, hold, and Example: trec
bits selected
recovery times
minimum, VDD = 5 V
L1
L
L2
L
L4
L
L8
L
L16
L
L32
L
1
see Table 8
500 ns
435 ns
370 ns
305 ns
240 ns
175 ns
110 ns
H
X
X
X
X
X
L
L
L
L
L
2
(interpolate in 6
equal steps)
H
X
X
X
X
L
L
L
L
3
H
X
X
X
L
L
L
5
H
X
X
L
L
9
H
X
L
17
33
H
see Table 8
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
Table 10. Dynamic power dissipation PD
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol
Parameter
VDD
5 V
Typical formula for PD (W)
where:
2
PD
dynamic power
dissipation
PD = 3500 fi + (fo CL) VDD
fi = input frequency in MHz,
fo = output frequency in MHz,
CL = output load capacitance in pF,
VDD = supply voltage in V,
2
2
10 V
15 V
PD = 15000 fi + (fo CL) VDD
PD = 37000 fi + (fo CL) VDD
(fo CL) = sum of the outputs.
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
8 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
11. Waveforms
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For measurement points see Table 11.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 4. Propagation delays
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
9 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
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Set-up and hold times are shown as positive values but may be specified as negative values.
The shaded area indicates where data can change for predictable performance.
For measurement points see Table 11.
Fig 5. Waveforms showing recovery time for MR and minimum CP0, CP1, and MR pulse widths, set-up and hold
times for DA, DB, and A/B to CP0 and CP1
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
10 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
W
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a. Input waveforms
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7
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b. Test circuit
Test data is given in Table 11.
Definitions for test circuit:
Device Under Test (DUT)
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Test circuit for measuring switching times
Table 11. Measurement points and test data
Supply voltage
VDD
Input
VI
Load
CL
VM
tr, tf
5 V to 15 V
VDD
0.5VI
20 ns
50 pF
HEF4557B
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©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
11 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
12. Package outline
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Fig 7. Package outline SOT109-1 (SO16)
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
12 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
13. Revision history
Table 12. Revision history
Document ID
HEF4557B v.7
Modifications:
HEF4557B v.6
Modifications:
Release date
20160401
Data sheet status
Change notice
Supersedes
Product data sheet
-
HEF4557B v.6
• Type number HEF4557BP (SOT38-4) removed.
20111118 Product data sheet
• Section Applications removed
-
HEF4557B v.5
• Table 7: IOH minimum values changed to maximum
• Figure 5: “A/B input” changed to “A/B input”
HEF4557B v.5
20091216
20090916
19950101
19950101
Product data sheet
Product data sheet
Product specification
Product specification
-
-
-
-
HEF4557B v.4
HEF4557B_CNV v.3
HEF4557B_CNV v.2
-
HEF4557B v.4
HEF4557B_CNV v.3
HEF4557B_CNV v.2
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
13 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
14. Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
Suitability for use — Nexperia products are not designed,
14.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
14.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
14 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
15. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
HEF4557B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 7 — 1 April 2016
15 of 16
HEF4557B
Nexperia
1-to-64 bit variable length shift register
16. Contents
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13
7
8
9
10
11
12
13
14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
14.1
14.2
14.3
14.4
15
16
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 01 April 2016
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