HEF4754 [NXP]
18-element bar graph LCD driver; 18元条形图LCD驱动器
| 型号： | HEF4754 |
| 厂家： | 
NXP |
| 描述： | 18-element bar graph LCD driver |
| 文件： | 总7页 (文件大小：70K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
• The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4754V
LSI
18-element bar graph LCD driver
January 1995
Product specification
File under Integrated Circuits, IC04
Philips Semiconductors
Product specification
HEF4754V
LSI
18-element bar graph LCD driver
DESCRIPTION
The HEF4754V drives an 18-element bar graph LCD in linear relation to the control voltage (Vc) in a pointer or
thermometer mode.
Fig.1 Functional diagram.
FAMILY DATA
See Family Specifications
January 1995
2
Philips Semiconductors
Product specification
HEF4754V
LSI
18-element bar graph LCD driver
PINNING
VOSC
Vc
oscillator terminal
control voltage input
Vref min
Vref max
I1
reference voltage inputs
thermometer/pointer
(choice select input)
I2
I3
peak value; reset/9 or 18 bars
(choice select input)
reset; repetitively reset
(choice select input)
O1 to O18
OR
bar outputs
back plate output
HEF4754VP(N): 28-lead DIL; plastic
(SOT117-2)
HEF4754VD(F): 28-lead DIL; ceramic (cerdip)
(SOT135)
HEF4754VT(D): 28-lead SO; plastic
(SOT136-1)
( ): Package Designator North America
FUNCTION TABLE
I1
I2 I3 MODE
L
L
L
H
L
X
X
X
L
pointer; 18 bars
pointer; 9 bars
H
H
thermometer; no peak value
H
thermometer; peak value, repetitively
reset
Fig.2 Pinning diagram.
H
H
H
thermometer; peak value, manually
reset
Note
1. H = HIGH state (the more positive voltage)
2. L = LOW state (the less positive voltage)
3. X = state is immaterial
January 1995
3
Philips Semiconductors
Product specification
HEF4754V
LSI
18-element bar graph LCD driver
The distance between the switching levels of the
GENERAL DESCRIPTION
comparators is defined by the voltage difference across
this divider. The extremities of the resistor divider are
coupled via high-input amplifiers to the maximum
reference voltage input and the minimum reference
voltage input.
The HEF4754V drives an 18-element bar graph LCD in
linear relation to the control voltage (Vc) in a pointer or
thermometer mode. The first bar lights up when Vc is
smaller than VT(bar)2 (see equation [3] below).
In the pointer mode, the circuit can drive 9 or 18 bars; in
the thermometer mode, the circuit also drives the peak
value indication. This can be reset or repetitively reset,
after 1,5 to 2 seconds.
The digital part has one reference output (OR) to drive the
back plate, and 18 outputs (O1 to O18) to drive each bar.
Three latches and some gates are incorporated for each
bar output. An on-chip oscillator (1024 Hz) with external R
and C drives the circuit. The outputs are driven at 64 Hz.
The select inputs I1 to I3 are provided with an on-chip
pull-up element, and they may therefore be left floating
(equals HIGH state).
The circuit has analogue and digital parts. The analogue
part consists of 17 comparators, with their non-inverting
inputs connected together and coupled to the control input
Vc. The inverting inputs of the comparators are connected
in succession to the nodes of an 18-part resistor divider.
LINEARITY
VDD = 10 V; Vref max = 9,5 V; Vref min = 0,5 V; Tamb = 25 °C
∆V1 = 250 mV (this is the tolerance of the step voltage).
Vstep = Vstep"" + ∆V1
[1]
Vstep’ is the (internal) voltage drop across the resistor-ladder
network.
(Vref max ±∆V2) – (Vref min ±∆V2)
---------------------------------------------------------------------------------------
Vstep′
=
[2]
18
∆V2 is the maximum offset voltage spread of the on-chip
voltage follower.
∆V2 = 250 mV.
The linearity is guaranteed for VDD > 10 V.
The monotony between VDD = 5 V and 10 V is guaranteed.
During ramping-up of the input voltage a maximum of two
bars might be activated simultaneously.
ABSOLUTE VOLTAGE TRIGGER LEVEL
The absolute voltage trigger level at the Vc pin is VT(bar)n;
VT (bar) n = {Vref min ±∆V2*} + { (n – 1) Vstep′± ∆V1} , in which
[3]
n = number of bars; 2 ≤ n ≤ 18.
For n = 1 (first bar) see text above.
Note
* For ∆V2 the same sign (+ or −) should be used as in equation [2].
January 1995
4
Philips Semiconductors
Product specification
HEF4754V
LSI
18-element bar graph LCD driver
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Supply voltage
VDD
VI
−0,5 to + 18 V
−0,5 to VDD + 0,5 V
Voltage on any input
D.C. current into any input or output
Storage temperature
± II
max
10 mA
−25 to + 125 °C
−20 to + 85 °C
Tstg
Tamb
Operating ambient temperature
DC CHARACTERISTICS
VSS = 0 V
Tamb (°C)
VDD
V
SYMBOL
−40
+ 25
+ 85
NOTES
MIN. MAX. MIN. TYP.
MAX.
MIN. MAX.
Quiescent device
current
5
10
15
5
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
µA
µA
µA
nA
nA
nA
V
IDD
−
−
−
1000
1600
100
100
100
−
−
−
1
2
−
−
−
−
−
Input leakage
current (except)
select inputs)
−
−
−
−
−
10
15
5
± IIN
−
−
−
−
−
−
−
−
−
−
Input voltage HIGH
select inputs
3,5
7,0
11,0
−
−
3,5
7,0
11,0
−
3,5
7,0
11,0
−
−
10
15
5
VIH
−
−
−
V
−
−
−
V
Input voltage LOW
select inputs
1,5
3,0
4,0
−
1,5
3,0
4,0
−
1,5
3,0
4,0
−
V
10
15
5
VIL
−
−
−
V
−
−
−
V
Output voltage
HIGH
4,99
9,99
−
4,99
9,99
14,99
−
4,95
9,95
−
V
10
15
5
VOH
VOL
−IOH
IOL
−
−
−
V
3
3
4
5
6
−
−
−
V
Output voltage
LOW
−
0,01
0,01
0,01
−
0,01
0,01
0,01
−
−
0,05
0,05
0,05
−
V
10
15
5
−
−
−
V
−
−
−
V
Output current
HIGH
0,36
0,80
3,0
0,34
1,00
4,40
−
0,3
0,7
2,8
0,3
0,9
4,0
0
0,24
0,56
2,60
0,24
0,72
3,20
−
mA
mA
mA
mA
mA
mA
V
10
15
5
−
−
−
−
−
−
Output current
LOW
−
−
−
10
15
5
−
−
−
−
−
−
Input voltage
−
5
−
control input Vc
10
15
VIC
−
−
0
10
15
−
−
V
−
−
0
−
−
V
January 1995
5
Philips Semiconductors
Product specification
HEF4754V
LSI
18-element bar graph LCD driver
Tamb (°C)
+ 25
MIN. MAX. MIN. TYP.
VDD
V
SYMBOL
−40
+ 85
MIN. MAX.
NOTES
MAX.
4,5
Max. input voltage
ref max input
5
−
−
−
−
−
−
−
−
−
−
−
−
−
−
4,5
4,5
4,5
0,5
0,5
0,5
−
−
−
−
−
−
−
−
−
−
V
V
10
15
5
VIRmax
−
9,5
14,5
0,5
5,5
10,5
−
−
−
−
−
−
−
V
6
−
V
Min. input voltage
ref min input
−
V
V
10
15
10
VIRmin
−
V
6
−
V
Operating supply
current
IDD
750
µA
Fig.3
Notes
1. Vref min = 0,5 V; Vref max = 9,5 V; Vosc = Vc = 0 V; I1, I2 and I3 at VDD
.
2. Pin under test at VSS or VDD, all other inputs simultaneously at VSS or VDD
.
3. IO = 0; all inputs at VSS or VDD
.
4. At VDD = 5 V: VOH = 4,5 V.
At VDD = 10 V: VOH = 9,5 V.
At VDD = 15 V: VOH = 13,5 V.
5. At VDD = 5 V: VOL = 0,4 V; inputs at VSS or VDD
At VDD = 10 V: VOL = 0,5 V; inputs at VSS or VDD
At VDD = 15 V: VOL = 1,5 V; inputs at VSS or VDD
.
.
.
6. Vref min + 4 V < Vref max
.
January 1995
6
Fig.3 Typical operating set-up.
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