I74F257AN,112 [NXP]
74F257A - Quad 2-line to 1-line selector/multiplexer, non-inverting (3-State) DIP 16-Pin;型号: | I74F257AN,112 |
厂家: | NXP |
描述: | 74F257A - Quad 2-line to 1-line selector/multiplexer, non-inverting (3-State) DIP 16-Pin 光电二极管 逻辑集成电路 |
文件: | 总10页 (文件大小:85K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F257A
Quad 2-line to 1-line selector/multiplexer,
non-inverting (3-State)
Product specification
IC15 Data Handbook
1995 Mar 31
Philip s Se m ic ond uc tors
Philips Semiconductors
Product specification
Quad 2-line to 1-line selector/multiplexer, non-inverting
(3-State)
74F257A
FEATURES
PIN CONFIGURATION
• Industrial range available (–40°C to +85°C)
S
I0a
I1a
Ya
1
2
3
4
5
16
V
CC
• Multifunction capability
• Non-inverting data path
• 3-State outputs
15 OE
14 I0d
13 I1d
12 Yd
11 I0c
10 I1c
• See 74F258A for inverting version
I0b
I1b
Yb
6
7
8
DESCRIPTION
The 74F257A has four identical 2-input multiplexers with 3-State
outputs which select 4 bits of data from two sources uncer control of
a common Select (S) input. The I0a inputs are selected when the
common Select input is Low and the I1n inputs are selected when
the common Select input is High. Data appears at the outputs in true
non-inverted form from the selected inputs. The 74F257A is the logic
implementation of a 4-pole, 2-position switch where the position of
the switch is determined by the logic levels supplied to the common
Slect input. Outputs are forced to a high impedance “off” state when
the Output Enable (OE) is High. All but one device must be in high
impedance state to avoid currents that would exceed the maximum
rating if the outputs were tied together. Design of the Output Enable
signals must ensure that there is no overlap when outputs of 3-state
devices were tied together.
GND
9
Yc
SF00673
TYPICAL
TYPICAL
PROPAGATION DELAY
SUPPLY CURRENT
(TOTAL)
TYPE
74F257A
4.3ns
12mA
ORDERING INFORMATION
ORDER CODE
DRAWING
NUMBER
DESCRIPTION
COMMERCIAL RANGE
= 5V ±10%, T = 0°C to +70°C
INDUSTRIAL RANGE
= 5V ±10%, T = –40°C to +85°C
V
CC
V
CC
amb
amb
16-pin plastic DIP
16-pin plastic SO
N74F257AN
N74F257AD
I74F257AN
I74F257AD
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
I0n, I1n
S
DESCRIPTION
74F (U.L.) HIGH/LOW
1.0/1.0
LOAD VALUE HIGH/LOW
20µA/0.6mA
Data inputs
Common Select input
Output Enable input (active Low)
Data outputs
1.0/1.0
20µA/0.6mA
OE
1.0/1.0
20µA/0.6mA
Ya – Yd
150/33
3.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
15
1
EN
G1
2
3
5
6
11 10 14 13
MUX
2
3
1
1
4
7
9
I0a I1a I0b I1b I0c I1c I0d I1d
1
S
5
6
15
OE
10
11
Ya Yb Yc Yd
13
14
12
4
7
9
12
V
= Pin 16
CC
GND = Pin 8
SF00675
SF00674
2
1995 Mar 31
853–0360 15059
Philips Semiconductors
Product specification
Quad 2-line to 1-line selector/multiplexer, non-inverting
(3-State)
74F257A
LOGIC DIAGRAM
FUNCTION TABLE
INPUTS
OUTPUT
OE
15
I0a
I1a
I0b
I1b
I0c
I1c
I0d
14
I1d
13
S
OE
H
L
S
X
H
H
L
I0
X
X
X
L
I1
X
L
Y
Z
L
2
3
5
6
11
10
1
L
H
X
X
H
L
L
L
L
H
H
H
L
X
=
=
=
=
High voltage level
Low voltage level
Don’t care
Z
High impedance “off” state
4
7
9
12
Yd
Ya
Yb
Yc
V
= Pin 16
CC
GND = Pin 8
SF00676
APPLICATION
C
B
A
ENABLE
74F139
S2
S1
S0
Y0 Y1 Y2 Y3
WORD A
WORD B
WORD C
WORD D
WORD E
WORD F
WORD G
WORD H
I0a I1a I0b I1b I0c I1c I0d I1d
I0a I1a I0b I1b I0c I1c I0d I1d
I0a I1a I0b I1b I0c I1c I0d I1d
I0a I1a I0b I1b I0c I1c I0d I1d
OE
OE
OE
OE
74F257A
74F257A
74F257A
74F257A
S
S
S
S
Ya
Yb
Yc
Yd
Ya
Yb
Yc
Yd
Ya
Yb
Yc
Yd
Ya
Yb
Yc
Yd
4-BIT
DATA
BUS
SF00677
3
1995 Mar 31
Philips Semiconductors
Product specification
Quad 2-line to 1-line selector/multiplexer, non-inverting
(3-State)
74F257A
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
Supply voltage
Input voltage
Input current
CC
IN
V
V
I
mA
V
IN
V
Voltage applied to output in High output state
Current applied to output in Low output state
–0.5 to V
48
OUT
OUT
CC
I
mA
°C
°C
°C
Commercial range
Industrial range
0 to +70
–40 to +85
–65 to +150
T
amb
Operating free-air temperature range
Storage temperature range
T
stg
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
NOM
MAX
V
Supply voltage
5.0
5.5
V
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
2.0
0.8
–18
–3
V
I
I
I
mA
mA
mA
°C
°C
IK
High-level output current
Low-level output current
OH
OL
24
Commercial range
Industrial range
0
+70
+85
T
amb
Operating free-air temperature range
–40
4
1995 Mar 31
Philips Semiconductors
Product specification
Quad 2-line to 1-line selector/multiplexer, non-inverting
(3-State)
74F257A
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
1
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
MAX
2
MIN
2.4
TYP
V
V
±10%V
±5%V
CC
V
V
= MIN, V = MAX,
IL
CC
IH
V
OH
High-level output voltage
= MIN, I = MAX
OH
2.7
3.3
0.35
0.35
–0.73
CC
0.50
V
±10%V
CC
V
V
= MIN, V = MAX,
IL
CC
IH
V
V
Low-level output voltage
OL
= MIN, I = MAX
OL
0.50
–1.2
100
20
V
V
±5%V
CC
Input clamp voltage
V
CC
V
CC
V
CC
V
CC
= MIN, I = I
I IK
IK
I
I
I
Input current at maximum input voltage
High-level input current
= MAX, V = 7.0V
µA
µA
mA
I
I
= MAX, V = 2.7V
IH
IL
I
Low-level input current
= MAX, V = 0.5V
–0.6
I
Off state output current,
High-level voltage applied
I
V
= MAX, V = 2.7V
50
µA
µA
OZH
CC
O
Off state output current,
Low-level voltage applied
I
I
V
V
= MAX, V = 0.5V
–50
OZL
CC
O
3
Short-circuit output current
= MAX
-60
–150
15.0
22.0
23.0
mA
mA
mA
mA
OS
CC
I
I
9.0
CCH
4
I
14.5
15.0
I
Supply current (total)
V
CC
= MAX
CCL
CC
CCZ
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
4. Measure I with all outputs open and inputs grounded.
CC
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
V
= +25°C
= +5.0V
T
V
= 0°C to +70°C
= +5.0V ± 10%
T
= –40°C to +85°C
amb
CC
amb
CC
amb
V
TEST
= +5.0V ± 10%
CC
SYMBOL
PARAMETER
UNIT
CONDITION
C = 50pF
L
C = 50pF
L
C = 50pF
L
R = 500Ω
L
R = 500Ω
L
R = 500Ω
L
MIN TYP MAX
MIN
MAX
MIN
MAX
t
t
Propagation delay
In to Yn
3.0
2.0
4.5
3.5
6.0
5.0
3.0
2.0
7.0
6.0
3.0
2.0
7.0
7.0
PLH
PHL
Waveform 1
Waveform 1
ns
ns
ns
ns
t
t
Propagation delay
S to Yn
5.0
4.0
7.5
5.5
9.5
7.0
5.0
4.0
10.5
8.0
5.0
4.0
10.5
8.5
PLH
PHL
t
t
Output Enable time
to High or Low level
Waveform 2
Waveform 3
4.5
4.5
6.5
6.0
7.5
7.5
4.5
4.5
8.5
8.5
4.5
4.5
8.5
8.5
PZH
PZL
t
t
Output Disable time
from High or Low level
Waveform 2
Waveform 3
2.0
2.0
4.0
3.5
5.5
5.5
2.0
2.0
6.0
6.0
2.0
2.0
6.0
6.0
PHZ
PLZ
5
1995 Mar 31
Philips Semiconductors
Product specification
Quad 2-line to 1-line selector/multiplexer, non-inverting
(3-State)
74F257A
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
V
In or S
V
M
M
t
t
PHL
PLH
V
V
Yn
M
M
SF00679
Waveform 1. Propagation Delay, Data and Select to Output
OE
OE
Yn
V
V
V
V
M
M
t
M
M
t
t
t
PLZ
PZH
PHZ
PZL
V
–0.3V
OH
V
V
M
M
V
+0.3V
Yn
OL
0V
SF00213
SF00214
Waveform 2. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
Waveform 3. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
V
CC
t
w
AMP (V)
0V
7.0V
90%
90%
NEGATIVE
PULSE
V
V
M
R
L
M
V
V
OUT
IN
10%
10%
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
T
L
t
t )
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
Test Circuit for 3-State Outputs
10%
10%
t
w
SWITCH POSITION
TEST
SWITCH
closed
closed
open
Input Pulse Definition
t
t
PLZ
PZL
All other
DEFINITIONS:
R
L
C
L
R
T
=
=
=
Load resistor;
INPUT PULSE REQUIREMENTS
see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
Termination resistance should be equal to Z
pulse generators.
family
V
M
rep. rate
t
w
t
t
THL
amplitude
TLH
of
OUT
2.5ns
2.5ns
74F
3.0V
1.5V
1MHz
500ns
SF00777
6
1995 Mar 31
Philips Semiconductors
Product specification
Quad 2-line 1-line selector/multiplexer, non-inverting (3-State)
74F257A
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
7
1995 Mar 31
Philips Semiconductors
Product specification
Quad 2-line 1-line selector/multiplexer, non-inverting (3-State)
74F257A
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
8
1995 Mar 31
Philips Semiconductors
Product specification
Quad 2-line 1-line selector/multiplexer, non-inverting (3-State)
74F257A
NOTES
9
1995 Mar 31
Philips Semiconductors
Product specification
Quad 2-line 1-line selector/multiplexer, non-inverting (3-State)
74F257A
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1996
All rights reserved. Printed in U.S.A.
(print code)
Date of release: July 1994
9397-750-05107
Document order number:
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