I74F86N,602 [NXP]
74F86 - Quad 2-input exclusive-OR gate DIP 14-Pin;
| 型号： | I74F86N,602 |
| 厂家： | 
NXP |
| 描述： | 74F86 - Quad 2-input exclusive-OR gate DIP 14-Pin |
| 文件： | 总8页 (文件大小：70K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F86
Quad 2-input exclusive-OR gate
Product specification
IC15 Data Handbook
1990 Feb 09
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input Exclusive-OR gate
74F86
FEATURE
PIN CONFIGURATION
• Industrial temperature range available (–40°C to +85°C)
D0a
D0b
Q0
1
2
3
4
5
14
V
CC
13 D3b
12 D3a
11 Q3
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL SUPPLY
CURRENT
(TOTAL)
D1a
D1b
74F86
4.3ns
16.5mA
10 D2b
Q1
6
7
9
8
D2a
Q2
GND
SF00038
ORDERING INFORMATION
ORDER CODE
COMMERCIAL RANGE
= 5V ±10%, T = 0°C to +70°C
INDUSTRIAL RANGE
DESCRIPTION
PKG DWG #
V
CC
V
CC
= 5V ±10%, T
= –40°C to +85°C
amb
amb
14-pin plastic DIP
14-pin plastic SO
N74F86N
N74F86D
I74F86N
SOT27-1
I74F86D
SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
Dna, Dnb
Qn
DESCRIPTION
Data inputs
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
20µA/0.6mA
1.0/1.0
50/33
Data output
1.0mA/20mA
NOTE:
1. One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC DIAGRAM
FUNCTION TABLE
1
2
INPUTS
OUTPUT
D0a
3
6
Q0
D0b
Dna
L
Dnb
L
Qn
L
4
5
D1a
D1b
Q1
Q2
Q3
L
H
H
H
L
9
D2a
D2b
8
H
L
10
H
H
12
13
11
V
= Pin 14
D3a
D3b
CC
GND = Pin 7
NOTES:
H
L
= High voltage level
= Low voltage level
SF00090
LOGIC SYMBOL
IEC/IEEE SYMBOL
1
2
4
5
9
10 12 13
1
2
=
3
6
D0a D0bD1a D1bD2a D2b D3a D3b
Q0 Q1 Q2 Q3
4
5
9
8
10
V
= Pin 14
CC
3
6
8
11
GND = Pin 7
SF00040
12
13
11
SF00091
2
February 9, 1990
853–0336 98773
Philips Semiconductors
Product specification
Quad 2-input Exclusive-OR gate
74F86
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
Supply voltage
Input voltage
Input current
CC
IN
V
V
I
mA
IN
V
Voltage applied to output in High output state
Current applied to output in Low output state
–0.5 to V
V
OUT
OUT
CC
I
40
mA
°C
°C
°C
Commercial range
Industrial range
0 to +70
T
amb
Operating free-air temperature range
Storage temperature range
–40 to +85
–65 to +150
T
stg
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
NOM
MAX
V
Supply voltage
5.0
5.5
V
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
2.0
0.8
–18
–1
V
I
I
I
mA
mA
mA
°C
°C
IK
High-level output current
Low-level output current
OH
OL
20
Commercial range
Industrial range
0
+70
+85
T
amb
Operating free-air temperature range
–40
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
1
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
2
MIN
TYP
MAX
V
V
V
V
V
V
V
V
V
= MIN, V = MAX
±10%V
2.5
2.7
V
V
CC
IL
CC
V
High-level output voltage
Low-level output voltage
OH
= MIN, I = MAX
±5%V
3.4
IH
OH
CC
= MIN, V = MAX
±10%V
0.30
0.30
-0.73
0.50
0.50
–1.2
100
V
CC
IL
CC
CC
V
V
OL
= MIN, I = MAX
±5%V
V
IH
OL
Input clamp voltage
= MIN, I = I
IK
V
IK
CC
CC
CC
CC
CC
I
I
I
I
I
Input current at maximum input voltage
High-level input current
= MAX, V = 7.0V
µA
µA
mA
mA
I
I
= MAX, V = 2.7V
20
IH
IL
I
Low-level input current
= MAX, V = 0.5V
–0.6
–150
I
3
Short-circuit output current
= MAX
= MAX
= MAX
-60
OS
D0a = GND,
D0b = 4.5V
I
V
V
15
18
23
28
mA
mA
CCH
CC
I
Supply current (total)
CC
I
V
= 4.5V
CCL
CC
IN
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
3
February 9, 1990
Philips Semiconductors
Product specification
Quad 2-input Exclusive-OR gate
74F86
AC ELECTRICAL CHARACTERISTICS
LIMITS
V
= +5.0V
= +25°C
= +5.0V ± 10%
= 0°C to +70°C
V
= +5.0V ± 10%
CC
CC
CC
T
amb
T = –40°C to +85°C
amb
TEST
CONDITION
SYMBOL
PARAMETER
UNIT
C = 50pF
R = 500Ω
L
C = 50pF
R = 500Ω
L
C = 50pF
R = 500Ω
L
L
L
L
MIN TYP MAX
MIN
MAX
MIN
MAX
t
t
Propagation delay
Dna or Dnb to Qn
(other input Low)
Waveform 1
Waveform 2
3.0
3.0
4.0
4.2
5.5
5.5
3.0
3.0
6.5
6.5
3.0
2.5
7.0
8.0
ns
ns
PLH
PHL
t
t
Propagation delay
Dna or Dnb to Qn
3.5
3.0
5.3
4.7
7.0
6.5
3.5
3.0
8.0
7.5
3.5
3.0
10.0
8.0
PLH
PHL
(other input High)
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
V
IN
V
V
V
M
IN
M
V
M
V
M
t
t
PHL
PLH
t
t
PLH
PHL
V
V
M
M
V
V
V
M
OUT
M
V
OUT
SF00093
SF00092
Waveform 1. Propagation Delay for Non-Inverting Outputs
Waveform 2. Propagation Delay for Inverting Outputs
TEST CIRCUIT AND WAVEFORMS
t
w
AMP (V)
0V
V
CC
90%
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
family
74F
V
rep. rate
t
w
t
t
THL
amplitude
M
TLH
Termination resistance should be equal to Z
pulse generators.
of
OUT
2.5ns 2.5ns
3.0V
1.5V
1MHz
500ns
SF00006
4
February 9, 1990
Philips Semiconductors
Product specification
Quad 2-input exclusive-OR gate
74F86
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
5
1990 Feb 09
Philips Semiconductors
Product specification
Quad 2-input exclusive-OR gate
74F86
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
6
1990 Feb 09
Philips Semiconductors
Product specification
Quad 2-input exclusive-OR gate
74F86
NOTES
7
1990 Feb 09
Philips Semiconductors
Product specification
Quad 2-input exclusive-OR gate
74F86
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05068
Document order number:
Philips
Semiconductors
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