IP3088CX15_技术文档

IP3088CX5; IP3088CX10;

IP3088CX15; IP3088CX20

Integrated 2, 4, 6 and 8-channel passive LC-filter network with

ESD protection to IEC 61000-4-2 level 4

Rev. 01 — 12 February 2010

Product data sheet

1. Product profile

1.1 General description

IP3088CX5, IP3088CX10, IP3088CX15 and IP3088CX20 is a 2, 4, 6 and 8-channel LC

low-pass filter array family which is designed to provide filtering of undesired RF signals

on the I/O ports of portable communication or computing devices. In addition, IP3088CX5,

IP3088CX10, IP3088CX15 and IP3088CX20 incorporates diodes to provide protection to

downstream components from ElectroStatic Discharge (ESD) voltages as high as ±15 kV

according IEC 61000-4-2 level 4.

The devices are fabricated using monolithic silicon technology and integrate and

incorporate up to 16 coils and 24 diodes in a 0.5 mm pitch Wafer-Level Chip-Scale

Package (WLCSP).

1.2 Features and benefits

Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)

Integrated 2, 4, 6 and 8-channel π-type LC-filter network

18 Ω channel series resistance; ≤ 45 pF (at 2.5 V DC) channel capacitance

Integrated ESD protection withstanding ±15 kV contact discharge, far exceeding

IEC 61000-4-2 level 4

ESD protection to ±30 kV contact discharge, per MIL-STD-883D, Method 3015

WLCSP with 0.5 mm pitch

1.3 Applications

Cellular and Personal Communication System (PCS) mobile handsets

Cordless telephones

Wireless data (WAN/LAN) systems and PDAs

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

2. Pinning information

2.1 Pinning

bump A1

index area

1

2

1

2

3

4

A

B

C

A

B

C

B1

B2

001aak061

001aak062

transparent top view,

solder balls facing down

transparent top view,

solder balls facing down

Fig 1. Pin configuration IP3088CX5

Fig 2. Pin configuration IP3088CX10

bump A1

index area

1

2

3

4

5

6

1

2

3

4

5

6

7

8

A

B

C

A

B

C

B1

B2

B3

B1

B2

B3

B4

001aak063

001aak064

transparent top view,

solder balls facing down

transparent top view,

solder balls facing down

Fig 3. Pin configuration IP3088CX15

Fig 4. Pin configuration IP3088CX20

2.2 Pin description

Table 1.

Pinning

Description

IP3088CX5

IP3088CX10

IP3088CX15

A1 and C1

A2 and C2

A3 and C3

A4 and C4

A5 and C5

A6 and C6

-

IP3088CX20

A1 and C1

A2 and C2

A3 and C3

A4 and C4

A5 and C5

A6 and C6

A7 and C7

A8 and C8

B1, B2, B3 and B4

A1 and C1

filter channel 1

filter channel 2

filter channel 3

filter channel 4

filter channel 5

filter channel 6

filter channel 7

filter channel 8

ground

A2 and C2

-

A3 and C3

-

A4 and C4

-

B1

B1 and B2

B1, B2 and B3

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

2 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

3. Ordering information

Table 2.

Ordering information

Type number

Package

Name

Description

wafer level chip-size package; 5 bumps; 0.96 × 1.28 × 0.65 mm

Version

IP3088CX5

IP3088CX10

IP3088CX15

IP3088CX20

WLCSP5

IP3088CX5

IP3088CX10

IP3088CX15

IP3088CX20

WLCSP10 wafer level chip-size package; 10 bumps; 1.96 × 1.28 × 0.65 mm

WLCSP15 wafer level chip-size package; 15 bumps; 2.96 × 1.28 × 0.65 mm

WLCSP20 wafer level chip-size package; 20 bumps; 3.96 × 1.28 × 0.65 mm

4. Functional diagram

A1 to A8

C1 to C8

B1 to B4

008aaa184

Fig 5. Schematic diagram IP3088CX5; IP3088CX10; IP3088CX15; IP3088CX20

5. Limiting values

Table 3.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_CC

Parameter

Conditions

Min

Max

Unit

supply voltage

−0.5

+5.6

V

V_ESD

electrostatic discharge voltage

all pins to ground

contact discharge

air discharge

[1]

−15

+15

kV

IEC 61000-4-2 level 4; all pins

to ground

contact discharge

air discharge

−8

+8

kV

−15

−30

+15

+30

MIL-STD-883D (method 3015)

HBM contact discharge

I_ch

channel current (DC)

storage temperature

ambient temperature

per inductor; T_amb= 85 °C

-

30

mA

°C

T_stg

T_amb

−65

−40

+150

+85

°C

[1] Device is qualified with 1000 pulses of ±15 kV contact discharges each, according to the IEC 61000-4-2 model and far exceeds the

specified level 4 (8 kV contact discharge).

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

3 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

6. Characteristics

Table 4.

Channel characteristics

T_amb= 25 °C; unless otherwise specified.

Symbol Parameter Conditions

Min

Typ

18

Max Unit

R_s(ch)

L_s(ch)

C_ch

channel series resistance

-

Ω

channel series inductance

channel capacitance

40

nH

pF

[1]

V_bias(DC)= 0 V;

f = 100 kHz

65

V_bias(DC)= 2.5 V;

f = 100 kHz

-

42

-

pF

V

V_BR

V_F

breakdown voltage

forward voltage

positive clamp;

5.8

−1.5

-

10

−0.4

0.1

I

_test= 1 mA

negative clamp;

-

V

I_F= −1 mA

I_LR

reverse leakage current

per channel; V_I= 3.5 V

-

μA

[1] Guaranteed by design.

Table 5.

Frequency characteristics

T_amb= 25 °C; unless otherwise specified.

Symbol Parameter Conditions

Min

Typ

Max Unit

α_il

insertion loss

R_gen= 50 Ω; R_L= 50 Ω

800 MHz < f < 1.5 GHz

1.5 GHz < f < 3.0 GHz

-

40

-

dB

33

dB

f_−3dB

cut-off frequency

R_gen= 50 Ω; R_L= 50 Ω;

V_bias(DC)= 0 V;

175

MHz

α_ilat 1 MHz − 3 dB

7. Application information

7.1 Insertion loss

IP3088CX5, IP3088CX10, IP3088CX15 and IP3088CX20 is mainly designed as an

ElectroMagnetic Interference (EMI) and Radio Frequency Interference (RFI) filter for

Subscriber Identity Module (SIM) card interfaces.

The setup for measuring insertion loss in a 50 Ω system is shown in Figure 6.

IN

OUT

DUT

50 Ω

TEST BOARD

V

gen

001aai755

Fig 6. Frequency response measurement configuration

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

4 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

As an example, the measured insertion loss magnitude for all channels of the

IP3088CX10 are shown in Figure 7.

001aak295

001aak296

0

s

21

(dB)

−10

−20

−30

−40

−50

−10

−20

−30

−40

−50

2

3

4

2

3

4

1

10

1

10

f (MHz)

a. Channel 1 (pins A1 and C1)

b. Channel 2 (pins A2 and C2)

001aak294

001aak297

0

s

21

(dB)

−10

−20

−30

−40

−50

−20

−30

−40

−50

2

3

4

2

3

4

1

10

1

10

f (MHz)

c. Channel 3 (pins A3 and C3)

Fig 7. Measured insertion loss magnitude

d. Channel 4 (pins A4 and C4)

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

5 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

8. Package outline

WLCSP20: wafer level chip-size package; 20 bumps (8-4-8)

D

bump A1

index area

A

2

E

A

1

detail X

e

1/2 e

b

C

B

A

e

1

B1

B2

B3

B4

e

2

1

2

3

4

5

6

7

8

e

3

X

European

projection

wlcsp20_8-4-8_po

Fig 8. Package outline IP3088CX20 (WLCSP20)

Table 6.

Dimensions for Figure 8

Min

Symbol

Typ

Max

0.70

0.26

0.44

0.37

4.01

1.33

-

Unit

mm

A

0.60

0.22

0.38

0.27

3.91

1.23

-

0.65

0.24

0.41

0.32

3.96

1.28

0.5

A₁

A₂

b

D

E

e

e₁

e₂

e₃

-

0.435

0.87

1.0

-

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

6 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

WLCSP15: wafer level chip-size package; 15 bumps (6-3-6)

D

bump A1

index area

A

2

E

A

1

detail X

e

1/2 e

b

C

B

A

e

1

B1

B2

B3

e

2

1

2

3

4

5

6

e

3

X

European

projection

wlcsp15_6-3-6_po

Fig 9. Package outline IP3088CX15 (WLCSP15)

Table 7.

Dimensions for Figure 9

Min

Symbol

Typ

Max

0.70

0.26

0.44

0.37

3.01

1.33

-

Unit

A

0.60

0.22

0.38

0.27

2.91

1.23

-

0.65

0.24

0.41

0.32

2.96

1.28

0.5

mm

A₁

A₂

b

D

E

e

e₁

e₂

e₃

-

0.435

0.87

1.0

-

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

7 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

WLCSP10: wafer level chip-size package; 10 bumps (4-2-4)

D

bump A1

index area

A

2

E

A

1

detail X

e

b

C

B

A

e

1

B1

B2

e

2

1

2

3

4

e

3

X

1/2 e

European

projection

wlcsp10_4-2-4_po

Fig 10. Package outline IP3088CX10 (WLCSP10)

Table 8.

Dimensions for Figure 10

Min

Symbol

Typ

Max

0.70

0.26

0.44

0.37

2.01

1.33

-

Unit

A

0.60

0.22

0.38

0.27

1.91

1.23

-

0.65

0.24

0.41

0.32

1.96

1.28

0.5

mm

A₁

A₂

b

D

E

e

e₁

e₂

e₃

-

0.435

0.87

1.0

-

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

8 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

WLCSP5: wafer level chip-size package; 5 bumps (2-1-2)

D

bump A1

index area

A

2

E

A

1

detail X

e

1/2 e

b

C

e

1

B1

e

2

B

A

1

2

X

European

projection

wlcsp5_2-1-2_po

Fig 11. Package outline IP3088CX5 (WLCSP5)

Table 9.

Dimensions for Figure 11

Min

Symbol

Typ

Max

0.70

0.26

0.44

0.37

1.01

1.33

-

Unit

mm

A

0.60

0.22

0.38

0.27

0.91

1.23

-

0.65

0.24

0.41

0.32

0.96

1.28

0.5

A₁

A₂

b

D

E

e

e₁

e₂

-

0.435

0.87

-

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

9 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

9. Soldering of WLCSP packages

9.1 Introduction to soldering WLCSP packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note

AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface

mount reflow soldering description”.

Wave soldering is not suitable for this package.

All NXP WLCSP packages are lead-free.

9.2 Board mounting

Board mounting of a WLCSP requires several steps:

1. Solder paste printing on the PCB

2. Component placement with a pick and place machine

3. The reflow soldering itself

9.3 Reflow soldering

Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to

higher minimum peak temperatures (see Figure 12) than a PbSn process, thus

reducing the process window

• Solder paste printing issues, such as smearing, release, and adjusting the process

window for a mix of large and small components on one board

• Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature), and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder paste

characteristic) while being low enough that the packages and/or boards are not

damaged. The peak temperature of the package depends on package thickness and

volume and is classified in accordance with Table 10.

Table 10. Lead-free process (from J-STD-020C)

Package thickness (mm) Package reflow temperature (°C)

Volume (mm³)

< 350

260

350 to 2000

260

> 2000

260

< 1.6

1.6 to 2.5

> 2.5

260

250

245

250

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 12.

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

10 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

maximum peak temperature

= MSL limit, damage level

temperature

minimum peak temperature

= minimum soldering temperature

peak

temperature

time

001aac844

MSL: Moisture Sensitivity Level

Fig 12. Temperature profiles for large and small components

For further information on temperature profiles, refer to application note AN10365

“Surface mount reflow soldering description”.

9.3.1 Stand off

The stand off between the substrate and the chip is determined by:

• The amount of printed solder on the substrate

• The size of the solder land on the substrate

• The bump height on the chip

The higher the stand off, the better the stresses are released due to TEC (Thermal

Expansion Coefficient) differences between substrate and chip.

9.3.2 Quality of solder joint

A flip-chip joint is considered to be a good joint when the entire solder land has been

wetted by the solder from the bump. The surface of the joint should be smooth and the

shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps

after reflow can occur during the reflow process in bumps with high ratio of bump diameter

to bump height, i.e. low bumps with large diameter. No failures have been found to be

related to these voids. Solder joint inspection after reflow can be done with X-ray to

monitor defects such as bridging, open circuits and voids.

9.3.3 Rework

In general, rework is not recommended. By rework we mean the process of removing the

chip from the substrate and replacing it with a new chip. If a chip is removed from the

substrate, most solder balls of the chip will be damaged. In that case it is recommended

not to re-use the chip again.

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

11 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

Device removal can be done when the substrate is heated until it is certain that all solder

joints are molten. The chip can then be carefully removed from the substrate without

damaging the tracks and solder lands on the substrate. Removing the device must be

done using plastic tweezers, because metal tweezers can damage the silicon. The

surface of the substrate should be carefully cleaned and all solder and flux residues

and/or underfill removed. When a new chip is placed on the substrate, use the flux

process instead of solder on the solder lands. Apply flux on the bumps at the chip side as

well as on the solder pads on the substrate. Place and align the new chip while viewing

with a microscope. To reflow the solder, use the solder profile shown in application note

AN10365 “Surface mount reflow soldering description”.

9.3.4 Cleaning

Cleaning can be done after reflow soldering.

10. Abbreviations

Table 11. Abbreviations

Acronym

DUT

Description

Device Under Test

EMI

ElectroMagnetic Interference

ElectroStatic Discharge

Human Body Model

ESD

HBM

LAN

Local Area Network

PCB

Printed-Circuit Board

PCS

Personal Communication System

Personal Digital Assistant

Radio Frequency Interference

Restriction of Hazardous Substances

Subscriber Identity Module

Wide Area Network

PDA

RFI

RoHS

SIM

WAN

WLCSP

Wafer-Level Chip-Scale Package

11. Revision history

Table 12. Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

IP3088CX5_CX10_CX15_CX20_1

20100212

Product data sheet

-

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

12 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

12. Legal information

12.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

malfunction of an NXP Semiconductors product can reasonably be expected

12.2 Definitions

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on a weakness or default in the

customer application/use or the application/use of customer’s third party

customer(s) (hereinafter both referred to as “Application”). It is customer’s

sole responsibility to check whether the NXP Semiconductors product is

suitable and fit for the Application planned. Customer has to do all necessary

testing for the Application in order to avoid a default of the Application and the

product. NXP Semiconductors does not accept any liability in this respect.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

12.3 Disclaimers

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from national authorities.

Non-automotive qualified products — Unless the data sheet of an NXP

Semiconductors product expressly states that the product is automotive

qualified, the product is not suitable for automotive use. It is neither qualified

nor tested in accordance with automotive testing or application requirements.

NXP Semiconductors accepts no liability for inclusion and/or use of

non-automotive qualified products in automotive equipment or applications.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

13 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from customer design and

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

12.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

13. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

IP3088CX5_CX10_CX15_CX20_1

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 01 — 12 February 2010

14 of 15

IP3088CX5/CX10/CX15/CX20

NXP Semiconductors

2, 4, 6 and 8-channel passive LC-filter network with ESD protection

14. Contents

1

Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

General description . . . . . . . . . . . . . . . . . . . . . 1

Features and benefits. . . . . . . . . . . . . . . . . . . . 1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1

1.2

1.3

2

2.1

2.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2

3

Ordering information. . . . . . . . . . . . . . . . . . . . . 3

Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4

Application information. . . . . . . . . . . . . . . . . . . 4

Insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6

4

5

6

7

7.1

8

9

9.1

9.2

9.3

9.3.1

9.3.2

9.3.3

9.3.4

Soldering of WLCSP packages. . . . . . . . . . . . 10

Introduction to soldering WLCSP packages . . 10

Board mounting . . . . . . . . . . . . . . . . . . . . . . . 10

Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 10

Stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Quality of solder joint . . . . . . . . . . . . . . . . . . . 11

Rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

10

11

Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12

12

Legal information. . . . . . . . . . . . . . . . . . . . . . . 13

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13

Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

12.1

12.2

12.3

12.4

13

14

Contact information. . . . . . . . . . . . . . . . . . . . . 14

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 12 February 2010

Document identifier: IP3088CX5_CX10_CX15_CX20_1


型号：	IP3088CX15
厂家：	NXP
描述：	Integrated 2, 4, 6 and 8-channel passive LC-filter network with ESD protection to IEC 61000-4-2 level 4 集成2个，4个，6个和8声道无源LC滤波器网络， ESD保护符合IEC 61000-4-2第4级消费电路商用集成电路
文件：	总15页 (文件大小：233K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IP3088CX15 [NXP]

相关型号：

IP3088CX15,135

IP3088CX20

IP3088CX20,135

IP3088CX5

IP3088CX5,135

IP3101

IP3102L

IP317

IP317A

IP317AG

IP317AHVK

IP317AHVR