IRLZ34 [NXP]

N-channel enhancement mode Logic level TrenchMOS transistor; N沟道增强模式的逻辑电平的TrenchMOS晶体管


型号：	IRLZ34
厂家：	NXP
描述：	N-channel enhancement mode Logic level TrenchMOS transistor N沟道增强模式的逻辑电平的TrenchMOS晶体管晶体晶体管开关脉冲局域网
文件：	总7页 (文件大小：66K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Philips Semiconductors

Product specification

N-channel enhancement mode

IRLZ34N

Logic level TrenchMOS^TMtransistor

GENERAL DESCRIPTION

QUICK REFERENCE DATA

N-channel enhancement mode logic

level field-effect power transistor in a

plastic envelope using ’trench’

technology. The device features very

low on-state resistance and has

integral zener diodes giving ESD

protection up to 2kV. It is intended for

useinswitchedmodepowersupplies

and general purpose switching

applications.

SYMBOL

PARAMETER

MAX.

UNIT

V_DS

I_D

P_tot

T_j

Drain-source voltage

Drain current (DC)

Total power dissipation

Junction temperature

Drain-source on-state

175

˚C

mΩ

R_DS(ON)

resistance

V_GS= 10 V

PINNING - TO220AB

PIN CONFIGURATION

SYMBOL

DESCRIPTION

tab

gate

drain

source

tab drain

1 2 3

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DSS

V_DGR

V_GS

I_D

Drain-source voltage

Drain-gate voltage

Gate-source voltage

Continuous drain current

T_j= 25 ˚C to 175˚C

T_j= 25 ˚C to 175˚C; R_GS= 20 kΩ

± 13

110

˚C

T_mb= 25 ˚C

T_mb= 100 ˚C

T_mb= 25 ˚C

I_DM

P_D

T_j, T_stg

Pulsed drain current

Total power dissipation

Operating junction and

storage temperature

175

- 55

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

TYP.

MAX.

UNIT

R_{th j-mb}

R_{th j-a}

Thermal resistance junction

to mounting base

Thermal resistance junction

to ambient

2.2

K/W

ESD LIMITING VALUE

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_C

Electrostatic discharge

capacitor voltage, all pins

Human body model (100 pF, 1.5 kΩ)

February 1999

Rev 1.000

Philips Semiconductors

Product specification

N-channel enhancement mode

IRLZ34N

Logic level TrenchMOS^TMtransistor

ELECTRICAL CHARACTERISTICS

T_j= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

V_(BR)DSS

V_(BR)GSS

V_GS(TO)

Drain-source breakdown

voltage

Gate-source breakdown

voltage

Gate threshold voltage

V_GS= 0 V; I_D= 0.25 mA;

I_G= ±1 mA;

T_j= -55˚C

V_DS= V_GS; I_D= 1 mA

1.0

0.5

1.5

0.02

2.0

2.3

T_j= 175˚C

T_j= -55˚C

R_DS(ON)

Drain-source on-state

resistance

V_GS= 5 V; I_D= 17 A

V_GS= 10 V; I_D= 17 A

mΩ

µA

T_j= 175˚C

g_fs

I_GSS

Forward transconductance

Gate source leakage current V_GS= ±5 V; V_DS= 0 V

V_DS= 25 V; I_D= 15 A

T_j= 175˚C

500

I_DSS

Zero gate voltage drain

current

V_DS= 55 V; V_GS= 0 V;

0.05

Q_g(tot)

Q_gs

Q_gd

Total gate charge

Gate-source charge

Gate-drain (Miller) charge

I_D= 30 A; V_DD= 44 V; V_GS= 5 V

22.5

t_{d on}

t_r

t_{d off}

t_f

Turn-on delay time

Turn-on rise time

Turn-off delay time

Turn-off fall time

V_DD= 30 V; I_D= 25 A;

V_GS= 5 V; R_G= 10 Ω

Resistive load

110

L_d

Internal drain inductance

Measured from tab to centre of die

Measured from drain lead to centre of die

(SOT78 package only)

3.5

4.5

L_s

Internal source inductance

Measured from source lead to source

bond pad

7.5

C_iss

C_oss

C_rss

Input capacitance

Output capacitance

Feedback capacitance

V_GS= 0 V; V_DS= 25 V; f = 1 MHz

1050 1400

205

113

245

150

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

T_j= 25˚C unless otherwise specified

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

I_S

Continuous source current

(body diode)

I_SM

V_SD

Pulsed source current (body

diode)

Diode forward voltage

110

I_F= 25 A; V_GS= 0 V

I_F= 34 A; V_GS= 0 V

0.95

1.0

1.2

t_rr

Q_rr

Reverse recovery time

Reverse recovery charge

I_F= 34 A; -dI_F/dt = 100 A/µs;

V_GS= -10 V; V_R= 30 V

0.16

µC

February 1999

Rev 1.000

Philips Semiconductors

Product specification

N-channel enhancement mode

IRLZ34N

Logic level TrenchMOS^TMtransistor

AVALANCHE LIMITING VALUE

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

W_DSSDrain-source non-repetitive I_D= 20 A; V_DD≤ 25 V; V_GS= 5 V;

unclamped inductive turn-off R_GS= 50 Ω; T_mb= 25 ˚C

energy

Normalised Power Derating

1000

PD%

120

110

100

ID/A

100

tp =

RDS(ON) = VDS/ID

1 us

10us

100 us

1 ms

10ms

100ms

Tmb /

100 120 140 160 180

100

VDS/V

Fig.1. Normalised power dissipation.

PD% = 100 P_D/P_{D 25 ˚C}= f(T_mb)

Fig.3. Safe operating area. T_mb= 25 ˚C

I_D& I_DM= f(V_DS); I_DMsingle pulse; parameter t_p

ZTH/ (K/W)

Normalised Current Derating

ID%

120

110

100

0.5

0.2

0.1

D =

0.05

0.1

0.02

0.01

100 120 140 160 180

1.0E-06

0.0001

0.01

t/s

100

Tmb /

Fig.2. Normalised continuous drain current.

ID% = 100 I_D/I_{D 25 ˚C}= f(T_mb); conditions: V_GS≥ 5 V

Fig.4. Transient thermal impedance.

Z_{th j-mb}= f(t); parameter D = t_p/T

February 1999

Rev 1.000

Philips Semiconductors

Product specification

N-channel enhancement mode

IRLZ34N

Logic level TrenchMOS^TMtransistor

Drain current, ID (A)

100

Transconductance, gfs (S)

VGS = 6.0 V

5.6

5.0

4.6

4.0

3.6

3.0

Drain-source voltage, VDS (V)

Drain current, ID (A)

Fig.5. Typical output characteristics, T_j= 25 ˚C.

I_D= f(V_DS); parameter V_GS

Fig.8. Typical transconductance, T_j= 25 ˚C.

g_fs= f(I_D); conditions: V_DS= 25 V

RDS(ON)/mOhm

BUK959-60

Rds(on) normlised to 25degC

2.5

VGS/V =

4.2

4.4

4.6

1.5

4.8

0.5

-100

-50

Tmb / degC

100

150

200

ID/A

Fig.6. Typical on-state resistance, T_j= 25 ˚C.

R_DS(ON)= f(I_D); parameter V_GS

Fig.9. Normalised drain-source on-state resistance.

a = R_DS(ON)/R_{DS(ON)25 ˚C}= f(T_j); I_D= 17 A; V_GS= 5 V

BUK959-60

VGS(TO) / V

max.

2.5

ID/A

typ.

1.5

min.

0.5

Tj/C =

175

-100

-50

Tj / C

100

150

200

VGS/V

Fig.7. Typical transfer characteristics.

I_D= f(V_GS) ; conditions: V_DS= 25 V; parameter T_j

Fig.10. Gate threshold voltage.

V_GS(TO)= f(T_j); conditions: I_D= 1 mA; V_DS= V_GS

February 1999

Rev 1.000

Philips Semiconductors

Product specification

N-channel enhancement mode

IRLZ34N

Logic level TrenchMOS^TMtransistor

100

IF/A

Sub-Threshold Conduction

1E-01

1E-02

typ

98%

1E-03

1E-04

1E-05

Tj/C =

175

0.5

1.5

0.5

1.5

2.5

VSDS/V

Fig.11. Sub-threshold drain current.

I_D= f(V_GS); conditions: T_j= 25 ˚C; V_DS= V_GS

Fig.14. Typical reverse diode current.

I_F= f(V_SDS); conditions: V_GS= 0 V; parameter T_j

2.5

2.0

1.5

1.0

0.5

WDSS%

120

110

100

Ciss

ThouandspF

Coss

Crss

100

Tmb /

120

140

160

180

0.01

0.1

100

VDS/V

Fig.12. Typical capacitances, C_iss, C_oss, C_rss.

C = f(V_DS); conditions: V_GS= 0 V; f = 1 MHz

Fig.15. Normalised avalanche energy rating.

W_DSS% = f(T_mb); conditions: I_D= 20 A

VDD

VGS/V

VDS = 14V

VDS

VDS = 44V

VGS

-ID/100

T.U.T.

R 01

RGS

shunt

QG/nC

Fig.16. Avalanche energy test circuit.

W_DSS= 0.5 LI_D²BV_DSS/(BV_DSS− V_DD

Fig.13. Typical turn-on gate-charge characteristics.

V_GS= f(Q_G); conditions: I_D= 30 A; parameter V_DS

)

February 1999

Rev 1.000

Philips Semiconductors

Product specification

N-channel enhancement mode

IRLZ34N

Logic level TrenchMOS^TMtransistor

MECHANICAL DATA

Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220

SOT78

(1)

10 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

UNIT

max.

4.5

4.1

1.39

1.27

0.9

0.7

1.3

1.0

0.7

0.4

15.8

15.2

6.4

5.9

10.3

9.7

15.0

13.5

3.30

2.79

3.8

3.6

3.0

2.7

2.6

2.2

3.0

2.54

Note

1. Terminals in this zone are not tinned.

REFERENCES

EUROPEAN

PROJECTION

OUTLINE

VERSION

ISSUE DATE

IEC

JEDEC

EIAJ

97-06-11

SOT78

TO-220

Fig.17. SOT78 (TO220AB); pin 2 connected to mounting base (Net mass:2g)

Notes

1. This product is supplied in anti-static packaging. The gate-source input must be protected against static

discharge during transport or handling.

2. Refer to mounting instructions for SOT78 (TO220AB) package.

3. Epoxy meets UL94 V0 at 1/8".

February 1999

Rev 1.000

Philips Semiconductors

Product specification

N-channel enhancement mode

IRLZ34N

Logic level TrenchMOS^TMtransistor

DEFINITIONS

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and

operation of the device at these or at any other conditions above those given in the Characteristics sections of

this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Philips Electronics N.V. 1999

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the

The information presented in this document does not form part of any quotation or contract, it is believed to be

accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any

consequence of its use. Publication thereof does not convey nor imply any license under patent or other

industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these

products can be reasonably expected to result in personal injury. Philips customers using or selling these products

for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting

from such improper use or sale.

February 1999

Rev 1.000

IRLZ34 [NXP]

相关型号：

IRLZ34-002

IRLZ34-004PBF

IRLZ34-005PBF

IRLZ34-006PBF

IRLZ34-010PBF

IRLZ34-011

IRLZ34-012

IRLZ34-013

IRLZ34-013PBF

IRLZ34-015

IRLZ34-015PBF

IRLZ34-017