MB2543BB [NXP]
Dual octal latched transceivers with dual enable 3-State; 双八进制锁存收发器，双能三态
| 型号： | MB2543BB |
| 厂家： | 
NXP |
| 描述： | Dual octal latched transceivers with dual enable 3-State |
| 文件： | 总13页 (文件大小：150K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
FEATURES
power dissipation with high speed and high
output drive.
• Two 8-bit octal transceivers with D-type
• Output capability: +64mA/–32mA
latch
• Latch-up protection exceeds 500mA per
The MB2543 dual octal registered transceiver
contains two sets of D-type latches for
temporary storage of data flowing in either
direction. Separate Latch Enable (nLEAB,
nLEBA) and Output Enable (nOEAB,
nOEBA) inputs are provided for each
register to permit independent control of data
transfer in either direction. The outputs are
guaranteed to sink 64mA.
• Live insertation/extraction permitted
• Power-up 3-State
Jedec JC40.2 Std 17
• ESD protection exceeds 2000V per MIL
STD 883 Method 3015 and 200V per
Machine Model
• Power-up reset
• Multiple V and GND pins minimize
CC
switching noise
DESCRIPTION
The MB2543 high-performance BiCMOS
device combines low static and dynamic
• Back-to-back registers for storage
• Separate controls for data flow in each
direction
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
Propagation delay
nAx to nBx
PLH
PHL
C = 50pF; V = 5V
3.3
ns
L
CC
C
Input capacitance
I/O capacitance
V = 0V or V
CC
4
7
pF
pF
µA
IN
I
C
V
O
= 0V or V
3-State
I/O
CC;
I
Total supply current
Outputs disabled; V = 5.5V
120
CCZ
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DRAWING NUMBER
52-pin plastic Quad Flat Pack
–40°C to +85°C
MB2543BB
1418B
PIN CONFIGURATION
LOGIC SYMBOL
50 51
1
2
3
5
6
7
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
1EAB
52 51 50 49 48 47 46 45 44 43 42 41 40
49
44
48
45
1EBA
1OEAB
1OEBA
47
46
1
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
39 1B2
1LEAB
1LEBA
2
3
4
38
37
36
1B3
1B4
1B5
1B6
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
5
6
35
42 41 39 38 37 36 35 34
34 1B7
MB2543
52-pin PQFP
2B0
2B1
2B2
33
32
7
8
8
9
10 11 12 13 15 16
9
31
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
2EAB
2A2 10
30 GND
11
12
29
28
2A3
2A4
2A5
2B3
2B4
2B5
18
23
19
22
2EBA
2OEAB
2OEBA
20
21
2LEAB
2LEBA
13
27
14 15 16 17 18 19 20 21 22 23 24 25 26
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
33 32 31 29 28 27 25 24
1
August 23, 1993
853–1656 10584
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
LOGIC DIAGRAM
DETAIL A
nB0
D
Q
LE
nA0
Q
D
LE
nA1
nA2
nA3
nA4
nA5
nA6
nA7
nB1
nB2
nB3
nB4
nB5
nB6
nB7
DETAIL A X 7
nOEBA
nOEAB
nEBA
nEAB
nLEBA
nLEAB
LOGIC SYMBOL (IEEE/IEC)
47
49
48
46
44
45
20
18
19
21
23
22
&
&
EN1(AB)
EN2(BA)
EN1(AB)
EN2(BA)
&
&
&
&
&
&
50
51
1
42
41
39
38
37
36
35
34
8
9
33
32
31
29
28
27
25
24
1
2
1
2
10
11
12
13
15
16
2
3
5
6
7
2
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
A subsequent Low-to-High transition of the
buffers are active and display the data
present at the outputs of the A latches.
FUNCTIONAL DESCRIPTION
nLEAB signal puts the A data into the latches
where it is stored and the B outputs no longer
change with the A inputs. With EAB and
nOEAB both Low, the 3-State B output
The MB2543 contains two sets of eight
D-type latches, with separate control pins for
each set. Using data flow from A to B as an
example, when the A-to-B Enable (nEAB)
input and the A-to-B Latch Enable (nLEAB)
input are Low the A-to-B path is transparent.
Control of data flow from B to A is similar, but
using the nEBA, nLEBA, and nOEBA inputs.
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
50, 51, 1, 2, 3, 5, 6, 7,
8, 9, 10, 11, 12, 13, 15, 16
1A0 – 1A7,
2A0 – 2A7
Data inputs/outputs
42, 41, 39, 38, 37, 36, 35, 34,
33, 32, 31, 29, 28, 27, 25, 24
1B0 – 1B7,
2B0 – 2B7
Data inputs/outputs
1OEAB, 1OEBA,
2OEAB, 2OEBA
47, 46, 20, 21
49, 44, 18, 23
48, 45, 19, 22
A to B / B to A Output Enable inputs (active-Low)
A to B / B to A Enable inputs (active-Low)
1EAB, 1EBA,
2EAB, 2EBA
1LEAB, 1LEBA,
2LEAB, 2LEBA
A to B / B to A Latch Enable inputs (active-Low)
4, 17, 30, 43
14, 26, 40, 52
GND
Ground (0V)
V
CC
Positive supply voltage
FUNCTION TABLE
INPUTS
OUTPUTS
STATUS
nOEXX
nEXX
nLEXX
nAx or nBx
nBx or nAx
H
X
X
H
X
X
X
X
Z
Z
Disabled
Disabled
L
L
↑
↑
L
L
h
l
Z
Z
Disabled + Latch
Latch + Display
L
L
L
L
↑
↑
h
l
H
L
L
L
L
L
L
L
H
L
H
L
Transparent
Hold
L
L
H
X
NC
H
h
L
l
X
↑
=
=
=
=
=
=
High voltage level
High voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA)
Low voltage level
Low voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA)
Don’t care
Low-to-High transition of nLEXX or nEXX (XX = AB or BA)
NC= No change
High impedance or “off” state
Z
=
3
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
1 , 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +7.0
–18
UNIT
V
V
CC
I
IK
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
DC output voltage
output in Off or High state
output in Low state
–0.5 to +5.5
128
OUT
OUT
I
DC output current
mA
°C
T
stg
Storage temperature range
–65 to 150
NOTES:
1 . Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2 . The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3 . The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
Min
4.5
0
Max
V
DC supply voltage
5.5
V
V
CC
V
Input voltage
V
CC
I
V
High-level input voltage
Low-level Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
2.0
V
IH
V
0.8
–32
64
V
IL
I
mA
mA
ns/V
°C
OH
I
OL
∆t/∆v
0
10
T
amb
Operating free-air temperature range
–40
+85
4
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
= –40°C
to +85°C
amb
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
UNIT
MIN
TYP
MAX
MIN
MAX
V
Input clamp voltage
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.5V; I = –18mA
–0.9
2.9
–1.2
–1.2
V
V
V
V
V
V
IK
IK
= 4.5V; I = –3mA; V = V or V
2.5
3.0
2.0
2.5
3.0
2.0
OH
I
IL
IH
V
OH
High-level output voltage
Low-level output voltage
= 5.0V; I = –3mA; V = V or V
3.4
OH
I
IL
IH
= 4.5V; I = –32mA; V = V or V
IH
2.4
OH
I
IL
V
OL
= 4.5V; I = 64mA; V = V or V
IH
0.42
0.13
0.55
0.55
0.55
0.55
OL
I
IL
3
V
RST
Power-up output voltage
= 5.5V; I = 1mA; V = GND or V
O I CC
I
I
Input leakage Control pins
V
V
= 5.5V; V = GND or 5.5V
±0.01
±5
±1.0
±1.0
µA
µA
CC
I
current
Data pins
= 5.5V; V = GND or 5.5V
±100
±100
CC
I
I
Power-off leakage current
Power-up/down 3-State
V
= 0.0V; V or V ≤ 4.5V
±5.0
±5.0
±100
±50
±100
±50
µA
µA
OFF
CC
O
I
V
CC
V
OE
= 2.1V; V = 0.5V; V = GND or V
;
O
I
CC
I
PU/PD
4
output current
= Don’t care
I
+ I
+ I
3-State output High current
3-State output Low current
Output High leakage current
V
V
V
V
V
V
V
= 5.5V; V = 2.7V; V = V or V
5.0
–5.0
5.0
50
–50
50
50
–50
50
µA
µA
µA
mA
µA
mA
IH
OZH
CC
CC
CC
CC
CC
CC
CC
O
I
IL
IH
I
= 5.5V; V = 0.5V; V = V or V
O I IL
IL
OZL
IH
I
= 5.5V; V = 5.5V; V = GND or V
O I
CEX
CC
1
I
O
Output current
= 5.5V; V = 2.5V
–50
–100
120
38
–180
250
60
–50
–180
250
60
O
I
= 5.5V; Outputs High, V = GND or V
CCH
I
CC
I
Quiescent supply current
= 5.5V; Outputs Low, V = GND or V
CCL
I
CC
= 5.5V; Outputs 3-State;
I
120
0.5
250
1.5
250
1.5
µA
CCZ
V = GND or V
I
CC
Additional supply current per
V
CC
= 5.5V; one input at 3.4V,
∆I
CC
mA
2
input pin
other inputs at V or GND
CC
NOTES:
1 . Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2 . This is the increase in supply current for each input at 3.4V.
3 . For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4 . This parameter is valid for any V between 0V and 2.1V, with a transition time of up to 10msec. From V = 2.1V to V = 5V ± 10% a
CC
CC
CC
transition time of up to 100µsec is permitted.
5
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
AC CHARACTERISTICS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
MAX
T
= -40 to
+85 C
= +5.0V ±0.5V
amb
o
T
V
= +25 C
amb
CC
o
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V
V
CC
MIN
TYP
MIN
MAX
t
t
Propagation delay
nAx to nBx, nBx to nAx
1.5
1.6
3.2
3.3
4.6
4.6
1.5
1.6
5.2
5.2
PLH
PHL
2
ns
ns
ns
ns
ns
ns
t
t
Propagation delay
LEBA to nAx, LEAB to nBx
1.9
2.1
3.9
4.1
5.3
5.5
1.9
2.1
6.1
6.2
PLH
PHL
1, 2
t
Output enable time
OEBA to nAx, OEAB to nBx
4
5
1.6
2.3
3.6
4.5
5.0
5.9
1.6
2.3
5.8
6.6
PZH
t
PZL
t
Output disable time
OEBA to nAx, OEAB to nBx
4
5
1.0
1.4
3.6
3.2
5.0
4.6
1.0
1.4
5.7
5.2
PHZ
t
PLZ
t
Output enable time
EBA to nAx, EAB to nBx
4
5
1.6
2.3
3.6
4.5
5.0
5.9
1.6
2.3
5.8
6.6
PZH
t
PZL
t
Output disable time
EBA to nAx, EAB to nBx
4
5
1.0
1.4
3.6
3.2
5.0
4.6
1.0
1.4
5.7
5.2
PHZ
t
PLZ
AC SETUP REQUIREMENTS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
o
o
T
V
= +25 C
T
V
= -40 to +85 C
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V
= +5.0V ±0.5V
MIN
TYP
MIN
t (H)
t (L)
s
Setup time
nAx to LEAB, nBx to LEBA
1.0
0.5
0.4
–0.1
1.0
0.5
s
3
3
3
ns
ns
ns
t (H)
Hold time
nAx to LEAB, nBx to LEBA
1.0
0.5
0.2
–0.3
1.0
0.5
h
t (L)
h
t (H)
Setup time
nAx to EAB, nBx to EBA
1.0
0.5
0.2
–0.3
1.0
0.5
s
t (L)
s
t (H)
t (L)
h
Hold time
nAx to EAB, nBx to EBA
1.0
0.5
0.3
–0.2
1.0
0.5
h
3
3
ns
ns
t (L)
w
Latch enable pulse width, Low
4.0
3.1
4.0
6
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
AC WAVEFORMS
V
M
= 1.5V, V = GND to 3.0V
IN
V
V
IN
IN
V
V
V
V
M
M
t
M
M
t
t
t
PHL
PLH
PLH
PHL
V
V
OUT
OUT
V
V
V
V
M
M
M
M
Waveform 1. Propagation Delay For Inverting Output
Waveform 2. Propagation Delay For Non-Inverting
Output
nAx, nBx
V
V
V
V
M
M
M
M
t (H)
s
t (L)
s
t
(H)
t (L)
h
h
nLEAB, nLEBA,
nEAB, nEBA
V
V
M
M
t
(L)
w
Waveform 3. Data Setup and Hold Times and
Latch Enable Pulse Width
nOEAB, nOEBA,
nEAB, nEBA
nOEAB, nOEBA,
nEAB, nEBA
V
V
V
V
M
M
t
M
M
t
t
t
PLZ
PZH
PHZ
PZL
V
–0.3V
0V
OH
V
V
M
nAx, nBx
nAx, nBx
M
V
+0.3V
0V
OL
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
7
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
TEST CIRCUIT AND WAVEFORMS
V
t
W
AMP (V)
90%
CC
90%
7.0V
NEGATIVE
PULSE
V
V
M
M
10%
10%
90%
V
V
OUT
R
R
IN
L
L
0V
PULSE
GENERATOR
D.U.T
t
t
(t
(t
)
t
t
(t )
R
THL
F
TLH
)
(t )
F
R
C
TLH
R
THL
T
L
AMP (V)
90%
M
POSITIVE
PULSE
V
V
M
Test Circuit for 3-State Outputs
10%
10%
t
W
0V
SWITCH POSITION
V
= 1.5V
M
TEST
SWITCH
closed
closed
open
Input Pulse Definition
t
t
PLZ
PZL
All other
INPUT PULSE REQUIREMENTS
DEFINITIONS
R = Load resistor; see AC CHARACTERISTICS for value.
L
FAMILY
Amplitude
Rep. Rate
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;
L
MB
3.0V
1MHz
500ns 2.5ns 2.5ns
see AC CHARACTERISTICS for value.
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
8
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
t
vs Temperature (T
)
Adjustment of t
for
PLH
amb
PLH
C = 50pF, 1 Output Switching
nAx to nBx or nBx to nAx
Load Capacitance and # of Outputs Switching
nAx to nBx or nBx to nAx
L
7
6
5
4
3
2
1
0
6
5
4
16 switching
8 switching
1 switching
MAX
4.5V
3
2
CC
1
5.5V
CC
MIN
0
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
t
vs Temperature (T
)
amb
Adjustment of t
for
PHL
PHL
C = 50pF, 1 Output Switching
nAx to nBx or nBx to nAx
Load Capacitance and # of Outputs Switching
nAx to nBx or nBx to nAx
5
L
7
6
5
4
3
2
1
0
4
3
MAX
4.5V
16 switching
8 switching
CC
1 switching
2
5.5V
CC
1
0
MIN
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
t
vs Temperature (T
)
Adjustment of t
for
PLH
amb
PLH
C = 50pF, 1 Output Switching
L
Load Capacitance and # of Outputs Switching
nLEBA to nAx or nLEAB to nBx
nLEBA to nAx or nLEAB to nBx
7
6
5
4
3
2
1
6
5
4
MAX
4.5V
16 switching
8 switching
1 switching
3
CC
2
5.5V
MIN
CC
1
0
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
9
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
t
vs Temperature (T
)
Adjustment of t
for
PHL
amb
PHL
C = 50pF, 1 Output Switching
nLEBA to nAx or nLEAB to nBx
Load Capacitance and # of Outputs Switching
nLEBA to nAx or nLEAB to nBx
L
8
7
6
5
4
3
2
1
5
4
3
16 switching
8 switching
MAX
4.5V
1 switching
2
CC
1
5.5V
MIN
CC
0
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
t
vs Temperature (T
)
Adjustment of t for
PZH
PZH
amb
C = 50pF, 1 Output Switching
nOEBA to nAx or nOEAB to nBx
Load Capacitance and # of Outputs Switching
nOEBA to nAx or nOEAB to nBx
L
7
6
5
4
3
2
1
5
16 switching
8 switching
4
3
MAX
4.5V
1 switching
2
CC
1
5.5V
MIN
CC
0
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
t
vs Temperature (T
)
Adjustment of t for
PZL
PZL
amb
C = 50pF, 1 Output Switching
nOEBA to nAx or nOEAB to nBx
Load Capacitance and # of Outputs Switching
nOEBA to nAx or nOEAB to nBx
L
8
7
6
5
4
3
2
1
5
4
3
16 switching
8 switching
MAX
4.5V
1 switching
2
CC
1
5.5V
MIN
CC
0
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
10
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
t
vs Temperature (T
)
Adjustment of t
for
PHZ
amb
PHZ
C = 50pF, 1 Output Switching
nOEBA to nAx or nOEAB to nBx
Load Capacitance and # of Outputs Switching
nOEBA to nAx or nOEAB to nBx
L
7
6
5
4
3
2
1
0
11
16 switching
8 switching
1 switching
10
9
8
7
6
5
4
3
2
1
0
–1
–2
–3
–4
MAX
4.5V
CC
5.5V
CC
MIN
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
t
vs Temperature (T
)
Adjustment of t
for
PLZ
amb
PLZ
C = 50pF, 1 Output Switching
L
Load Capacitance and # of Outputs Switching
nOEBA to nAx or nOEAB to nBx
nOEBA to nAx or nOEAB to nBx
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
16 switching
8 switching
1 switching
MAX
4.5V
CC
5.5V
CC
MIN
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
t
vs Temperature (T
)
Adjustment of t for
PZH
PZH
amb
C = 50pF, 1 Output Switching
L
Load Capacitance and # of Outputs Switching
nEBA to nAx or nEAB to nBx
nEBA to nAx or nEAB to nBx
7
6
5
4
3
2
1
0
5
4
3
2
1
0
16 switching
8 switching
MAX
4.5V
1 switching
CC
5.5V
MIN
CC
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
11
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
t
vs Temperature (T
)
Adjustment of t
for
PZL
amb
PZL
C = 50pF, 1 Output Switching
nEBA to nAx or nEAB to nBx
Load Capacitance and # of Outputs Switching
nEBA to nAx or nEAB to nBx
L
8
7
6
5
4
3
2
1
5
4
3
MAX
4.5V
16 switching
8 switching
1 switching
2
CC
1
5.5V
MIN
CC
0
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
t
vs Temperature (T
)
Adjustment of t for
PHZ
PHZ
amb
C = 50pF, 1 Output Switching
nEBA to nAx or nEAB to nBx
Load Capacitance and # of Outputs Switching
nEBA to nAx or nEAB to nBx
L
7
6
5
4
3
2
1
0
12
16 switching
8 switching
1 switching
10
8
MAX
4.5V
6
4
CC
5.5V
CC
2
0
MIN
–2
–4
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
t
vs Temperature (T
)
Adjustment of t for
PLZ
PLZ
amb
C = 50pF, 1 Output Switching
nEBA to nAx or nEAB to nBx
Load Capacitance and # of Outputs Switching
nEBA to nAx or nEAB to nBx
L
7
6
5
4
3
2
1
0
7
6
5
16 switching
8 switching
1 switching
MAX
4.5V
4
3
CC
5.5V
2
CC
1
MIN
0
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
12
August 23, 1993
Philips Semiconductors Advanced BiCMOS Products
Product specification
Dual octal latched transceivers with dual enable
(3-State)
MB2543
t
vs Temperature (T
)
Adjustment of t
for
TLH
amb
TLH
C = 50pF, 1 Output Switching
L
Load Capacitance/# of Outputs
4
3
2
1
0
11
9
16 switching
8 switching
1 switching
7
4.5V
5.5V
CC
CC
5
3
1
–1
–3
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
t
vs Temperature (T
)
Adjustment of t
for
THL
amb
THL
C = 50pF, 1 Output Switching
L
Load Capacitance and # of Outputs Switching
4
3
2
1
0
6
5
4
3
2
1
0
16 switching
8 switching
1 switching
4.5V
5.5V
CC
CC
–1
–2
–55 –35 –15
5
25
45
65
85
105 125
0
50
100
150
200
°C
pF
V
OHV
and V
vs Load Capacitance
V
OHP
and V
vs Load Capacitance
OLP
OLV
V
CC
= 5V, V = 0 to 3V
V = 5V, V = 0 to 3V
CC IN
IN
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
6
5
4
125°C
25°C
–55°C
125°C
25°C
–55°C
3
2
1
0
125°C
25°C
–55°C
–1
–2
–3
125°C
25°C
–55°C
0
50
100
150
200
0
50
100
150
200
pF
pF
13
August 23, 1993
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