MC33287DWR2 [NXP]
0.535A 2 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO20, 1.27 MM PITCH, PLASTIC, MS-013AC, SOIC-20;
| 型号： | MC33287DWR2 |
| 厂家： | 
NXP |
| 描述： | 0.535A 2 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO20, 1.27 MM PITCH, PLASTIC, MS-013AC, SOIC-20 光电二极管 |
| 文件： | 总15页 (文件大小：264K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Document Number: MC33287
Rev. 5.0, 2/2007
scale Semiconductor
Technical Data
Contact Monitoring and Dual
Low-Side Protected Driver
33287
The 33287 interfaces between switch contacts and a
microcontroller. Eight switch-to-battery (or switch-to-ground) sense
monitor switch status. Additionally, two internal low-side switches are
available to control inductive or capacitive loads.
AUTOMOTIVE CONTACT MONITORING AND
DUAL LOW-SIDE PROTECTED DRIVER
The 33287 has eight sense inputs (rated at 40 V) with thresholds
ratiometric to VBAT. One sense input has a dedicated output for direct
interfacing to the MCU and the remaining seven inputs are
multiplexed interfaced to the MCU.
The two low-side switch outputs are current limited to 535 mA and
internally clamped to 50 V. Outputs also have independent
overtemperature shutdown and diagnostic reporting.
DW SUFFIX
EG SUFFIX (PB-FREE)
98ASB42343B
Features
20-PIN SOICW
•
•
•
•
Eight High-Voltage Sense Inputs
Direct Interfacing to Microcontroller
Two Current Limited Low-Side Drivers
Drivers Internally Overvoltage Clamped and Thermally
Protected
ORDERING INFORMATION
Temperature
Device
Package
Range (T )
A
•
•
55 µA Standby Current
Pb-Free Packaging Designated by Suffix Code EG
MC33287DW/R2
MCZ33287EG/R2
-40 to 125°C
20 SOICW
GND Sense
5.0 V
33287
VBAT
VDD1
VDD2
VDD
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
AD0
AD1
8 Sense
to GND
or VBAT
AD2
MCU
Inputs
OUT1
OUT7
CD1
OUTD1
OUTD2
CD2
GND
V
BAT Sense
Figure 1. Simplified Application Design
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
RNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
IN0
IN1 IN2
IN3
IN4
IN5
IN6
IN7
VDD2
Internal
Supply
VDD1
AD2
Multiplexer 8 to 1 and Diagnostic Logic
OUT7
OUT1
DIAGD2
DIAGD1
AD1
AD0
Fault Detector
Fault Detector
OUTD2
OUTD1
Overtemperature
Detection
Overtemperature
Detection
VDD2
Control
Control
Current
Limitation
Current
Limitation
GND
CD1
CD2
Figure 2. 33287 Simplified Internal Block Diagram
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
2
PIN CONNECTIONS
PIN CONNECTIONS
1
20
19
VDD1
IN3
VDD2
IN4
2
3
4
5
6
7
8
18
17
IN5
IN2
IN1
IN6
16
15
14
13
12
11
IN7
IN0
AD0
OUT7
OUT1
CD1
CD2
OUTD2
AD1
AD2
9
OUTD1
GND
10
Figure 3. 33287 Pin Connections
Table 1. 33287 Pin Definitions
Pin Number Pin Name Formal Name
Definition
These are high-voltage power supply 5.0 V pins (V
These are high-voltage input pins.
).
1, 20
V
V
Voltage Power
Input 0 – 7
BAT
DD1, DD2
5, 4, 3, 2,
19, 18, 17,
16
IN0 – IN7
These pins are the addresses for mode and input selection.
These two are output driver pins (drain).
6, 7, 8
9, 11
AD0 – AD2
Address
OUTD1,
OUTD2
Output Drain
This pin in the ground for the logic and analog circuitry of the device.
These are the two driver command pins.
10
12, 13
14
GND
CD1, CD2
OUT1
Ground
Command Driver
Output 1
This is the output (multiplexed Output 1 = 0 to 6.0 V for IN0 to IN6 and DIAGD1 or
DIAGD2) and DIAGD2 pins.
This is the direct output from IN7 pin.
15
OUT7
Output 7
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
TRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. MAXIMUM RATINGS
All voltages are with respect to ground unless otherwise noted.
Rating
Symbol
Value
Unit
Power Supply Voltage
V
V
DD1
Normal Operation (Steady-State)
Load Dump Conditions
24
40
Logic Supply Voltage (Continuous)
V
7.0
40
V
V
V
DD2
(1)
Input Pin Voltage
V
IN
(2)
ESD Voltage
Human Body Model
Machine Model
V
V
±2000
±200
ESD1
ESD2
Operating Ambient Temperature
Storage Temperature
T
-40 to 125°C
-65 to 150
0.7
°C
°C
A
T
STG
Power Dissipation (T = 85°C)
A
P
W
D
(3) (4)
°C
Peak Package Reflow Temperature During Reflow
Thermal Resistance Junction-to-Ambient
Notes
,
T
Note 4.
PPRT
RθJ-A
100
°C/W
1
2
With Serial Resistor ≥ 25 kΩ
ESD1 testing is performed in accordance with the Human Body Model (C
=100 pF, R
=1500 Ω), ESD2 testing is performed in
ZAP
ZAP
accordance with the Machine Model (C
=200 pF, R
=0 Ω).
ZAP
ZAP
3. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
4. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
4
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. STATIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions 7.0 V ≤ VDD1 ≤ 18 V, 4.75 V ≤ VDD2 ≤ 5.25 V, -40°C ≤ TA ≤ 125°C, unless otherwise
noted. Extended limit is 5.0 V ≤ VDD1 ≤ 7.0 V and other parameters are full specification in this mode. Inputs IN1–IN7 and low-
side drivers are still functional with down-graded characteristics.
Characteristic
AND V PINS)
Symbol
Min
Typ
Max
Unit
SUPPLY VOLTAGE (V
DD1
DD2
Operational Supply Voltage
Full Specification
V
VDD1
7.0
5.0
12
—
18
Extend Limit
7.0
Operational Supply Voltage (Full Specification)
4.75
—
—
V
VDD2
(5)
Supply Current Standby Mode
µA
V
≤ 14 V
—
—
55
—
110
10
DD1
CD1
IVDD1-0
V
= V
, V
= 0 V
I
DD2 CD2
VDD2-0
(5)
Supply Current in Drivers on Configuration (Full Specification)
µA
V
= 0 V
= V
—
—
250
650
1500
1500
CD1
CD2
IVDD1-1
V
I
DD2
VDD2-1
OUTPUT DRIVERS CHARACTERISTICS (OUTD1 AND OUTD2 PINS)
Output Resistance (Full Specification and T ≤ 130°C)
R
—
—
1.40
—
3.20
5.0
13
Ω
Ω
J
DS(ON)
Output Resistance (Extent Limit and T ≤ 130°C)
R
J
DS(ON)
Leakage Current (Internal Current Source)
PROTECTION AND LEVEL DETECTION (OUTD1 AND OUTD2 PINS)
Positive Output Clamp
I
1.0
—
µs
LEAK
V
40
50
60
750
3.5
V
mA
V
CLAMP
Output Current Limitation (130°C ≥ T )
I
300
2.0
145
535
2.75
160
J
LIM
Output Fault Detector Level
V
FAULT
DETEC
Overtemperature Detection (at 25°C by Function Simulation)
INPUTS (CD1 AND CD2 PINS)
T
175
°C
Input Voltage Low
V
—
—
—
4.0 x V
—
V
V
IL
DD2
Input Voltage High
V
8.0 x V
DD2
IH
Hysteresis
V
500
-100
-5.0
10
800
-30
—
—
mV
µA
µA
µA
µA
HST
Input Current on Pin CD1 (Internal Pull-Up and CD1 Connected to Ground)
I
-10
5.0
CD1
Leakage Current on Pin CD1 (Internal Pull-Up Connected to V
)
I
DD2
LEAK
Input Current on Pin CD2 (Internal Pull Down CD2 Connected to V
)
I
30
100
5.0
DD2
CD2
Leakage Current on Pin CD2 (Internal Pull-Up CD1 Connected to Ground)
I
-5.0
—
LEAK
Notes
5
All INn and ADn inputs are connected to ground.
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
TRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions 7.0 V ≤ VDD1 ≤ 18 V, 4.75 V ≤ VDD2 ≤ 5.25 V, -40°C ≤ TA ≤ 125°C, unless otherwise
noted. Extended limit is 5.0 V ≤ VDD1 ≤ 7.0 V and other parameters are full specification in this mode. Inputs IN1–IN7 and low-
side drivers are still functional with down-graded characteristics.
Characteristic
Symbol
Min
Typ
Max
Unit
INPUTS (IN0 TO IN7 PINS)
Input Voltage Low (Full Specification)
V
V
—
—
—
—
4.0 x V
3.0 x V
—
V
V
IL
IL
IH
DD1
Input Voltage Low (Extended Limit)
DD1
Input Voltage High (Full Specification and Extended Limit)
V
7.0 x V
5.0
—
V
DD1
Hysteresis (5.0 V < V
< 16 V)
V
I
1.0
—
—
V
DD1
HYS
Input Current (V < 16 V)
5.0
5.0
µA
V
IN
LEAK
Input Voltage Clamp (I = 100 µA)
INPUTS (AD0, AD1, AND AD2 PINS)
Input Voltage Low
V
17
20
23
INCLAMP
V
—
—
—
4.0 x V
—
V
V
IL
DD2
Input Voltage High
V
8.0 x V
IH
DD2
Hysteresis
V
500
-5.0
750
—
—
mV
µA
HYS
Input Current
I
5.0
LEAK
OUTPUTS (OUT1 AND OUT7 PINS)
Output Voltage Low (I
= 2.0 mA)
= -2.0 mA)
V
—
—
—
2.0 x V
—
V
V
LOAD
OL
DD2
Output Voltage High (I
V
8.0 x V
LOAD
OH
DD2
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
6
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. DYNAMIC ELECTRICAL CHARACTERISTICS
Characteristics noted under conditions 4.5 V ≤ VDD ≤ 5.5 V, 9.0 V ≤ VPWR ≤ 16 V, -40°C ≤ TA ≤ 125°C, unless otherwise noted.
Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
OUTPUT DRIVERS CHARACTERISTICS (OUTD1 AND OUTD2 PINS)
Turn ON Delay Time
t
—
—
1.3
2.1
2.8
1.0
—
10
10
10
10
5.0
µs
µs
µs
µs
µs
ON
Turn OFF Delay Time
t
OFF
Output Rising Edge
t
—
RISE
FALL
Output Falling Edge
t
—
Difference Between Command Duration and Bit Duration
∆
-5.0
BIT
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
TRICAL CHARACTERISTICS
TIMING DIAGRAMS
TIMING DIAGRAMS
CD2
t
t
COMMAND
OUTD2
∆Bit = t
- t
COMMAND BIT
80%
50%
20%
80%
50%
20%
t
BIT
t
t
OFF
ON
t
t
t
RISE
FALL
Figure 4. Timing Characteristics
V
BAT
R1 = 500 Ω
R2 = 47 kΩ
C1 = 2.0 nF
C2 = 250 pF
CD1
CD2
OUTD1
OUTD2
V
BAT
R1 = 500 Ω
R2 = 47 kΩ
C1 = 2.0 nF
C2 = 250 pF
f = 5.0 kHz
Figure 5. Timing Test Configuration
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
8
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 5. Drivers Function Table
(8)
(6)
OUTD1
DIAGD1
Status
Driver 1 Normally OFF
CD1
High Level for Logic Signals
Low Level for Logic Signals
High Level for Logic Signals
Low Level for Logic Signals
High Level for Drivers Outputs High Level for Logic Signals
Low Level for Drivers Outputs High Level for Logic Signals
Low Level for Drivers Outputs Low Level for Logic Signals
High Level for Drivers Outputs Low Level for Logic Signals
Driver 1 Normally ON
Driver 1 Shorted to GND or Open Load
Driver 1 Overloaded
(7)
CD2
OUTD2
DIAGD2
Status
Driver 2 Normally OFF
Low Level for Logic Signals
High Level for Logic Signals
Low Level for Logic Signals
High Level for Logic Signals
Notes
High Level for Drivers Outputs High Level for Logic Signals
Low Level for Drivers Outputs High Level for Logic Signals
Low Level for Drivers Outputs Low Level for Logic Signals
High Level for Drivers Outputs Low Level for Logic Signals
Driver 2 Normally ON
Driver 2 Shorted to GND or Open Load
Driver 2 Overloaded
6
7
8
CD1 is active on low level (driver 1 is on when CD1 is low).
CD2 is active on high level (driver 2 is on when CD2 is high.
DIAGD1 output is neither latched nor filtered.
Table 6. Eight-to-One Data Multiplexer Function
Inputs
OUT1
AD2
AD1
AD0
High Impedance
Low Level
Low Level
Low Level
Low Level
High Level
High Level
High Level
High Level
High Impedance
Low Level
Low Level
High Level
High Level
Low Level
Low Level
High Level
High Level
High Impedance
Low Level
High Level
Low Level
High Level
Low Level
High Level
Low Level
High Level
Unknown
(9)
IN0
IN1
IN2
IN3
IN4
IN5
IN6
(10)
DIAGD1 or DIAGD2
Notes
9
IN0 to IN6 are the normalized values.
10
DIAGD1 or DIAGD2 are the values of the selected internal fault detector. See Table 7.
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
9
TIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 7. Fault Detector Selection
AD2
Inputs
AD1
OUT1
AD0
Unknown
Unknown
High Level
Unknown
Unknown
High Level
Unknown
Low Level
High Level
Unknown
High Level
High Level
Unknown
High Level
High Level
Unknown
Low Level
High Level
Unknown
Unknown
DIAGD1
Unknown
Unknown
DIAGD2
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
10
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
TYPICAL APPLICATIONS
8 contacts to
Vbat or GND
5V Regulator
VDD
Vbat
1
20
VDD1
IN3
VDD2
IN4
I/O PORT
2
3
4
5
6
7
1
1
9
470nF
8
7
6
5
4
3
2
1
IN2
IN5
1
1
IN1
IN6
IN0
IN7
MICROCONTROLLER
AD0
AD1
AD2
D1
OUT7
OUTi
CD1
CD2
D2
1
1
Relay
8
9
1
1
Relay (65Ω)
Lamp (1,2W)
Resistor
GND
10
1
Lamp
Figure 6. Typical Application Configuration
VBAT
VBAT
47 kΩ
500 Ω
47 kΩ
500 Ω
10 nF
10 nF
Contact to GND
Contact to VBAT
Figure 7. Contact Configuration
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
11
TIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
VALIM
AD2
AD1
AD0
OUT7
OUTi
8 TO 1 LOGIC MULTIPLEXER
All the symbols represented
without supply pin are
VDD2
connected to VDD2
NQ
R
Q
S
DIAGD1
VDD1
VDD2
DIAGD2
VALIM
VALIM
OUTD2
GND
VALIM
Q
S
R
CD2
+
-
VDD2
OUTD2 Driver
OUTD1 Driver
OUTD1
CD1
NOTE: The only difference between the low side driver 1 and 2 is the polarity of the command. Also, there is an integral pull-up at
pin CD1, and an internal pull-down at pin CD2.
Figure 8. Electrical Schematic
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
12
PACKAGE
PACKAGE DIMENSIONS
PACKAGE
PACKAGE DIMENSIONS
For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below.
DW SUFFIX
EG SUFFIX (PB-FREE)
20-PIN
PLASTIC PACKAGE
98ASB42343B
REV. J
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
13
SION HISTORY
REVISION HISTORY
REVISION
DATE
DESCRIPTION OF CHANGES
•
•
•
•
•
Converted to Freescale format with the current form and style
Implemented Revision History page
Updated Package Drawing 98ASB42343B to Rev. J
Added EG Pb-FREE suffix
Removed Peak Package Reflow Temperature During Reflow (solder reflow) parameter from
Maximum Ratings on page 4. Added note with instructions to obtain this information from
www.freescale.com.
11/2006
4.0
•
•
•
•
•
•
Corrected Internal Block Diagram on page 2
Restated Definition for OUT1 in 33287 Pin Definitions on page 3
Corrected value for Storage Temperature on page 4
Corrected unit for Output Resistance (Extent Limit and T ≤ 130°C) on page 5
Corrected Electrical Schematic on page 12
2/2007
5.0
J
Restated note 4 in Maximum Ratings on page 4.
33287
Analog Integrated Circuit Device Data
Freescale Semiconductor
14
RoHS-compliant and/or Pb-free versions of Freescale products have the functionality
and electrical characteristics of their non-RoHS-compliant and/or non-Pb-free
counterparts. For further information, see http://www.freescale.com or contact your
Freescale sales representative.
How to Reach Us:
Home Page:
www.freescale.com
E-mail:
support@freescale.com
For information on Freescale’s Environmental Products program, go to http://
www.freescale.com/epp.
USA/Europe or Locations Not Listed:
Freescale Semiconductor
Technical Information Center, CH370
1300 N. Alma School Road
Chandler, Arizona 85224
+1-800-521-6274 or +1-480-768-2130
www.freescale.com/support
Information in this document is provided solely to enable system and software
implementers to use Freescale Semiconductor products. There are no express or
implied copyright licenses granted hereunder to design or fabricate any integrated
circuits or integrated circuits based on the information in this document.
Europe, Middle East, and Africa:
Freescale Halbleiter Deutschland GmbH
Technical Information Center
Schatzbogen 7
81829 Muenchen, Germany
+44 1296 380 456 (English)
+46 8 52200080 (English)
+49 89 92103 559 (German)
+33 1 69 35 48 48 (French)
support@freescale.com
Freescale Semiconductor reserves the right to make changes without further notice to
any products herein. Freescale Semiconductor makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does
Freescale Semiconductor assume any liability arising out of the application or use of any
product or circuit, and specifically disclaims any and all liability, including without
limitation consequential or incidental damages. “Typical” parameters that may be
provided in Freescale Semiconductor data sheets and/or specifications can and do vary
in different applications and actual performance may vary over time. All operating
parameters, including “Typicals”, must be validated for each customer application by
customer’s technical experts. Freescale Semiconductor does not convey any license
under its patent rights nor the rights of others. Freescale Semiconductor products are
not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life,
or for any other application in which the failure of the Freescale Semiconductor product
could create a situation where personal injury or death may occur. Should Buyer
purchase or use Freescale Semiconductor products for any such unintended or
unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all
claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
directly or indirectly, any claim of personal injury or death associated with such
unintended or unauthorized use, even if such claim alleges that Freescale
Japan:
Freescale Semiconductor Japan Ltd.
Headquarters
ARCO Tower 15F
1-8-1, Shimo-Meguro, Meguro-ku,
Tokyo 153-0064
Japan
0120 191014 or +81 3 5437 9125
support.japan@freescale.com
Asia/Pacific:
Freescale Semiconductor Hong Kong Ltd.
Technical Information Center
2 Dai King Street
Tai Po Industrial Estate
Tai Po, N.T., Hong Kong
+800 2666 8080
support.asia@freescale.com
Semiconductor was negligent regarding the design or manufacture of the part.
For Literature Requests Only:
Freescale Semiconductor Literature Distribution Center
P.O. Box 5405
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners.
Denver, Colorado 80217
© Freescale Semiconductor, Inc., 2007. All rights reserved.
1-800-441-2447 or 303-675-2140
Fax: 303-675-2150
LDCForFreescaleSemiconductor@hibbertgroup.com
MC33287
Rev. 5.0
2/2007
相关型号：
©2020 ICPDF网 联系我们和版权申明