MC34825EP [NXP]
SPECIALTY INTERFACE CIRCUIT, QCC20, 3 X 3 MM, 0.60 MM HEIGHT, 0.40 MM PITCH, ROHS COMPLIANT, UTQFN-20;
| 型号： | MC34825EP |
| 厂家： | 
NXP |
| 描述： | SPECIALTY INTERFACE CIRCUIT, QCC20, 3 X 3 MM, 0.60 MM HEIGHT, 0.40 MM PITCH, ROHS COMPLIANT, UTQFN-20 接口集成电路 |
| 文件： | 总39页 (文件大小：1537K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Document Number: MC34825
Rev 4.0, 9/2014
escale Semiconductor
Technical Data
Micro-USB Interface IC
Supporting Universal Charging
Solution and Wired Accessories
34825
The 34825 is designed to support the Universal Charging Solution
(UCS) recommended by the OMTP (Open Mobile Terminal Platform),
as well as to use the same 5-pin micro or mini-USB connector for other
wired accessories. The 34825 supports various types of external power
supplies to charge the battery, such as a dedicated AC/DC adapter or
a USB port. It has functions built-in to identify the type of the power
supply, and sets low or high charging current, based on the current
capability of the power supply. The 34825 monitors the power supply,
and offers an up to 28 V of overvoltage protection (OVP) to the cell
phone against failed power supplies. The 34825 also contains analog
switches to multiplex the five pins, to support UART and high speed
USB data communication, mono or stereo audio headset with or without
a microphone and a cord remote controller, manufacturing or research-
and-development (R/D) test cables, and other accessories.
INTERFACE IC
(PB-FREE)
98ASA00716D
20-PIN QFN
The 34825 monitors both the VBUS status and the resistance
between the ID pin and the ground to identify the accessory being
plugged into the mini or micro-USB connector. A high-accuracy 5-bit
ADC is offered to distinguish 32 levels of ID resistance that are
assigned to buttons in a cord remote controller or to identification (ID)
resistors of accessories. After identifying the attached accessory, the
34825 sends an interrupt signal to a host IC and the host IC can
configure the analog switches via an I2C serial bus for further actions.
When the accessory is detached from the cell phone, an interrupt signal
is also sent to inform the host. This device is powered using
SMARTMOS technology.
Applications
• Cell phones
• MP3/MP4 players
• Portable voice recorders
• USB universal charging solution (USC-OMTP)
• Supports mini/micro - USB connector
• UART and USB high speed communication
• Remote control/accessories IDs
Features
• Identifies various types of power supplies to set low or high battery-
charging current levels
• Internal power switch to offer OVP against up to 28 V failed power
supply input
• Supports stereo/mono headset with or without microphone and
remote controller with pure passive components
• Supports USB or UART R/D test cables
• High-speed (480 Mbps) USB 2.0 compliant
• Supports 32 ID resistance values with a high accuracy 5-bit ADC
• Accessory attachment and detachment detection with an interrupt
signal to the host IC
• I2C interface
• 10 A quiescent current in Standby mode
Baseband
GPIO
34825
VDDIO
INT
I2C_SDA
I2C_SCL
RXD
VDD
ISET
Charger
LI+
I2C
UART
TXD
OUT
D+
D-
VBUS
VBUS
USB XCVR
SPK_L
SPK_R
MIC
ID
DP
ID
AUDIO
D+
D-
DM
GND
GND
USB Connector
Figure 1. 34825 Simplified Application Diagram
© Freescale Semiconductor, Inc., 2010 - 2014. All rights reserved.
ERABLE PARTS
ORDERABLE PARTS
Table 1. Orderable Part Variations
Part Number (1)
Temperature (T )
Package
A
MC34825EP
-40 °C to 85 °C
3.0 mm x 3.0 mm UTQFN
Notes
1. To order parts in Tape and Reel, add the R2 suffix to the part number.
34825
Analog Integrated Circuit Device Data
2
Freescale Semiconductor
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VDD
Internal
Supplies
OSC
VDDIO
Reset
VBUS
Detect
VBUS
Gate
Drive &
OCP
I2C_SDA
I2C_SCL
I2C
Interface
Registers
and
OUT
ISET
State
Machine
Interrupt
INT
DP
RXD
TXD
UART
Switches
DM
ID
D+
D-
USB
Switches
ID ADC
SPK_R
SPK_L
MIC
ID
Detect
Audio
Switches
VBUS
GND
Figure 2. 34825 Simplified Internal Block Diagram
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
CONNECTIONS
PIN CONNECTIONS
20
19
18
17
16
TRANSPARENT
TOP VIEW
SPK_R
SPK_L
MIC
1
2
3
4
15 OUT
I2C_SCL
I2C_SDA
14
13
21
GND
12 INT
D+
5
11 VDD
D-
6
7
8
9
10
Figure 3. 34825 Pin Connections
A functional description of each pin can be found in the Functional Pin Description section on page 14.
Table 2. 34825 Pin Definitions
Pin Number Pin Name
Pin Function
Formal Name
Definition
Right channel input for speaker signals
Left channel input for speaker signals
1
2
3
4
SPK_R
SPK_L
MIC
Input
Input
Output
IO
Speaker right channel
Speaker left channel
Microphone output
Microphone output to the baseband of the cell phone system
D+ line of the USB transceiver
D+
D+ of the USB
transceiver
5
D-
D- line of the USB transceiver
IO
D- of the USB
transceiver
6
7
8
9
RXD
TXD
Receive line of the UART
Transmit line of the UART
No Connection
Output
Input
UART receiver
UART transmitter
No Connection
IO power supply
NC
No Connection
Input
VDDIO
IO supply voltage. The VDDIO voltage is used as the reference voltage
for the I2C bus signals. This pin also functions as a hardware reset to
the IC.
10
11
12
13
14
15
16
17
NC
VDD
INT
No Connection
No Connection
Input
No Connection
Power supply
IC power supply input
Open-drain interrupt output
Output
IO
Interrupt output
I2C data
Data line of the I2C interface
I2C_SDA
Clock line of the I2C interface
Input
I2C clock
I2C_SCL
OUT
The output of the power MOSFET pass switch
Open-drain output to set the charger current
VBUS line of the Mini or micro-USB connector
Output
Output
Input
Power output
ISET
Charge current setting
VBUS power supply
VBUS
34825
Analog Integrated Circuit Device Data
4
Freescale Semiconductor
PIN CONNECTIONS
Table 2. 34825 Pin Definitions (continued)
Pin Number Pin Name
Pin Function
Formal Name
Definition
18
19
20
21
DM
D- line of the mini or micro-USB connector
IO
D- of the USB
connector
DP
D+ line of the mini or micro-USB connector
ID pin of the mini or micro-USB connector
Ground
IO
D+ of the USB
connector
ID
Input
ID of the USB
connector
GND
Ground
Ground
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
CTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 3. Maximum Ratings
Exceeding these ratings may cause a malfunction or permanent damage to the device.
Ratings
Symbol
Value
Unit
ELECTRICAL RATINGS
Input Voltage Range
VBUS Pin
V
VBUS
VOUT
-0.3 to 28
-0.3 to 8.0
OUT Pin
SPK_L, SPK_R, DP, and DM Pins
All Other Pins
-2.0 to VDD+0.3
-0.3 to 5.5
ESD Voltage (2)
V
VESD
Human Body Model (HBM) for VBUS, DP, DM, ID Pins
Human Body Model (HBM) for all other pins
Machine Model (MM)
8000
2000
200
THERMAL RATINGS
Operating Temperature
Ambient
°C
TA
TJ
-40 to +85
150
Junction
Storage Temperature
°C
TSTG
-65 to +150
Thermal Resistance (3)
Junction-to-Case
°C/W
RJC
RJA
6.0
45
Junction-to-Ambient
(5)
Peak Package Reflow Temperature During Reflow (4)
,
Note 5
°C
TPPRT
Notes
2. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 ), and the Machine Model
(MM) (CZAP = 200 pF, RZAP = 0 ).
3. Device mounted on the Freescale EVB test board per JEDEC DESD51-2.
4. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
5. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and
enter the core ID to view all orderable parts (i.e. MC33xxxD enter 33xxx)], and review parametrics.
34825
Analog Integrated Circuit Device Data
6
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics
Characteristics noted under conditions VDD = 3.6 V, VBUS = 5.0 V, VDDIO = 3.0 V, -40 °C TA 85 °C (see Figure 1), unless
otherwise noted. Typical values noted reflect the approximate parameter means at VDD = 3.6 V and TA = 25 °C under nominal
conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER INPUT
VDD Supply Voltage
VDD
2.7
-
5.5
V
VDD Power-On-Reset Threshold
Rising edge
VVDDPOR
-
-
2.5
2.65
-
V
Hysteresis
100
mV
VDD Quiescent Current
In Standby mode
IVDD
A
-
-
-
-
9.0
16
12
22
In Power Save mode
In Active mode (V
In Active mode (V
< V
> V
)
)
DD
DD
BUS
BUS
550
850
650
1000
VBUS Supply Voltage
VBUS
2.8
5.0
28
V
VBUS Detection Threshold Voltage
Rising edge
VBUS_DET
-
-
2.65
150
2.80
-
V
Hysteresis
mV
VBUS Supply Quiescent Current
In VBUS Power mode
IVBUS
-
-
-
-
-
-
1.2
1.2
0.5
mA
mA
A
In Active mode - Dedicated Charger
In Active mode - power MOSFET is off (VBUS < VDD
)
VBUS Overvoltage Protection Threshold
VBUS_OVP
Rising edge
Hysteresis
6.8
-
7.0
7.2
-
V
150
mV
VBUS Overcurrent Protection Threshold
IBUS_OCP
Triggering threshold (at onset of OTP shutoff)
1.2
1.8
2.2
A
Overtemperature Protection Threshold
Rising threshold
TOTP
°C
115
-
130
95
145
-
Falling threshold
VDDIO Supply Voltage
VDDIO
1.65
-
3.6
V
SWITCH
ISET Open Drain Output MOSFET
On resistance (loaded by 3.0 mA current)
RISETB
-
-
-
-
100
0.5
Leakage current (when the MOSFET is off at 5.0 V bias voltage)
IISET_OFF
A
OUT Pin Discharge MOSFET(6)
On resistance (loaded by 3.0 mA current)
ROUT_DISC
IOUT_OFF
-
-
-
100
-
Leakage current (when the MOSFET is off at 5.0 V bias voltage)
0.5
A
Power MOSFET
RPSW
m
On resistance (when VBUS = 5.0 V, TA< 50 °C)
-
200
250
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
CTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions VDD = 3.6 V, VBUS = 5.0 V, VDDIO = 3.0 V, -40 °C TA 85 °C (see Figure 1), unless
otherwise noted. Typical values noted reflect the approximate parameter means at VDD = 3.6 V and TA = 25 °C under nominal
conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
SWITCH (CONTINUED)
SPK_L and SPK_R Switches
On resistance (20 Hz to 470 kHz)
Matching between channels
RSPK_ON
RSPK_ONMCT
RSPK_ONFLT
-
-
-
1.6
3.0
0.05
0.01
0.15
0.05
On resistance flatness (from -1.2 V to 1.2 V)
D+ and D- Switches
On resistance (0.1 Hz to 240 MHz)
Matching between channels
RUSB_ON
RUSB_ONMCT
RUSB_ONFLT
-
-
-
-
5.0
0.5
0.1
0.1
0.02
On resistance flatness (from 0.0 V to 3.3 V)
RXD and TXD Switches
On resistance
RUART_ON
-
-
-
-
60
On resistance flatness (from 0.0 V to 3.3V)
RUART_ONFLT
5.0
MIC Switch
On resistance (at below 2.5 V MIC bias voltage)
On resistance flatness (from 1.8 to 2.3 V)
RMIC_ON
-
-
-
-
100
5.0
RMIC_ONFLT
Pull-down Resistors between SPK_L or SPK_R Pins to GND
RPD_AUDIO
-
100
-
k
Signal Voltage Range
SPK_L, SPK_R,
V
-1.5
-0.3
-
-
1.5
3.6
D+, D-, RXD, TXD, MIC
PSRR - From VDD (100 mVrms) to DP/DM Pins(7)
VA_PSRR
dB
%
20 Hz to 20 kHz with 32/16 load.
-
-
-
-
-
-60
Total Harmonic Distortion(7)
THD
20 Hz to 20 kHz with 32/16 load.
-
0.05
Crosstalk between Two Channels
less than 1.0 MHz
VA_CT
dB
dB
-60
-80
-
-
Off-Channel Isolation
Less than 1.0 MHz
VA_ISO
POWER SUPPLY TYPE IDENTIFICATION
Data Source Voltage
VDAT_SRC
V
Loaded by 0~200 A
0.5
0
0.6
-
0.7
Data Source Current
IDAT_SRC
VDAT_REF
200
A
Data Detect Voltage
Low threshold
V
0.3
0.8
0.35
0.9
0.4
1.0
High threshold
Data Sink Current
IDAT_SINK
A
DM pin is biased between 0.15 V to 3.6 V
65
-
100
8.0
135
-
DP, DM Pin Capacitance
CDP/DM
RDP/DM
pF
DP, DM Pin Impedance
All switches are off
M
-
50
-
34825
Analog Integrated Circuit Device Data
8
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions VDD = 3.6 V, VBUS = 5.0 V, VDDIO = 3.0 V, -40 °C TA 85 °C (see Figure 1), unless
otherwise noted. Typical values noted reflect the approximate parameter means at VDD = 3.6 V and TA = 25 °C under nominal
conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
ID DETECTION
ID_Float Threshold
Detection threshold
VFLOAT
V
-
2.3
-
Pull-up Current Source
IID
A
When ADC result is 1xxxx
When ADC result is 0xxxx
1.9
2.0
32
2.1
30.4
33.6
ID Shorted to Ground Detection
Detection current
IVCBL
1.0
-
1.2
50
1.4
-
mA
mV
Detection voltage threshold
VVCBL_L
LOGIC INPUT AND OUTPUT
VDDIO Logic Input Level
Input LOW level
VDDIO_IL
VDDIO_IH
-
-
-
0.5
-
V
V
Input HIGH level
1.5
Push-pull Logic Output
V
Output HIGH level (loaded by 1.0 mA current)
Output LOW level (loaded by 4.0 mA current)
VOH
VOL
0.7VDDIO
-
-
-
-
0.4
Open Drain Logic Output (INT)
VODOL
V
Output LOW level (loaded by 4.0 mA current)
-
-
0.4
I2C INTERFACE(7)
Low Voltage on I2C_SDA, I2C_SCL Inputs
High Voltage on I2C_SDA, I2C_SCL Inputs
Low Voltage on I2C_SDA Output
VI2C_IL
VI2C_IH
VI2C_OL
II2C_OL
II2C_LEAK
CI2CIN
-0.2
-
-
-
-
-
-
0.3VDDIO
VDDIO
0.4
V
V
0.7VDDIO
-
0
V
Current Load when I2C_SDA Outputs Low Voltage
Leakage Current on I2C_SDA, I2C_SCL Outputs
Input Capacitance of the I2C_SDA, I2C_SCL Pins
Notes
4.0
mA
A
pF
-1.0
-
1.0
8.0
6. The OUT pin discharge MOSFET is shown in Figure 15. This MOSFET will be turned on when the power MOSFET is off.
7. These parameters are not tested. They are guaranteed by design.
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
9
CTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics
Characteristics noted under conditions VDD = 3.6 V, VBUS = 5.0 V, VDDIO = 3.0 V, -40°C TA 85°C (see Figure 1), unless
otherwise noted. Typical values noted reflect the approximate parameter means at VDD = 3.6 V and TA = 25°C under nominal
conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER ON AND OFF DELAY
VDD Power-On-Reset Timing
VDD rising deglitch time
VDD falling deglitch time
ms
tD2
7.0
1.7
8.5
2.5
10.2
3.5
tVDDDGT_F
VBUS Detection Deglitch Time (for Both Rising and Falling Edges)(10)
tVBUS_DET
3.5
4.5
5.7
ms
VBUS Overvoltage Protection
Protection delay(8)(10)
s
tOVPD
-
-
-
2.0
-
Falling edge deglitch time(9)
tOVPDGT_F
25
VBUS Overtemperature Protection
MOSFET turning off speed when OTP occurs(10)
Deglitch time
tOTP_TO
-
-
-
0.5
-
A/s
s
tOTP_DGT
15
OSCILLATOR
Oscillation Frequency
SWITCHING DELAY
fOSC
85
100
112
kHz
ms
ID Detection Delay Time after VBUS Applied (Default Value is TD = 0100)
tD
TD = 0000
TD = 0001
TD = 0010
TD = 0011
TD = 0100
......
-
100
200
300
400
500
......
1600
-
-
-
-
-
-
-
-
......
-
-
......
-
TD = 1111
ID DETECTION
ID Float Detection Deglitch Time
tID_FLOAT
tVCBL
-
-
20
20
-
-
ms
ms
ID Shorted to Ground Detection Time (The Detection Current Source On Time)
ADC
ADC Conversion Time
REMOTE CONTROL
Key Press Comparator Debounce Time
RESET TIMING
tCONV
tRMTCON_DG
tRSTDVC
-
-
-
1.0
20
10
-
-
-
ms
ms
Device Reset Time
s
s
VDDIO Logic Input Timing
Rising edge deglitch time
Falling edge deglitch time
tVDDIODGT_R
tVDDIODGT_F
660
105
875
125
1130
150
VDDIO Reset Timing
s
VDDIO reset pulse width
tRSTVDDIO
150
-
-
34825
Analog Integrated Circuit Device Data
10
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics
Characteristics noted under conditions VDD = 3.6 V, VBUS = 5.0 V, VDDIO = 3.0 V, -40°C TA 85°C (see Figure 1), unless
otherwise noted. Typical values noted reflect the approximate parameter means at VDD = 3.6 V and TA = 25°C under nominal
conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
I2C Reset Timing
ms
I2C reset pulse width
tRSTI2C
13.5
-
-
-
-
I2C_SDA/I2C_SCL concurrent low time without causing a reset
tNRSTI2C
8.8
I2C INTERFACE(10)
SCL Clock Frequency
fSCL
tBUF
tHD:STA
tLOW
-
1.3
-
-
-
-
-
-
-
-
-
-
-
-
400
kHz
s
s
s
s
s
s
ns
Bus Free Time between a STOP and START Condition
Hold Time Repeated START Condition
Low Period of SCL Clock
-
0.6
-
1.3
-
High Period of SCL Clock
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
0.6
-
Setup Time for a Repeated START condition
Data Hold Time
0.6
-
0.0
-
Data Setup Time
100
-
Rising Time of Both SDA and SCL Signals
Falling Time of Both SDA and SCL Signals
Setup Time for STOP Condition
Input Deglitch Time (for Both Rising and Falling Edges)
Notes
20+0.1CB
20+0.1CB
0.6
-
ns
tF
-
-
ns
tSU:STO
tDGT
s
ns
55
300
8. The protection delay is defined as the interval between VBUS voltage rising above the OVP rising threshold, and the OUT pin voltage
dropping below the OVP rising threshold voltage for a VBUS ramp rate of >1.0 V/s.
9. The OVP deglitch timer is only for the falling edge threshold.
10. These parameters are not tested. They are guaranteed by design.
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
11
CTRICAL CHARACTERISTICS
ELECTRICAL PERFORMANCE CURVES
ELECTRICAL PERFORMANCE CURVES
90
2.2
2.0
Temperature = 85°C
Temperature = 25°C
Temperature = -40°C
Temperature =85°C
80
70
60
50
40
Temperature =25°C
1.8
1.6
1.4
Temperature = -40°C
1.8
1.9
2.0
2.1
2.2
2.3
-1.5 -1.0 -0.5 0.0
0.5
1.0
1.5
Input Voltage ( V)
Input Voltage ( V)
Figure 7. MIC Switch On Resistance vs Input Voltage
Figure 4. SPK Switch On Resistance vs Input Voltage
9.6
9.4
9.2
9.0
8.8
4.5
Temperature = 85°C
4.0
3.5
Temperature = 25°C
3.0
Temperature = -40°C
2.5
8.6
2.0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VDD Voltage ( V)
Input Voltage ( V)
Figure 8. VDD Supply Current vs Supply Voltage in
Standby Mode
Figure 5. USB Switch On Resistance vs Input Voltage
45
11
10
9
Temperature = 85°C
40
35
Temperature = 25°C
30
8
25
Temperature = -40°C
7
20
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
-40 -20
0
20
40
60
80
Input Voltage ( V)
Figure 6. UART Switch On Resistance vs Input Voltage
Temperature ( °C)
Figure 9. VDD Supply Current vs Temperature In
Standby Mode
34825
Analog Integrated Circuit Device Data
12
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
ELECTRICAL PERFORMANCE CURVES
900
880
860
840
820
800
780
760
9.0
7.5
6.0
4.5
3.0
1.5
0.0
-40 -20
0
20
40
60
80
0.0
1.5
3.0
VBUS Voltage ( V)
Figure 11. OUT Voltage vs VBUS Voltage
4.5
6.0
7.5
9.0
Temperature ( °C)
Figure 10. VBUS Supply Current vs Temperature In
VBUS Power Mode
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
13
CTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 34825 is designed to support cell phones that adopt
the micro or mini-USB connector as the sole wired interface
between the cell phone and external accessories. Using the
micro-USB connector for charging and USB data
communication is required by the OMTP standard for the
UCS. The 34825 further extends the micro-USB connector to
support other accessories to eliminate all other mechanical
connectors in a cell phone. The supported accessories
include various audio headsets, UART connection, R/D test
cables for firmware downloading, and other user defined
accessories, in addition to the chargers defined in the Battery
Charging Specification, Revision 1.0, from the USB
in the ID pin floating status. Detaching the accessory from the
micro or mini-USB connector causes the VBUS voltage or/
and the ID resistance to change. The identification flow will be
initiated to confirm if an accessory is still connected. The host
can also initiate the identification flow by resetting an ACTIVE
bit in the register from 1 to 0.
Upon the completion of the identification flow, an interrupt
signal is sent to the host IC, so the host IC can take further
actions. The 34825 contains switches that the host IC can
control via an I2C interface. Based on the accessory, the host
IC can configure the switch connections in the 34825, so that
the signal paths for the USB communication, or the UART
communication, or audio accessories can be established
between the micro or mini-USB connector pins and the
system ICs. If the accessory is a power supply, the supplied
voltage is switched to the Li-ion battery charging function in
the cell phone via an internal power MOSFET.
Implementer’s Forum and the CEA-936-A USB Carkit
Specification, from the Consumer Electronics Association
(CEA). The supported chargers are listed in Table 8.
The 34825 offers two mechanisms to assist the
identification of the accessory. The ID detection mechanism
allows the cell phone to measure the ID resistor value
between the ID pin and the ground with a 5-bit ADC. The
VBUS detection mechanism allows the cell phone to find out
the connection status between the D+ and D- pins. Together,
the exact accessory can be determined. A detection flow is
initiated by a change in the VBUS pin voltage or by a change
The host IC controls the 34825 via the I2C serial bus. The
register map in the 34825 contains status information of the
device and the control bits that the host IC can access to
control the 34825.
FUNCTIONAL PIN DESCRIPTION
SPEAKER RIGHT CHANNEL (SPK_R)
IO POWER SUPPLY (VDDIO)
Right channel of the baseband speaker output.
Power supply input for the logic IO interface. Generally the
IO power supply voltage should be the same as the IO
voltage used in the cell phone system. VDDIO is also one of
the hardware reset input sources. A falling edge at this pin will
reset the 34825. See Reset for more information.
SPEAKER LEFT CHANNEL (SPK_L)
Left channel of the baseband speaker output.
MICROPHONE OUTPUT (MIC)
POWER SUPPLY (VDD)
Microphone output to the baseband.
Power supply input. Bypass to ground with a 1.0 F
capacitor.
D+ OF THE USB TRANSCEIVER (D+)
D+ line of the USB transceiver.
INTERRUPT OUTPUT (INT)
Active low open-drain output. The INT pin sends an
interrupt signal to the host IC when an interrupt event
happens. The INT output returns to high voltage once all
interrupt bits are read.
D- OF THE USB TRANSCEIVER (D-)
D- line of the USB transceiver.
UART RECEIVER (RXD)
2
2
DATA LINE OF THE I C INTERFACE (I C_SDA)
Receiver line of the UART.
Data line of the I2C interface.
UART TRANSMITTER (TXD)
2
2
I C CLOCK (I C_SCL)
Transmitter line of the UART.
Clock line of the I2C interface. The I2C_SCL input together
with the I2C_SDA input forms one of the hardware reset input
sources.
NO CONNECT (NC)
These pins are not used in application. Freescale
recommends that these pins be floated
34825
Analog Integrated Circuit Device Data
14
Freescale Semiconductor
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
POWER OUTPUT (OUT)
D- OF THE USB CONNECTOR (DM)
Output of the power MOSFET in the 34825. This pin is
connected to a charger input. Bypass to ground with a 1.0 F
capacitor.
D- line of the mini or micro-USB connector.
D+ OF THE USB CONNECTOR (DP)
D+ line of the mini or micro-USB connector.
CHARGE CURRENT SETTING (ISET)
Open-drain output to set the charge current according to
the power supply current capability.
ID OF THE USB CONNECTOR (ID)
ID pin of the mini or micro-USB connector.
VBUS POWER SUPPLY (VBUS)
GROUND (GND)
USB VBUS input. Bypass this pin to ground with a less
than 10 nF capacitor. When the accessory is an audio kit, this
pin is the microphone input to the 34825.
Ground.
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
CTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
Internal
Power
Supplies
Logic &
State
Machine
I2C
Interface
VBUS
Detection
Switch
Array
ID
Logic
Output
ID ADC
Detection
Figure 12. 34825 Functional Internal Block Diagram
SWITCH ARRAY
INTERNAL POWER SUPPLIES
This block contains the bias power supplies to the internal
circuits. The inputs to this block include VBUS, VDD and
VDDIO.
The switch array consists of analog switches for UART,
USB, audio signal switching and one high-voltage power
MOSFET for power switching.
LOGIC AND STATE MACHINE
VBUS DETECTION
This block includes the state machine for accessory
detection and identification, the register map, and other logic
circuits.
This block detects whether the power supply at VBUS pin
is present or removed.
ID DETECTION
2
I C INTERFACE
The I2C interface block has the circuit for the I2C
communication that a master device can use to access the
registers in the 34825. The 34825 is a slave device.
This block contains a circuit to detect whether an ID resistor
is connected to the ID pin or not.
ID ADC
LOGIC OUTPUT
An internal 5-bit ADC measures the resistance at the ID
pin. The result is stored in the ADC Result register and sent
to the Logic and State Machine block to determine what
accessory is attached.
The logic output includes two open-drain logic output
signals, INT and ISET.
34825
Analog Integrated Circuit Device Data
16
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
The 34825 has five operational modes: Power Down
mode, VBUS Power mode, Standby mode, Active mode, and
Power Save mode. The mode transition diagram is given in
Figure 13.
VBUS power down
VBUS power up
VBUS
Power
Power
Down
VDD > VVDDPOR
VDD > VVDDPOR
VDD < VVDDPOR
VDD < VVDDPOR
I2C resets ACTIVE bit or
detachment of accessory
Standby
Active
ID det or VBUS det
I2C or detection
of no activity
I2C or detection
of the activity
Detachment
of accessory
Power
Save
Figure 13. Mode Transition Diagram
ACTIVE MODE
POWER DOWN MODE
The Power Down mode is when neither the VDD pin nor
the VBUS pin is powered. In this mode, the IC does not
respond to any accessory attachment except for a power
supply. When an external power supply is plugged into the
mini or micro-USB connector, the 34825 enters the VBUS
Power mode.
The Active mode starts when an accessory is plugged into
the mini or micro-USB connector while the VDD pin is
powered. The 34825 identifies the accessory and interrupts
the host IC for further actions. Different functions will be
enabled according to the identification result, so the
quiescent current in Active mode is dependent on the type of
accessories.
VBUS POWER MODE
The operational mode can be changed from Active to
Standby either by an accessory detachment or by resetting
the ACTIVE bit to 0 through an I2C programming operation.
The 34825 enters the VBUS Power mode when the VBUS
pin is powered but the VDD pin is not. In the VBUS Power
mode, the internal power MOSFET is turned on to power the
charging function in the cell phone. The ISET pin outputs
high-impedance in this mode.
POWER SAVE MODE
The Power Save mode can be enabled only for
accessories with a remote controller (refer to Table 22). The
34825 enters into the Power Save mode to minimize the
operating current while such an accessory is attached, but
not in operation. For example, if the cell phone is not in an
audio playback mode when a headset is attached, the host IC
can force the 34825 to the Power Save mode via the I2C
programming. The 34825 can also automatically enter into
the Power Save mode when no activity is detected on the
SPK_R or SPK_L pins in 10 seconds. The VDD current in the
Power Save mode is slightly higher than the current in the
Standby mode.
STANDBY MODE
The Standby mode is when the VDD voltage is higher than
the POR (Power-On-Reset) threshold and no accessory is
attached. In this mode, only the ID detection circuit, the I2C
interface, and the internal registers are powered in order to
minimize the quiescent current from the VDD pin. The ID
detection circuit samples the status of the ID line every
50 ms.
If detecting an attachment of an accessory, the 34825
moves to the Active mode for further accessory identification.
The 34825 can exit the Power Save mode by an I2C
programming or will exit the mode automatically when
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
17
CTIONAL DEVICE OPERATION
POWER-UP
detecting audio signal activities or an accessory detachment.
If the transition is caused by an accessory detachment, the
34825 moves from the Power Save mode to the Standby
mode directly. Otherwise, it moves to the Active mode, and
the configuration of the IC resumes to the same configuration
before entering the Power Save mode.
accessory identification flow shown in Figure 14 will be re-
started.
The PSAVE bit is also a R/W bit. When the 34825 is
configured to the Auto Power-save mode (AutoPSAVE bit is
set to 1), the PSAVE bit indicates whether the 34825 is in the
Power Save mode or not. When the 34825 is configured to
the Manual Power-save mode (AutoPSAVE bit set to 0), the
host IC can writes ‘1’ to the PSAVE bit to force the 34825 into
the Power Save mode when an Audio R/C accessory is
attached. For all other accessories attachment, the 34825
does not enter the Power Save mode even the PSAVE bit is
set to 1.
DEVICE MODE REGISTER
The PSAVE bit, ACTIVE bit and RST bit in the Device
Mode register (refer to Table 10) hold the information of the
device operational mode. The RST bit, which is of R/C (read
and clear) type, indicates whether a reset has occurred. The
RST bit is set when a reset occurs (refer to Reset for more
information). The RST bit is cleared when read by an I2C
access. The ACTIVE bit and the PSAVE bit together indicate
the device mode by the relationship shown in Table 6. When
the device is in the VBUS Power mode, the registers are not
powered up.
Table 6. The Device Modes vs. the Register Bits
PSAVE
ACTIVE
MODE
0
0
1
1
0
1
1
0
Standby
Active
The ACTIVE bit is a R/W (read and write) bit, it can be
written by an I2C operation. When the host IC writes ‘0’ to the
ACTIVE bit, the device will be forced to the Standby mode. If
an accessory is attached when the ACITVE is set to 0, the
Power Save
Undefined
POWER-UP
The 34825 has four possible power-up scenarios
depending on which of the VDD pin and the VBUS pin is
powered up first. The four scenarios correspond to the
following four mode transitions.
SCENARIO 2: VBUS = HIGH AND VDD IS
POWERED UP (VBUS POWER MODE TO STANDBY
MODE TRANSITION)
If the VBUS pin is already powered when the VDD pin is
powered up, the device moves from the VBUS Power mode
to the Standby mode and then quickly moves to the
identification flow of the Active mode to identify the
accessory, as shown in Figure 14.
1. From Power Down to VBUS Power: the VBUS pin is
powered up when VDD < VVDDPOR (VDD POR
threshold)
2. From VBUS Power to Standby: VBUS is already
powered when the VDD voltage rises above its POR
threshold
After the VDD pin is powered up, the 34825 starts up the
internal supplies. The POR resets all register bits. The power
MOSFET remains on during the reset process.
3. From Power Down to Standby: the VDD pin is
powered up when VBUS < VVBUSPOR (VBUS POR
SCENARIO 3: VBUS = 0 V AND VDD IS POWERED
UP (POWER DOWN MODE TO STANDBY MODE
TRANSITION)
threshold)
4. From Standby to Active: the VDD pin is already
powered when the VBUS voltage rises above its POR
threshold
If no accessory is plugged into the micro or mini-USB
connector when VDD is powered up, the 34825 moves from
the Power Down mode to the Standby mode. The internal
supplies are started up first, and then the whole chip is reset
and is ready to accept accessories. Then when an accessory
is attached, the 34825 enters the Active mode. The power
MOSFET is off in this case since VBUS = 0 V.
SCENARIO 1: VDD = 0 V AND VBUS IS POWERED
UP (POWER DOWN MODE TO VBUS POWER
MODE TRANSITION)
If the VDD pin is not powered but the VBUS is powered up
within a voltage range between the POR threshold and the
OVP (overvoltage protection) threshold, the internal power
MOSFET is softly turned on. The IC is in the VBUS Power
mode.
SCENARIO 4: VDD = HIGH AND VBUS IS
POWERED UP (STANDBY TO ACTIVE MODE
TRANSITION)
In this VBUS Power mode, the ISET outputs high-
impedance and all registers are in the reset state. The power
MOSFET remains on unless it is disabled by the overvoltage
protection or the overtemperature protection block.
This is a normal VBUS detection case as shown in
Figure 14. More description can be found in Power Supply
Type Identification.
34825
Analog Integrated Circuit Device Data
18
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
ACCESSORY IDENTIFICATION
ACCESSORY IDENTIFICATION
Accessories are categorized into two groups. Powered
accessories are accessories that supply power to the VBUS
pin while non-powered accessories do not. When the
accessory is a powered one, the VBUS detection mechanism
will check the connection between the D+ and the D- pins as
part of the power supply type identification (PSTI). A powered
accessory may or may not have an ID resistor. A non-
powered accessory must have an ID resistor for the
identification purpose.
resistor values are 619 k and 1.0 M respectively, as
given in Table 22. Such accessories are non-powered
accessories. The 34825 monitors the ID pin
continuously for key pressing when such an accessory
is connected. 13 ID resistors are assigned to the
remote control keys, as listed in Table 22.
3. Other accessories. The remaining ID resistor values
are reserved for users to assign to their own
accessories.
Accessories that have an ID resistor are grouped into
three types, as listed in Table 22.
The identification flow chart is shown in Figure 14. In the
Standby mode, the 34825 monitors both the ID pin and the
VBUS pin simultaneously. If an accessory is detected, the
identification state machine will find out in parallel the ID
resistor value and the type of the power supply (if a powered
accessory is attached). When the 34825 is in the Active mode
with the ACTIVE bit = 1, the host IC can force the ACTIVE bit
to 0 via the I2C bus to initiate the identification state machine.
1. Test Accessories. Such accessories include two USB
test cables that are powered accessories, and two
UART test cables that are non-powered accessories. A
test accessory has an ID resistor and four ID resistor
values are reserved for them (see Table 22 for the ID
resistor assignment). The USB or the UART switches
in the IC will be turned on automatically when a test
accessory is attached.
The details on the identification flow for the VBUS-
detection mechanism and the ID detection mechanism are
described as following.
2. Accessories with a remote controller. Two accessories
are offered to support remote control (RC) keys. The ID
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
19
CTIONAL DEVICE OPERATION
ACCESSORY IDENTIFICATION
VBUS=0V
ACTIVE = 0
ID Float
VBUS
Applied?
Set
DETACH bit
No
Yes
ID Float?
Yes
No
Set
Clear
Set
VBUS_DET bit
ID_FLOAT bit
ID_FLOAT bit
Yes
No
Set
ID Float?
ADC RESULT
Set
ID_GND bit
ID shorted
to GND?
ADC =
00000?
Yes
Yes
Yes
No
No
Yes
Key
No
Delay
TD time
VBUS_DET
=1?
Released?
No
Yes
Yes
No
DP->DM
SHORT?
ADC =
Key Value?
Key Released
within 1.5s?
Set
ATTACH bit
No
Yes
No
ID_FLOAT
=1?
ADC =
1000x?
ADC =
0111x?
Yes
No
No
No
Yes
Yes
Turn on
UART
switches
DM->DP
SHORT?
Turn on
USB switches
Yes
No
Set DP/DM
_SHORT bit
Set
USB_CHG bit
Set
ATTACH bit
Set
ACTIVE bit
Figure 14. Detailed Accessory Identification Flow Diagram
ID DETECTION
The ID detection relies on the resistance between the ID
pin and the ground (RID) inside the accessory for the
accessory detection and recognition. The nominal ID
resistance that the 34825 supports is listed in Table 7 as well
as in Table 22. The 34825 offers a 5-bit ADC for the
resistance recognition and the corresponding ADC results vs.
the RID are also listed in Table 7. The resistors are required
to have 1% or better accuracy for the ADC to recognize
successfully.
pin is floating. An ID_FLOAT bit in the Status register stays in
the value of 1. When a resistor less than or equal to 1.0 M
is connected between the ID line and the ground, the
ID_FLOAT bit changes to 0. When the resistor is removed,
ID_FLOAT bit returns to 1. A falling-edge of the ID_FLOAT bit
represents the attachment of the accessory and the ADC is
enabled to measure the ID resistance. The ADC Result
register has the identification result of the RID, as given in
Table 7. A rising edge of the ID_FLOAT bit represents the
detachment of the accessory.
A comparator monitors the ID pin for attachment and
detachment detection. When no accessory is attached, the ID
34825
Analog Integrated Circuit Device Data
20
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
ACCESSORY IDENTIFICATION
The ADC results are broken into two groups. The values
between ‘00001’ to ‘01101’ are assigned to 13 remote-control
keys for the two accessories that support remote controllers,
as listed in Table 22. The rest of the ADC results are
assigned to various accessories. If the ADC result is one of
the remote control key values in the identification flow, it is
possible that the remote control key is stuck when the
accessory is attached.
flow will return to re-detect the ID line; Otherwise, the
ATTACH bit will be set and the ADC Result register has the
key result. After the key is released, the 34825 will detect the
ID resistance value again. If the accessory is still connected,
the ATTACH bit is set again and the ADC result has the ID
resistor value of the accessory.
When the ADC result is 00000, the resistance between the
ID pin and the ground is less than 1.90 k. The ID_GND bit
in the Status register indicates whether the ID pin is shorted
to ground or not. If the ID pin is shorted to ground with less
than 30 of resistance, the ID_GND pin is set to “1”.
A special Stuck Key Identification flow is designed to
resolve such an issue. As shown in the Figure 14, if the stuck
key is recognized but is released within 1.5s, the identification
Table 7. ADC Output vs. Resistor Values (Unit: k)
ADC Result
00000
RID (k)
ADC Result
RID (k)
ADC Result
RID (k)
ADC Result
RID (k)
(1)
01000
01001
01010
01011
01100
01101
01110
01111
10.03
12.03
14.46
17.26
20.5
10000
10001
10010
10011
10100
10101
10110
10111
40.2
49.9
64.9
80.6
102
121
150
200
11000
11001
11010
11011
11100
11101
11110
11111
255
301
365
442
523
619
00001
00010
00011
00100
00101
00110
00111
Notes
2.00
2.604
3.208
4.014
4.820
6.03
24.07
28.7
1000
(2)
8.03
34.0
1. If the ID resistance is below 1.90 k (nominal value), the ADC result is set to 00000.
2. If the ID line is floating, the ADC result is set to 11111
POWER SUPPLY TYPE IDENTIFICATION
The 34825 supports various standard power supplies for
charging the battery. The power supplies supported include
those that are user defined, and the ones defined in the
Battery Charging Specification, Revision 1.0, from the USB
Implementer’s Forum and the CEA-936-A USB Carkit
Specification, from the Consumer Electronics Association.
The five types of power supplies specified in the afore
mentioned two specification documents are listed in Table 8.
between the DP and the DM pins. The state machine starts
when the VBUS pin voltage rises above the VBUS detection
threshold, which is indicated with an VBUS_DET bit in the
status register. The state machine will find out if the DP and
DM pins are shorted, indicated with the DP/DM_SHORT bit,
or the connection has the characteristics of a USB charger,
indicated with the USB_CHG bit. Together with the ID
detection result, the power supply type can be determined.
The conditions for reaching the conclusion of the five
supported power supplies are listed in Table 8.
The Power Supply Type Identification (PSTI) function is
offered to assist the identification of the power supply type.
The PSTI state machine checks the connection status
Table 8. Power Supply Type vs. Detection Result
Item #
VBUS_DET
DP/DM_SHORT
USB_CHG
ID_FLOAT
ADC Result
Accessory Type
1
2
3
4
5
1
1
1
1
1
0
0
1
1
1
0
1
0
0
0
1
1
1
0
0
11111
11111
11111
10111
11011
Standard USB Port
USB Charger
Dedicated Charger
Carkit Charger Type 1
Carkit Charger Type 2
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
21
CTIONAL DEVICE OPERATION
OPERATION AFTER IDENTIFICATION
OPERATION AFTER IDENTIFICATION
The operation after the identification is dependent on the
VDDIO voltage. The VDD voltage has to be higher than its
POR threshold for the 34825 to perform the identification
state machine. Once completed, the identification results are
stored in the Status and the ADC Result registers and the
ATTACH bit is set. If the VDDIO is not powered, the interrupt
signal from the INT pin cannot be sent because the INT pin is
normally pulled up to the VDDIO. The host cannot access the
34825 either via the I2C bus. Hence, no communication will
occur between the 34825 and the host IC when the VDDIO is
not powered. The INT signal will send an interrupt signal if the
VDDIO is powered and the ATTACH bit is not masked by the
ATTACH_m bit (refer to Interrupt on page 27 for more
details). If the ATTACH bit is masked while the VDDIO is
powered, the interrupt signal will not be sent but the host IC
can still access the register map via the I2C bus. Once the
host IC accesses the 34825 register map and determines the
accessory type, it can manage the analog switches and other
signals in the 34825 by programming the S/W Control 1 and
S/W Control 2 registers.
The switches are open by default except if the attached
accessory is one of the four test cables listed in Table 22.
More descriptions on the analog switches and the operation
of the 34825 are given in the following sections.
ANALOG SWITCHES
signals of +/-1.5 V, referencing to the GND pin voltage. The
SPK_L and the SPK_R pins are pulled down to ground via a
100 k resistor respectively, as shown in Figure 15. A
microphone switch connects the MIC pin to the VBUS pin.
SIGNAL SWITCH ARRAY
The 34825 offers an array of analog switches for signal
switching, as shown in Figure 15. Two pairs of switches (USB
and UART) are for switching the UART and USB signals to
the micro or mini-USB connector. Stereo audio signals can
be switched from the SPK_L and the SPK_R inputs to the DP
and the DM pins that are wired to the USB connector. Both
the SPK_L and the SPK_R inputs are capable of passing
All switches are controlled by bits in the S/W Control 1 and
2 registers except when the accessory attached is a test
cable.
DP
RXD
SW1
TXD
DM
SW2
SW3
D+
SW6
SW7
D-
SW4
SPK_R
SPK_L
SW5
MIC
VBUS
Gate
Drive
SW8
ISET
SW9
OUT
SW10
Figure 15. Analog and Digital Switches
34825
Analog Integrated Circuit Device Data
22
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
OPERATION AFTER IDENTIFICATION
power MOSFET is also used as the input overvoltage
protection (OVP) or overcurrent protection (OCP) switch for
other components in the cell phone, such as the charger IC,
to allow a low voltage rated charger IC to be used for cost
reduction.
POWER MOSFET
The SW8 in Figure 15 is a power MOSFET that controls
the power flow from the VBUS input to the OUT pin. The
power MOSFET serves two purposes. For the Audio
accessory with microphone, the power MOSFET isolates the
VBUS pin from both the input decoupling capacitor and the
input quiescent current of the charger IC connected to the
OUT pin, so that the microphone signal can be connected to
the VBUS pin without any interference from the OUT pin. The
The power MOSFET is guaranteed to be turned on in
VBUS power mode even when the VDD voltage is below
VVDDPOR threshold, to ensure that the cell phone battery can
be charged when the battery is fully discharged.
PROTECTION
(constant current) mode, regulating the output current at the
OCP limit. If the OCP condition persists, the IC temperature
will rise, eventually reaching the overtemperature protection
(OTP) limit. The 34825 then turns off the power MOSFET and
sets the OTP_EN interrupt bit in the Interrupt register to
inform the host IC. The power MOSFET is turned on again
when the IC temperature falls below the OTP falling
temperature threshold, and the OVP_OTP_DIS bit is set. If
the above case happens repeatedly seven times, the power
MOSFET will be permanently turned off until the accessory is
detached or the IC is reset.
OVERVOLTAGE PROTECTION (OVP)
The VBUS line is capable of withstanding a 28 V voltage.
The 34825 protects the cell phone by turning off the internal
power MOSFET when the VBUS voltage is higher than the
OVP threshold. In this case, the 34825 turns off the power
MOSFET within 1.0 s after the input voltage exceeds the
OVP threshold, and the OVP_EN bit in the Interrupt register
is set to interrupt the host IC. When the OVP event is cleared,
the OVP_OTP_DIS bit in the Interrupt register is set to inform
the host IC.
The power MOSFET is turned off with a limited speed
under the OTP case to prevent a high overshoot voltage at
the VBUS pin.
OVERCURRENT PROTECTION (OCP) AND
OVERTEMPERATURE PROTECTION (OTP)
If the current flowing through the power MOSFET exceeds
the specified OCP limit, the 34825 will operate in CC
OPERATION WITH ACCESSORIES
low impedance when the key is released and returns to
a high -mpedance, due to the clearance of the KP bit
when the interrupt register is read.
AUDIO ACCESSORY SUPPORTING REMOTE
CONTROLLER (R/C ACCESSORY)
Two ID resistors are designated for accessories with a
remote controller, as listed in Table 22. A typical accessory
with a remote controller is an audio headset that has a stereo
speaker, a micro phone, and a remote controller, as shown in
Figure 16. The five pins in the mini or micro-USB connector
are assigned in Figure 16. If some components are not
included in the accessory, the corresponding pins should be
left floating. For example, if the microphone is not included in
the stereo headset, VBUS pin should be left floating in the
headset.
3. Long key press: if the key pressing time is longer than
TLKP, the long key press bit LKP in the Interrupt register
is set to inform the host IC. The host IC needs to
respond to the key press immediately. The ADC result
holds the key value. When the key is released, the long
key release bit LKR in the Interrupt register is set to
interrupt the host IC again. The ADC Result register
still has the key value.
When such a accessory is attached, the 34825 can either
be forced into the Power Save mode or automatically enter
into the Power Save mode. This is controlled by the
AutoPSAVE bit in the Control register.
The timing of the key pressing is shown in Figure 17. If a
key is pressed for a time less than 20 ms, the 34825 ignores
this key press. If the key is still pressed after 20 ms, 34825
starts a timer to count the time during which the key is
pressed. There are three kinds of key press conditions
according to the pressing time: error key press, short key
press, and long key press.
When AutoPSAVE = 1, if no activity is detected at the
SPK_L and SPK_R pins in 10 seconds, the 34825 enters the
Power Save mode automatically to minimize the quiescent
current. Upon detecting the activity in audio signal switches,
the 34825 returns to the Active mode. When AutoPSAVE = 0,
the host IC can control the mode of 34825 manually by
setting the PSAVE bit in the Device Mode register via I2C.
1. Error key press: if the key pressing time is less than
TKP, The 34825 ignores this key press.
2. Short key press: if the key pressing time is between
TKP and TLKP, the KP bit is set to inform the host IC.
In the Power Save mode, the key pressing is monitored as
well.
The ADC result holds the key value. The INT outputs
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
23
CTIONAL DEVICE OPERATION
OPERATION AFTER IDENTIFICATION
VBUS
AUDIO
ACCESSORY
D+
D-
MIC
Audio_R
Audio_L
R2
ID
R1
RN-1
R3
…...
SEND/END
HOLD
/
RN
GND
Figure 16. Audio Accessory with Remote Control and Microphone
TKP
TLKP
20 ms
20 ms
Key Press
20 ms
KP
INT
Interrupt Register read
LKP
LKR
INT
Interrupt Register read
ADC Time
Interrupt Register read
Figure 17. The Remote Control Key Pressing Timing
UART cable. The test accessory has four ID resistance
TEST ACCESSORY
values to distinguish the test cable type. The detection result
turns on or off the USB switches, UART switches, and the
power MOSFET automatically, as shown in the Table 9.
The Test Accessories listed in Table 22 are special USB
cables and UART cables for test and R/D purpose. It has an
ID resistance to differentiate it from a regular USB cable or
Table 9. Switch Status vs. Test Cables
Accessory Type
UART test cable type 1
UART test cable type 2
USB test cable type 1
USB test cable type 2
Other accessories
ADC Result
Auto-ON Switches
Power MOSFET
01110
01111
10000
10001
others
UART Switches
UART Switches
USB Switches
USB Switches
OFF
OFF
ON
ON
No auto-on Switches No auto-on Switches
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
24
FUNCTIONAL DEVICE OPERATION
OPERATION AFTER IDENTIFICATION
a value of either 200 k or 440 k to distinguish the current
capability of the charger. Refer to the CEA-936-A USB Carkit
Specification for more information.
USB HOST (PC OR HUB)
When the attached accessory is a USB host or hub, the ID
pin is floating. The power MOSFET is turned on to allow the
charger to charge the battery. The ISET outputs default high
impedance to limit the charging current to a lower level. The
host IC can turn on the D+ and D- switches and then pull the
D+ signal to high to start the USB attaching sequence.
When the attached accessory is a 5-wire carkit charger,
the 34825 turns on the power MOSFET to allow the Li-ion
battery charging function to start. The host can set the ISET
outputting high-impedance or low impedance to choose the
charge current.
USB CHARGER OR DEDICATED CHARGER
RESERVED ACCESSORY
When the attached accessory is a USB Charger or a
Dedicated Charger, the 34825 turns on the power MOSFET
to allow the charger to start. The host IC can set the ISET
outputs low impedance to allow a higher charge current.
The users can assign the reserved ID resistor values listed
in Table 22 to their user specific accessories. When a user
specific accessory is attached, the identification flow will
identify the ID resistance and as well as the power supply
type in case of a powered accessory. The ADC Result
register and the Status register contain the information of the
RID value and the power supply type. The baseband can read
these registers to distinguish the type of the accessory for
further actions.
5-WIRE CARKIT CHARGER (TYPE 1 OR TYPE 2)
A 5-wire carkit charger is a charger specified in the CEA-
936-A USB Carkit Specification. The 5-wire carkit charger
outputs 5.0 V to the VBUS pin, has the D+ and D- pins
shorted internally, and has an ID resistor. The ID resistor has
DETACHING DETECTION
When either the VBUS voltage drops below the VBUS
power detection threshold or the ID resistor is removed, a
detaching detection flow starts. Figure 18 shows the detailed
detection flow. When the DETACH bit is set, the INT outputs
low voltage to inform the host IC. At the end of the detaching
detection flow, the ACTIVE bit is cleared and the 34825
enters the Standby mode. A new identification flow will start
if either the VBUS voltage is above its POR threshold or the
ID resistor is connected.
RID
Connected
VBUS=5V
VBUS
Removed
No
No
ID Float
Yes
Yes
Clear
Set
VBUS_DET bit
ID_FLOAT bit
Clear
ATTACH bit
Set
DETACH bit
Clear
ACTIVE bit
Figure 18. The Detachment Detection Flow
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
25
CTIONAL DEVICE OPERATION
LOGIC CONTROL FEATURES
LOGIC CONTROL FEATURES
RESET
duration less than the deglitch time will be ignored. If the
HARDWARE RESET
pulse on the VDDIO lasts longer than the deglitch time, a
reset from the VDDIO is detected to generate a reset signal.
To effectively reset the 34825, the reset pulse from the
VDDIO needs be longer than the 150 s minimum reset
pulse width given in the Dynamic Electrical Characteristics
table.
The 34825 has three sources for hardware resetting the
IC. As the Figure 19 shows, the sources include the Power-
On-Reset caused by the rising VDD, a hardware reset caused
by the VDDIO input and a hardware reset using the I2C bus
lines. The Power-On-Reset is described earlier. The reset
caused by the VDDIO input or by the I2C bus lines belongs to
system resets.
The hardware reset condition using the I2C signals is
shown in Figure 20. When both the I2C_SCL and the
I2C_SDA have a negative pulse with time of tRSTI2C, a
hardware reset is generated. The result of the reset is same
as a Power-On-Reset.
SOFTWARE RESET
In addition to the two hardware reset types, the system
reset has another reset source, the software reset by writing
‘1’ to the RESET bit in the Control register. The Reset bit will
be cleared to ‘0’ at once since it is of W/C type. The
consequence of the software reset is the same as the
hardware reset. All registers will be reset.
The operating waveforms of the hardware reset using the
VDDIO pin are shown in Figure 21. The VDDIO detection has
a deglitch-time tVDDIODGT_F. A glitch on the VDDIO with
I2C_SDA
I2C-Bus
Reset
I2C_SCL
Detection
VDD
+
reset
Delay
Time
-
VVDDPOR
VDDIO
Reset
VDDIO
Detection
Figure 19. Sources of Reset in 34825
8.8~13.5ms
Reset
I2C_SDA
I2C_SCL
Reset
Start
Stop
Condition
Condition
Condition
Figure 20. Hardware Reset Using the I2C Bus
34825
Analog Integrated Circuit Device Data
26
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
I2C SERIAL BUS INTERFACE
tVDDIODGT_F
Reset
VDDIO
Figure 21. Hardware Reset Using the VDDIO Input
INTERRUPT
There are eight interrupt sources in the 34825 causing an
interrupt at the INT pin to the host IC. They are accessory
attachment, accessory detachment, short-key press, long
key press, long-pressed key release, VBUS voltage OVP, the
IC temperature OTP, and either the OVP or the OTP
condition is removed. The 34825 detects each event and sets
the corresponding bit in the Interrupt register. As long as the
Interrupt register is set, the INT pin outputs low voltage. The
Interrupt register is not writable. When the Interrupt register is
read, the Interrupt register is cleared automatically. Once the
Interrupt register is cleared, the INT pin returns to high
voltage.
An interrupt mask register is provided to mask unwanted
interrupt source. When the bit of the Interrupt Mask register
is set to 1, the corresponding interrupt source is blocked. The
INT does not output low voltage even though this interrupt bit
is set in the Interrupt register.
LOGIC OUTPUT
There are two open-drain logic output pins, INT and ISET.
The INT pin is related to the interrupt sources as described in
the Interrupt section. The ISET pin is controlled by the
register bit with the same name in the Control register.
The ISET generally is used to control the charge current
level. A typical charger IC uses one external resistor to set
the charge current. By using ISET output, the charger IC can
use two external resistors in parallel to set two charge current
levels, as shown in Figure 27.
2
I C SERIAL BUS INTERFACE
The I2C bus is enabled in the Standby, the Power Save,
and the Active modes. The serial clock (SCL) and the serial
data (SDA) lines must be connected to a positive supply
using pull-up resistors. Internally the I2C bus voltage is
referenced to the VDDIO input. The 34825 is a slave device.
Maximum data rate is 400 kbps.
1
0
0
0
1
0
1
R/W
Figure 22. I2C Slave Address
The following three figures show three I2C-bus transaction
protocols. The Word Address is an 8-bit register address in
the 34825.
ADDRESSING AND PROTOCOL
The 7-bit address for the 34825 is 0100101, as shown in
Figure 22.
Figure 23. Master Transmits to Slave (Write Mode)
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
27
CTIONAL DEVICE OPERATION
REGISTER MAP
Figure 24. Master Reads After Setting Word Address (Write Word Address and then Read Data)
Figure 25. Master Reads Slave Immediately after First Byte (Read Mode)
REGISTER MAP
Table 10. Register Map
Reset
Value
Addr Register Type
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
83H
85H
87H
88H
93H
94H
A0H
A1H
A2H
A3H
Interrupt
R/C 00000000
OVP_OTP_DIS
OTP_EN
OTP_EN_m
Reserved
OVP_EN
OVP_EN_m
Reserved
LKR
LKP
KP
KP_m
DETACH
ATTACH
Interrupt Mask R/W 00000000 OVP_OTP_DIS_m
LKR_m
LKP_m
DETACH_m
ATTACH_m
ADC Result
Timing Set
R
00011111
Reserved
ADC Value
R/W 00000000
Key Press
Long Key Press
S/W Control 1 R/W 00000001
S/W Control 2 R/W 00000100
Reserved
Reserved
FET_STATUS
Reserved
Reserved
Reserved
DP/DM Switching
Reserved
VBUS Switching
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
USB_CHG
AutoPSAVE
Reserved
ISETB
DP/DM_SHORT
Reserved
Reserved
ID_FLOAT
RESET
Status
Control
R
0x000xxx
ID_GND
VBUS_DET
ADC_STATUS
Reserved
R/W 011000x0
R/W 10010100
R/W 00000001
Reserved
Reserved
Time Delay
Device Mode
TD
Reserved
Reserved
Reserved
Reserved
PSAVE
ACTIVE
RST
34825
Analog Integrated Circuit Device Data
28
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
REGISTER MAP
Table 11. Interrupt Register
Bit
Mode
Symbol
Reset
Description
Notes
0
1
2
3
4
5
6
7
1: accessory attached
1: accessory detached
R/C
R/C
R/C
R/C
R/C
R/C
R/C
R/C
ATTACH
DETACH
KP
0
0
0
0
0
0
0
0
1: remote controller short key is pressed
1: remote controller long key is pressed
1: remote controller long key is released
LKP
LKR
1: VBUS voltage higher than the OVP threshold
1: The temperature of 34825 is above the OTP threshold
1: OVP or OTP event is removed
OVP_EN
OTP_EN
OVP_OTP_DIS
Table 12. Interrupt Mask Register
Bit
Mode
Symbol
Reset
Description
1: interrupt disabled
Notes
0
1
2
3
4
5
6
7
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ATTACH_m
DETACH_m
KP_m
0
0
0
0
0
0
0
0
1: interrupt disabled
1: interrupt disabled
1: interrupt disabled
LKP_m
1: interrupt disabled
LKR_m
1: interrupt disabled
OVP_EN_m
OTP_EN_m
OVP_OTP_DIS_m
1: interrupt disabled
1: interrupt disabled
Table 13. ADC Result Register
Bit
4-0
7-5
Mode
Symbol
Reset
Description
Notes
Notes
ADC Result of the ID resistor
R
R
ADC Result
Reserved
11111
000
Table 14. Timing Set Register
Bit
3-0
Mode
Symbol
Reset
Description
Long key press duration
0000: 300 ms
0001: 400 ms
0010: 500 ms
......
R/W
Long Key Press
0000
7-4
Normal key press duration
0000: 100 ms
0001: 200 ms
0010: 300 ms
......
R/W
Key Press
0000
Table 15. Timing Table
Setting Value
Key Press
Long Key Press
0000
0001
0010
100 ms
200 ms
300 ms
300 ms
400 ms
500 ms
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
29
CTIONAL DEVICE OPERATION
REGISTER MAP
Table 15. Timing Table (continued)
Setting Value
Key Press
Long Key Press
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
400 ms
600 ms
700 ms
800 ms
900 ms
1000 ms
1100 ms
1200 ms
1300 ms
1400 ms
1500 ms
-
500 ms
600 ms
700 ms
800 ms
900 ms
1000 ms
-
-
-
-
-
-
-
-
Table 16. S/W Control Register 1
Bit
1-0
Mode
Symbol
Reset
Description
Notes
VBUS line switching configuration
R/W
VBUS Switching
01
00: open all switches connected to the VBUS line.
01: internal power MOSFET on
10: VBUS connected to MIC
11: open all switches connected to the VBUS line.
4-2
DP/DM line switching configuration
R/W
DP/DM Switching
000
000: open all switches
001: DP connected to D+, DM connected to D-
010: DP connected to SPK_R, DM connected to SPK_L
011: DP connected to RxD, DM connected to TXD
Others: open all switches connected to the DP pin and DM pin
7-5
R
Reserved
000
Table 17. S/W Control Register 2
Bit
3-0
Mode
Symbol
Reset
Description
Notes
R/W
R/W
Reserved
ISETB
0100
0
4
ISET output
0: high-impedance
1: low-impedance
7-5
R/W
Reserved
000
34825
Analog Integrated Circuit Device Data
30
Freescale Semiconductor
FUNCTIONAL DEVICE OPERATION
REGISTER MAP
Table 18. Status Register
Bit
Mode
Symbol
Reset
Description
Notes
0
1
2
3
4
5
6
7
ADC conversion status
1: ADC conversion completed
0: ADC in progress
R
ADC_Status
x
VBUS voltage is higher than the POR
0: no
1: yes
R
R
R
R
R
R
R
VBUS_DET
ID_FLOAT
x
ID line is floating
0: no
1: yes
x
ID pin is shorted to ground
0: no
1: yes
ID_GND
0
DP/DM shorted
0: no
1: yes
DP/DM_SHORT
USB_CHG
0
A USB charger is connected
0: no
1: yes
0
The on/off status of the power MOSFET
0: off
1: on
FET_STATUS
Reserved
x
0
Table 19. Control Register
Bit
1-0
Mode
Symbol
Reset
Description
Notes
R/W
W/C
Reserved
RESET
x0
0
2
Soft reset. When written to 1, the IC is reset. Once the reset is complete,
the RST bit is set and the RESET bit is cleared automatically.
1: to soft reset the IC
4-3
5
R/W
R/W
Reserved
00
1
Automatic Power Save mode detection control
AutoPSAVE
0: disable automatic Power Save mode detection. Device can enter Power
Save mode via the I2C
1: enable automatic Power Save mode detection.
7-6
R/W
Reserved
01
Table 20. Time Delay Register
Bit
3-0
Mode
Symbol
Reset
Description
Notes
Time delay to start the powered accessory identification flow after
detecting the VBUS voltage
R/W
TD
0100
0000: 100 ms
0001: 200 ms
0010: 300 ms
0011: 400 ms
0100: 500 ms
......
1111:1600 ms
7-4
R/W
Reserved
1001
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
31
CTIONAL DEVICE OPERATION
REGISTER MAP
Table 21. Device Mode Register
Bit
Mode
Symbol
Reset
Description
Notes
0
This bit indicates if a chip reset has occurred. This bit will be cleared once
being read.
R/C
RST
1
0: no.
1: Yes.
1
2
Indicate either the device is in Active mode
0: Standby
1: Active
R/W
R/W
ACTIVE
PSAVE
0
0
To indicate either the device is in Power Save mode
0: no
1: yes
7-3
Reserved
00000
34825
Analog Integrated Circuit Device Data
32
Freescale Semiconductor
TYPICAL APPLICATIONS
APPLICATION INFORMATION
TYPICAL APPLICATIONS
APPLICATION INFORMATION
Table 22. ID Resistance Assignment: (Unit: k)
ID RESISTANCE VALUE ASSIGNMENT
The ID resistors used with the 34825 are standard 1%
resistors. Table 22 lists the complete 32 ID resistor
assignment. The ones with the assigned functions filled are
the ones that are already used with special functions. The
ones reserved can be assigned to other functions.
Item#
26
ADC Result
ID Resistance
Assignment
11010
11011
365
442
Reserved
27
Carkit Charger
Type 2
28
29
30
31
11100
11101
11110
11111
523
619
1000
-
Reserved
R/C Accessory 1
R/C Accessory 2
ID float
Table 22. ID Resistance Assignment: (Unit: k)
Item#
ADC Result
ID Resistance
Assignment
0
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
<1.9
2.0
Reserved
1
S0
The remote control architecture is illustrated in Figure 26.
The recommended resistors for the remote control resistor
network are given in Table 23.
2
2.604
3.208
4.014
4.820
6.03
8.03
10.03
12.03
14.46
17.26
20.5
24.07
28.7
34.0
40.2
49.9
64.9
80.6
102
S1
3
S2
4
S3
Table 23. Remote Control Resistor Values (Unit: k)
5
S4
Resistor
Standard Value
ID Resistance
6
S5
R1
2.0
0.604
0.604
0.806
0.806
1.21
2.0
2.0
2.604
3.208
4.014
4.82
7
S6
S7
R2
8
R3
9
S8
R4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
S9
R5
S10
R6
6.03
S11
R7
8.03
S12
R8
2.0
10.03
12.03
14.46
17.26
20.5
UART Test Cable 1
UART Test Cable 2
USB Test Cable 1
USB Test Cable 2
Reserved
Reserved
Reserved
Reserved
Reserved
R9
2.0
R10
R11
R12
R13
R14
2.43
2.8
3.24
3.57
590/976
24.07
614/1000
121
ID
R1
R2
R3
R13
150
…...
200
Carkit Charger
Type 1
S0
HOLD
S1
S2
S12
R14
GND
24
25
11000
11001
255
301
Reserved
Reserved
Figure 26. Remote Control Architecture
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
33
CAL APPLICATIONS
TYPICAL APPLICATIONS
band is 3.4 kHz and the pull-up resistance for the microphone
is 2.0 k, the decoupling capacitance at the VBUS pin should
be less than 22 nF. A 4.7 nF X5R capacitor is recommended
for the typical application. The OUT pin requires a 1.0 F
decoupling capacitor; a 0.01 F capacitance is enough for
the VDDIO pin.
DECOUPLING CAPACITOR
Decoupling capacitors are required at all power supply
input and output pins. For the VDD pin, a X5R capacitor of
1.0 F is recommended. For VBUS pin, because it also acts
as the microphone input, the decoupling capacitance at
VBUS pin must be carefully considered. Assuming the voice
TYPICAL APPLICATIONS
of the cell phone baseband or application processor are
direct drive signals, the audio signals can be connected to the
corresponding pins of 34825 directly. Otherwise these
signals need DC-blocking capacitors to remove the DC level.
INTERFACE CIRCUIT IN A CELL PHONE
When the 34825 is used in a cell phone. The typical circuit
is shown in the Figure 27. The I2C bus need two pull-up
resistors. Typically they are 4.7 kWhen the audio outputs
VDDIO
2x4.7 k
Baseband
VDD
1.0 µF
MC34673
I2C_SDA
Li+
1.0 µF
I2C
I2C_SCL
INT
VDDIO
GPIO
12 k
9.1 k
RxD
ISET
UART
TxD
OUT
D+
VBUS
VBUS
USB Xcvr
D-
4.7 nF
VAIO
2 k
0.1 µF
ID
DP
DM
ID
D+
D-
MIC
*
Audio
SPK_L
*
GND
GND
SHLD
SPK_R
* : For direct-drive audio output, these DC
blocking capacitors are not needed
Figure 27. Interface Circuit in a Cell Phone System
34825
Analog Integrated Circuit Device Data
34
Freescale Semiconductor
TYPICAL APPLICATIONS
PACKAGE DIMENSIONS
PACKAGE DIMENSIONS
For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below.
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
35
CAL APPLICATIONS
PACKAGE DIMENSIONS
34825
Analog Integrated Circuit Device Data
36
Freescale Semiconductor
TYPICAL APPLICATIONS
PACKAGE DIMENSIONS
34825
Analog Integrated Circuit Device Data
Freescale Semiconductor
37
SION HISTORY
REVISION HISTORY
Revision
Date
Description of Changes
•
•
Initial Release
2.0
3.0
4.0
3/2010
6/2014
9/2014
No technical changes. Revised back page. Updated document properties. Added SMARTMOS
sentence to last paragraph.
•
Updated 98A to 98ASA00716D
34825
Analog Integrated Circuit Device Data
38
Freescale Semiconductor
Information in this document is provided solely to enable system and software implementers to use Freescale products.
There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based
on the information in this document.
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Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no
warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does
Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any
and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be
provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance
may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by
customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others.
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SMARTMOS is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their
respective owners.
© 2014 Freescale Semiconductor, Inc.
Document Number: MC34825
Rev 4.0
9/2014
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