MHT2012NT1 [NXP]

Narrow Band High Power Amplifier;
MHT2012NT1
型号: MHT2012NT1
厂家: NXP    NXP
描述:

Narrow Band High Power Amplifier

高功率电源 射频 微波
文件: 总14页 (文件大小:434K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Document Number: MHT2012N  
Rev. 0, 07/2018  
NXP Semiconductors  
Technical Data  
RF LDMOS Integrated Power  
Amplifier  
MHT2012N  
This 12.5 W CW RF power integrated circuit is designed for RF energy  
applications operating in the 2450 MHz ISM band.  
Typical Performance: VDD = 28 Vdc, Pin = 11 dBm, IDQ1 = 15 mA, IDQ2 = 75 mA  
2400–2500 MHz, 12.5 W CW, 28 V  
RF LDMOS INTEGRATED  
POWER AMPLIFIER  
Frequency  
(MHz)  
Signal  
Type  
G
PAE  
(%)  
P
out  
ps  
(dB)  
30.1  
30.0  
29.7  
(W)  
13.0  
12.7  
11.7  
2400  
2450  
2500  
CW  
51.3  
51.4  
50.5  
Features  
PQFN 8 8  
PLASTIC  
High gain simplifies layout and reduced PCB area compared to a  
discrete design  
Qualified up to a maximum of 32 VDD operation  
On--chip input and interstage matching (50 ohm input)  
Integrated quiescent current temperature compensation with  
enable/disable function (1)  
Integrated ESD protection  
150C case and junction temperature rating  
Ideal as a driver for high power RF energy applications  
Typical Applications  
Driver for consumer and commercial cooking applications  
Driver for industrial heating applications, such as sterilization,  
pasteurization, drying, moisture--leveling process, curing and welding  
Driver for medical applications, such as microwave ablation,  
renal denervation and diathermy  
Final stage for portable heating devices and portable medical systems  
V
V
GS2  
GS1  
24 23 22 21 20 19  
18  
17  
16  
15  
14  
13  
N.C.  
N.C.  
1
2
3
4
5
6
N.C.  
N.C.  
Quiescent Current  
Temperature Compensation  
(1)  
RF /V  
RF  
out DS2  
in  
RF /V  
out DS2  
RF  
in  
N.C.  
N.C.  
N.C.  
N.C.  
RF  
RF /V  
out DS2  
7
8 9 10 11 12  
in  
V
DS1  
Note: Exposed backside of the package is  
the source terminal for the transistor.  
Figure 1. Functional Block Diagram  
Figure 2. Pin Connections  
1. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control  
for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.  
2018 NXP B.V.  
Table 1. Maximum Ratings  
Rating  
Symbol  
Value  
–0.5, +65  
–0.5, +10  
32, +0  
Unit  
Vdc  
Vdc  
Vdc  
C  
Drain--Source Voltage  
V
DSS  
Gate--Source Voltage  
V
GS  
DD  
Operating Voltage  
V
Storage Temperature Range  
Case Operating Temperature Range  
T
stg  
–65 to +150  
–40 to +150  
–40 to +150  
20  
T
C
C  
(1,2)  
Operating Junction Temperature Range  
Input Power  
T
J
C  
P
dBm  
in  
Table 2. Thermal Characteristics  
(2,3)  
Characteristic  
Symbol  
Value  
Unit  
Thermal Resistance, Junction to Case  
R
C/W  
JC  
Case Temperature 81C, 12.5 W, 2450 MHz  
Stage 1, 28 Vdc, I  
Stage 2, 28 Vdc, I  
= 12 mA  
= 72 mA  
14  
4.3  
DQ1  
DQ2  
Table 3. ESD Protection Characteristics  
Test Methodology  
Class  
Human Body Model (per JS--001--2017)  
Charge Device Model (per JS--002--2014)  
1B, passes 500 V  
C3, passes 1000 V  
Table 4. Moisture Sensitivity Level  
Test Methodology  
Rating  
Package Peak Temperature  
Unit  
Per JESD22--A113, IPC/JEDEC J--STD--020  
3
260  
C  
Table 5. Electrical Characteristics (T = 25C unless otherwise noted)  
A
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
Stage 1 -- Off Characteristics  
Zero Gate Voltage Drain Leakage Current  
I
I
1
Adc  
nAdc  
nAdc  
DSS  
DSS  
GSS  
(V = 65 Vdc, V = 0 Vdc)  
DS  
GS  
Zero Gate Voltage Drain Leakage Current  
(V = 32 Vdc, V = 0 Vdc)  
500  
200  
DS  
GS  
Gate--Source Leakage Current  
(V = 0.9 Vdc, V = 0 Vdc)  
I
GS  
DS  
Stage 1 -- On Characteristics  
Gate Threshold Voltage  
V
V
0.8  
1.2  
4.9  
1.6  
Vdc  
Vdc  
GS(th)  
(V = 10 Vdc, I = 3 Adc)  
DS  
D
(4)  
Fixture Gate Quiescent Voltage  
(V = 28 Vdc, I = 12 mAdc)  
GG(Q)  
DS  
DQ1  
1. Continuous use at maximum temperature will affect MTTF.  
2. MTTF calculator available at http://www.nxp.com/RF/calculators.  
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.  
4. Data measured in NXP test fixture with 4.7 kresistor in series with V  
and V  
pins.  
GS1  
GS2  
(continued)  
MHT2012N  
RF Device Data  
NXP Semiconductors  
2
Table 5. Electrical Characteristics (T = 25C unless otherwise noted) (continued)  
A
Characteristic  
Stage 2 -- Off Characteristics  
Zero Gate Voltage Drain Leakage Current  
(V = 65 Vdc, V = 0 Vdc)  
Symbol  
Min  
Typ  
Max  
Unit  
I
I
1
Adc  
nAdc  
nAdc  
DSS  
DSS  
GSS  
DS  
GS  
Zero Gate Voltage Drain Leakage Current  
(V = 32 Vdc, V = 0 Vdc)  
500  
200  
DS  
GS  
Gate--Source Leakage Current  
(V = 0.9 Vdc, V = 0 Vdc)  
I
GS  
DS  
Stage 2 -- On Characteristics  
Gate Threshold Voltage  
V
V
0.8  
1.2  
4.8  
1.6  
Vdc  
Vdc  
Vdc  
GS(th)  
GG(Q)  
DS(on)  
(V = 10 Vdc, I = 14 Adc)  
DS  
D
(1)  
Fixture Gate Quiescent Voltage  
(V = 28 Vdc, I = 72 mAdc)  
DS  
DQ2  
Drain--Source On--Voltage  
(V = 10 Vdc, I = 140 mAdc)  
V
0.05  
0.14  
0.20  
GS  
D
Table 6. Typical Performance  
In NXP Reference Circuit, 50 ohm system, V = 28 Vdc, I  
= 15 mA, I  
= 75 mA, 2400–2500 MHz Bandwidth  
DQ2  
DD  
DQ1  
Power Gain  
G
29.7  
50.5  
11.7  
14  
dB  
%
ps  
Power Added Efficiency  
PAE  
P1dB  
P3dB  
G  
P
P
@ 1 dB Compression Point, CW  
@ 3 dB Compression Point, CW  
W
out  
out  
W
Gain Variation over Temperature  
0.036  
dB/C  
(–30C to +85C)  
Output Power Variation over Temperature  
P1dB  
0.004  
dB/C  
(–30C to +85C)  
Table 7. Load Mismatch/Ruggedness  
In NXP Reference Circuit, 50 ohm system, I  
= 12 mA, I  
= 72 mA  
DQ2  
DQ1  
Frequency  
(MHz)  
P
in  
(dBm)  
Signal Type  
VSWR  
Test Voltage, V  
Result  
DD  
2450  
CW  
10:1 at all  
14  
32  
No Device Degradation  
Phase Angles  
(3 dB Overdrive)  
Table 8. Ordering Information  
Device  
Tape and Reel Information  
T1 Suffix = 1000 Units, 16 mm Tape Width, 13--inch Reel  
Package  
MHT2012NT1  
PQFN 8 8  
1. Data measured in NXP test fixture with 4.7 kresistor in series with V  
and V  
pins.  
GS2  
GS1  
MHT2012N  
RF Device Data  
NXP Semiconductors  
3
TYPICAL CHARACTERISTICS  
9
8
7
6
5
10  
10  
10  
10  
10  
V
= 28 Vdc  
DD  
I = 615 mA  
D
768 mA  
921 mA  
90  
100  
110  
120  
130  
140  
150  
160  
T , JUNCTION TEMPERATURE (C)  
J
Note: MTTF value represents the total cumulative operating time  
under indicated test conditions.  
MTTF calculator available at http://www.nxp.com/RF/calculators.  
Figure 3. MTTF versus Junction Temperature – CW  
MHT2012N  
RF Device Data  
NXP Semiconductors  
4
Table 9. Load Pull Performance — Maximum Power Tuning  
V
= 28 Vdc, I  
= 12 mA, I = 73 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle  
DD  
DQ1  
DQ2  
Max Output Power  
P1dB  
(1)  
Z
PAE  
(%)  
f
Z
Z
in  
()  
load  
()  
D
source  
()  
(%)  
49.8  
51.9  
52.6  
Gain (dB)  
30.0  
(dBm)  
42.2  
(W)  
17  
(MHz)  
2400  
2450  
2500  
40.9 + j23.6  
38.1 + j30.8  
32.9 + j30.7  
48.3 – j23.1  
7.22 – j4.32  
7.06 – j3.92  
6.76 – j3.83  
49.7  
51.8  
52.5  
47.3 – j30.9  
40.4 – j32.8  
29.9  
42.3  
17  
30.0  
42.4  
18  
Max Output Power  
P3dB  
(2)  
Z
()  
PAE  
(%)  
f
Z
Z
()  
load  
D
source  
()  
in  
(%)  
49.4  
50.8  
51.2  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
2400  
2450  
2500  
40.9 + j23.6  
42.8 – j26.8  
7.50 – j4.46  
7.20 – j4.35  
7.05 – j4.26  
27.9  
42.8  
19  
49.3  
50.7  
51.1  
38.1 + j30.8  
32.9 + j30.7  
40.4 – j32.0  
33.9 – j32.4  
27.8  
27.9  
43.0  
43.0  
20  
20  
(1) Load impedance for optimum P1dB power.  
(2) Load impedance for optimum P3dB power.  
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.  
= Impedance as measured from gate contact to ground.  
= Measured impedance presented to the output of the device at the package reference plane.  
source  
in  
load  
Note: Measurement made on a per side basis.  
Table 10. Load Pull Performance — Maximum Efficiency Tuning  
V
= 28 Vdc, I  
= 12 mA, I = 73 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle  
DD  
DQ1  
DQ2  
Max Efficiency  
P1dB  
(1)  
Z
PAE  
(%)  
f
Z
Z
in  
()  
load  
()  
D
source  
()  
(%)  
56.2  
56.8  
59.5  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
2400  
2450  
2500  
40.9 + j23.6  
38.1 + j30.8  
32.9 + j30.7  
58.6 – j22.8  
4.19 – j1.25  
4.01 – j1.06  
3.63 – j1.34  
30.5  
40.9  
12  
56.1  
56.7  
59.4  
56.8 – j34.4  
48.5 – j37.7  
30.2  
30.4  
41.0  
41.1  
13  
13  
Max Efficiency  
P3dB  
(2)  
Z
()  
PAE  
(%)  
f
Z
Z
()  
load  
D
source  
()  
in  
(%)  
54.3  
55.2  
57.0  
Gain (dB)  
(dBm)  
(W)  
(MHz)  
2400  
2450  
2500  
40.9 + j23.6  
51.9 – j26.8  
4.28 – j1.45  
4.19 – j1.50  
3.94 – j1.74  
28.5  
41.6  
15  
54.2  
55.1  
56.9  
38.1 + j30.8  
32.9 + j30.7  
48.5 – j35.0  
40.4 – j36.5  
28.2  
28.4  
41.9  
42.0  
15  
16  
(1) Load impedance for optimum P1dB efficiency.  
(2) Load impedance for optimum P3dB efficiency.  
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.  
= Impedance as measured from gate contact to ground.  
= Measured impedance presented to the output of the device at the package reference plane.  
source  
in  
load  
Note: Measurement made on a per side basis.  
Input Load Pull  
Tuner and Test  
Circuit  
Output Load Pull  
Tuner and Test  
Circuit  
Device  
Under  
Test  
Z
Z
in  
Z
load  
source  
MHT2012N  
RF Device Data  
NXP Semiconductors  
5
P3dB – TYPICAL LOAD PULL CONTOURS — 2450 MHz  
2
0
2
41  
41.5  
40.5  
E
42  
40  
39  
0
–2  
–4  
–6  
–8  
52  
54  
50  
42.5  
E
48  
–2  
–4  
–6  
–8  
46  
P
P
44  
42.5  
42  
10  
40  
41  
42  
41.5  
40  
2
4
6
8
10  
12  
14  
2
4
6
8
12  
14  
REAL ()  
REAL ()  
Figure 4. P3dB Load Pull Output Power Contours (dBm)  
Figure 5. P3dB Load Pull Efficiency Contours (%)  
2
27.5  
27  
0
E
–2  
28  
–4  
–6  
P
27.5  
27  
25  
26.5  
26  
4
–8  
2
6
8
10  
12  
14  
REAL ()  
Figure 6. P3dB Load Pull Gain Contours (dB)  
NOTE:  
P
E
= Maximum Output Power  
= Maximum Drain Efficiency  
Gain  
Drain Efficiency  
Linearity  
Output Power  
MHT2012N  
RF Device Data  
NXP Semiconductors  
6
2400–2500 MHz REFERENCE CIRCUIT — 2  3(5.1 cm 7.6 cm)  
C9  
C8  
V
G
V
D
C1  
C2  
C15  
R1  
C10  
C13  
C18  
C17  
MHT2012N  
Rev. 1  
C7  
Q1  
C3  
C6  
C4  
C5  
R2  
C14  
C19  
C16  
C11  
V
G
V
D
D103883  
C12  
aaa--030920  
Figure 7. MHT2012N Reference Circuit Component Layout — 2400–2500 MHz  
Table 11. MHT2012N Reference Circuit Component Designations and Values — 2400–2500 MHz  
Part  
Description  
Part Number  
GRM32ER61H106KA12L  
GRM32NR72A104KA01B  
ATC600F0R5BT250XT  
ATC600F1R6BT250XT  
ATC600F4R7BT250XT  
227CKS050M  
Manufacturer  
Murata  
C1, C4, C9, C12  
10 F Chip Capacitor  
C2, C5, C8, C11  
0.1 F Chip Capacitor  
Murata  
ATC  
C3  
0.5 pF Chip Capacitor  
C6  
1.6 pF Chip Capacitor  
ATC  
C7  
4.7 pF Chip Capacitor  
ATC  
C10  
220 F, 50 V Electrolytic Capacitor  
Illinois Capacitor  
ATC  
C13, C14, C15, C16, C17, C18, C19 5.6 pF Chip Capacitor  
ATC600F5R6BT250XT  
MHT2012N  
Q1  
RF Power LDMOS Transistor  
4.7 k, 1/4 W Chip Resistor  
Rogers RT6035HTC, 0.030, = 3.5  
NXP  
R1, R2  
PCB  
CRCW12064K70FKEA  
D103883  
Vishay  
MTL  
r
MHT2012N  
RF Device Data  
NXP Semiconductors  
7
TYPICAL CHARACTERISTICS — 2400–2500 MHz REFERENCE CIRCUIT  
30  
60  
55  
50  
45  
16  
15  
14  
13  
V
= 28 Vdc, P = 13 dBm, I  
= 15 mA, I  
= 75 mA  
DQ2  
DD  
in  
DQ1  
29.5  
29  
PAE  
G
ps  
28.5  
28  
27.5  
27  
P
out  
26.5  
2400  
2425  
2450  
f, FREQUENCY (MHz)  
2475  
2500  
Figure 8. Power Gain, Power Added Efficiency and CW Output Power  
versus Frequency at a Constant Input Power  
65  
50  
35  
20  
5
42  
39  
36  
33  
30  
V
= 28 Vdc, I  
= 15 mA, I  
= 75 mA  
DD  
DQ1  
DQ2  
PAE  
2500 MHz  
2450 MHz  
2400 MHz  
2450 MHz  
G
ps  
2400 MHz  
2500 MHz  
100  
75  
50  
25  
0
27  
24  
2500 MHz  
2450 MHz  
21  
18  
15  
2400 MHz  
P
in  
0
4
8
12  
16  
20  
P
, OUTPUT POWER (WATTS)  
out  
Figure 9. Power Gain, Power Added Efficiency and  
Input Power versus CW Output Power and Frequency  
MHT2012N  
RF Device Data  
NXP Semiconductors  
8
8.00  
1.45  
0.50  
0.80 5.90  
8.80  
4.9 4.9 solder pad with  
thermal via structure.  
All dimensions in mm.  
Figure 10. PCB Pad Layout for 24--Lead PQFN 8 8  
MHT2012N  
AWLYWZ  
Figure 11. Product Marking  
MHT2012N  
RF Device Data  
NXP Semiconductors  
9
PACKAGE DIMENSIONS  
MHT2012N  
RF Device Data  
NXP Semiconductors  
10  
MHT2012N  
RF Device Data  
NXP Semiconductors  
11  
MHT2012N  
RF Device Data  
NXP Semiconductors  
12  
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS  
Refer to the resources to aid your design process.  
Application Notes  
AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages  
AN1955: Thermal Measurement Methodology of RF Power Amplifiers  
Engineering Bulletins  
EB212: Using Data Sheet Impedances for RF LDMOS Devices  
Software  
Electromigration MTTF Calculator  
RF High Power Model  
Development Tools  
Printed Circuit Boards  
To Download Resources Specific to a Given Part Number:  
1. Go to http://www.nxp.com/RF  
2. Search by part number  
3. Click part number link  
4. Choose the desired resource from the drop down menu  
REVISION HISTORY  
The following table summarizes revisions to this document.  
Revision  
Date  
Description  
0
July 2018  
Initial release of data sheet  
MHT2012N  
RF Device Data  
NXP Semiconductors  
13  
Information in this document is provided solely to enable system and software  
implementers to use NXP products. There are no express or implied copyright licenses  
granted hereunder to design or fabricate any integrated circuits based on the information  
in this document. NXP reserves the right to make changes without further notice to any  
products herein.  
How to Reach Us:  
Home Page:  
nxp.com  
Web Support:  
nxp.com/support  
NXP makes no warranty, representation, or guarantee regarding the suitability of its  
products for any particular purpose, nor does NXP assume any liability arising out of the  
application or use of any product or circuit, and specifically disclaims any and all liability,  
including without limitation consequential or incidental damages. “Typical” parameters  
that may be provided in NXP data sheets and/or specifications can and do vary in  
different applications, and actual performance may vary over time. All operating  
parameters, including “typicals,” must be validated for each customer application by  
customer’s technical experts. NXP does not convey any license under its patent rights  
nor the rights of others. NXP sells products pursuant to standard terms and conditions of  
sale, which can be found at the following address: nxp.com/SalesTermsandConditions.  
NXP and the NXP logo are trademarks of NXP B.V. All other product or service names  
are the property of their respective owners.  
E 2018 NXP B.V.  
Document Number: MHT2012N  
Rev. 0, 07/2018  

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