N74F125D,602 [NXP]
74F125 - Quad buffers; 3-State SOIC 14-Pin;
| 型号： | N74F125D,602 |
| 厂家： | 
NXP |
| 描述： | 74F125 - Quad buffers; 3-State SOIC 14-Pin 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总12页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74F125
Quad buffers; 3-State
Rev. 3 — 18 January 2013
Product data sheet
1. General description
The 74F125 provides four non-inverting buffer/line drivers with 3-state outputs. The
3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE
causes the outputs to assume a high-impedance OFF-state.
2. Features and benefits
High impedance NPN base inputs for reduced loading
(20 mA in HIGH and LOW states)
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
N74F125N
N74F125D
0 C to +70 C
0 C to +70 C
DIP14
SO14
plastic dual in-line package; 14 leads (300 mil)
SOT27-1
SOT108-1
plastic small outline package; 14 leads; body width
3.9 mm
74F125
NXP Semiconductors
Quad buffers; 3-state
4. Functional diagram
1A
1Y
2Y
3Y
4Y
3
6
2
2
1
1OE
2A
1
5
3
6
1
5
EN1
2OE
3A
4
9
4
9
8
8
3OE
4A
10
12
10
12
13
11
11
4OE
13
mna229
mna228
Fig 1. Logic symbol
Fig 2. IEC logic symbol
5. Pinning information
5.1 Pinning
ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂ
ꢀꢃ
ꢀ
ꢅ
ꢉ
ꢊ
ꢋ
ꢌ
ꢍ
ꢀꢊ
ꢑ
ꢒꢒ
ꢀꢉ ꢊꢁꢂ
ꢀꢅ ꢊꢃ
ꢀꢄ
ꢅꢁꢂ
ꢅꢃ
ꢀꢀ ꢊꢄ
ꢀꢏ ꢉꢁꢂ
ꢐ
ꢎ
ꢉꢃ
ꢉꢄ
ꢅꢄ
ꢆꢇꢈ
ꢀꢀꢀꢁꢂꢂꢃꢄꢅꢆ
Fig 3. Pin configuration DIP14 and SO14 package
74F125
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 18 January 2013
2 of 12
74F125
NXP Semiconductors
Quad buffers; 3-state
5.2 Pin description
Table 2.
Symbol
Pin description
Pin
Description
Unit load
HIGH/LOW
Load value[1]
HIGH/LOW
1OE to 4OE
1A to 4A
1Y to 4Y
GND
1, 4, 10, 13
2, 5, 9, 12
3, 6, 8, 11
7
output enable input (active LOW)
data input
1.0/0.033
20 A/20 A
1.0/0.033
20 A/20 A
data output
750/106.7
15 mA/64 mA
ground (0 V)
-
-
-
-
VCC
14
supply voltage
[1] One FAST Unit Load (UL) is defined as 20 A in HIGH state, 0.6 A in LOW state.
6. Functional description
Table 3.
Control
nOE
Function table[1]
Input
nA
L
Output
nY
L
L
H
H
Z
H
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VCC
VI
Parameter
Conditions
Min
0.5
0.5
0.5
30
-
Max
+7.0
+7.0
VCC
+5
Unit
V
supply voltage
[1]
[1]
input voltage
V
VO
output voltage
output in HIGH-state
VI < 0 V
V
IIK
input clamping current
output current
mA
mA
C
C
IO
output in LOW-state
in free air
128
70
[2]
Tamb
Tstg
ambient temperature
storage temperature
0
65
+150
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 C.
74F125
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 18 January 2013
3 of 12
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NXP Semiconductors
Quad buffers; 3-state
8. Recommended operating conditions
Table 5.
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
4.5
2.0
-
Typ
Max
5.5
-
Unit
V
supply voltage
5.0
VIH
HIGH-level input voltage
LOW-level input voltage
input clamping current
HIGH-level output current
LOW-level output current
ambient temperature
-
-
-
-
-
V
VIL
0.8
-
V
IIK
18
15
-
mA
mA
mA
C
IOH
-
IOL
64
70
Tamb
0
9. Static characteristics
Table 6.
Static characteristics
Symbol Parameter
Conditions
25 C
Min Typ[1] Max
0 C to +70 C Unit
Min
Max
VIK
input clamping voltage
VCC = 4.5 V; IIK = 18 mA
VCC = 4.5 V; VIL = 0.8 V; VIH = 2.0 V
IOH = 3 mA
1.2 0.73
-
1.2
-
V
VOH
HIGH-level output
voltage
VCC = 10 %
-
-
-
-
-
2.4
2.7
-
-
V
V
VCC = 5 %
3.3
IOH = 15 mA
VCC = 10 %
-
-
-
2.0
-
V
VOL
LOW-level output
voltage
VCC = 4.5 V; VIL = 0.8 V; VIH = 2.0 V
IOL = 64 mA
VCC = 10 %
-
-
-
-
-
-
-
-
-
-
-
-
0.55
0.55
V
V
VCC = 5 %
0.42
-
II
input leakage current
VCC = 0 V; VI = 7.0 V
-
-
-
-
-
100 A
IIH
IIL
IOZ
HIGH-level input current VCC = 5.5 V; VI = 2.7 V
LOW-level input current VCC = 5.5 V; VI = 0.5 V
OFF-state output current VCC = 5.5 V
VO = 2.7 V
20
-
A
A
20
-
-
-
-
-
-
-
-
-
-
50
-
A
A
VO = 0.5 V
50
225
[2]
IO
output current
supply current
VCC = 5.5 V
100 mA
ICC
VCC = 5.5 V; VI = GND or VCC
outputs HIGH-state
outputs LOW-state
outputs OFF-state
-
-
-
17
28
25
-
-
-
-
-
-
24
40
35
mA
mA
mA
[1] All typical values are measured at VCC = 5 V.
[2] No more than one output should be tested at a time, and the duration of the test should not exceed one second.
74F125
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 18 January 2013
4 of 12
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Quad buffers; 3-state
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V. Test circuit is shown in Figure 6.
Symbol Parameter
Conditions
25 C; VCC = 5.0 V 0 C to +70 C;
VCC = 5.0 V 0.5 V
Unit
Min
Typ Max
Min
Max
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
LOW to HIGH
propagation delay
nA to nY, see Figure 4
nA to nY; see Figure 4
2.0
4.0
5.5
5.5
6.0
3.5
3.5
6.0
7.5
7.5
8.0
5.0
5.5
2.0
6.5
ns
ns
ns
ns
ns
ns
HIGH to LOW
propagation delay
3.0
3.5
4.0
1.5
1.5
3.0
3.5
4.0
1.5
1.5
8.0
8.5
9.0
6.0
6.0
OFF-state to HIGH nOE to nY; see Figure 5
propagation delay
OFF-state to LOW nOE to nY; see Figure 5
propagation delay
HIGH to OFF-state nOE to nY; see Figure 5
propagation delay
LOW to OFF-state nOE to nY; see Figure 5
propagation delay
11. Waveforms
V
I
V
nA input
M
GND
t
t
PHL
PLH
V
OH
V
nY output
M
V
OL
mna230
VM = 1.5 V
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 4. Propagation delay input (nA) to output (nY)
74F125
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 18 January 2013
5 of 12
74F125
NXP Semiconductors
Quad buffers; 3-state
V
I
nOE input
V
M
V
M
GND
3.5 V
t
t
PZL
PLZ
output
LOW-to-OFF
OFF-to-LOW
V
M
V
+ 0.3 V
OL
V
V
OL
t
t
PZH
PHZ
V
OH
− 0.3 V
OH
output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
001aal294
VM = 1.5 V
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5. Enable and disable times
t
W
V
I
90 %
90 %
negative
pulse
V
EXT
V
V
M
M
V
CC
10 %
10 %
0 V
R
L
V
V
O
t
t
r
I
f
G
DUT
t
t
f
r
V
I
R
T
C
L
R
L
90 %
90 %
positive
pulse
V
M
V
M
mna616
10 %
10 %
0 V
t
W
001aai298
a. Input pulse definition
b. Test circuit
Test data is given in Table 8.
Test circuit definitions:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
EXT = Test voltage for switching times.
V
Fig 6. Load circuitry for switching times
Table 8.
Input
VI
Test data
Load
CL
VEXT
fi
tW
tr, tf
RL
tPHL, tPLH
open
tPZH, tPHZ
tPZL, tPLZ
7.0 V
3.0 V
1 MHz
500 ns
2.5 ns
50 pF
500
open
74F125
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 18 January 2013
6 of 12
74F125
NXP Semiconductors
Quad buffers; 3-state
12. Package outline
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
M
H
14
8
pin 1 index
E
1
7
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
Z
A
A
A
2
(1)
(1)
1
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
w
1
1
E
max.
min.
max.
max.
1.73
1.13
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.1
7.62
0.3
0.254
0.01
2.2
0.068
0.044
0.021
0.015
0.014
0.009
0.77
0.73
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.02
0.13
0.087
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-13
SOT27-1
050G04
MO-001
SC-501-14
Fig 7. Package outline SOT27-1 (DIP14)
74F125
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 18 January 2013
7 of 12
74F125
NXP Semiconductors
Quad buffers; 3-state
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
Fig 8. Package outline SOT108-1 (SO14)
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 18 January 2013
8 of 12
74F125
NXP Semiconductors
Quad buffers; 3-state
13. Abbreviations
Table 9.
Acronym
CMOS
LSTTL
ESD
Abbreviations
Description
Complementary Metal Oxide Semiconductor
Low-power Schottky Transistor-Transistor Logic
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
CDM
Charge-Device Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 10. Revision history
Document ID
74F125 v.3
Release date
20130118
Data sheet status
Change notice
Supersedes
Product data sheet
-
74F125 v.2
Modifications:
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
74F125 v.2
19890328
Product data sheet
-
74F125 v.1
74F125
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 18 January 2013
9 of 12
74F125
NXP Semiconductors
Quad buffers; 3-state
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
15.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
74F125
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Product data sheet
Rev. 3 — 18 January 2013
10 of 12
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NXP Semiconductors
Quad buffers; 3-state
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
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Product data sheet
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Quad buffers; 3-state
17. Contents
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
7
8
9
10
11
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 11
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 18 January 2013
Document identifier: 74F125
相关型号：
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