N74F198D [NXP]
8-bit bidirectional universal shift register; 8位双向通用移位寄存器
| 型号： | N74F198D |
| 厂家： | 
NXP |
| 描述： | 8-bit bidirectional universal shift register |
| 文件： | 总12页 (文件大小：98K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F198
8-bit bidirectional universal shift register
Product specification
IC15 Data Handbook
1987 Oct 02
Philips
Semiconductors
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
FEATURES
PIN CONFIGURATION
• Buffered clock and control inputs
1
2
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
S0
SR
• Shift right, shift left, and parallel load capability
• Asynchronous Master Reset
D
S1
3
D0
Q0
D1
Q1
D2
Q2
D3
Q3
CP
D
SL
4
D7
Q7
D6
Q6
D5
5
DESCRIPTION
The 74F198 Bidirectional Universal Shift Register is designed to
incorporate virtually all of the features a system designer may want
in a shift register. This circuit features parallel inputs and outputs,
shift right and shift left serial inputs, operating mode select inputs,
and direct overriding master reset input. The register has four
distinct modes of operation:
6
7
8
9
Q5
D4
10
11
– Parallel (broadside) load
Q4
– Shift right (in the direction Q0 toward Q7)
– Shift left (in the direction Q7 toward Q0)
– Inhibit clock (do nothing).
GND 12
MR
SF00160
Synchronous parallel loading is accomplished by applying the 8 bits
of data and taking both mode control inputs, S0 and S1, High. The
data is loaded into the associated flip-flop and appears at the
outputs after the positive transition of the clock inputs. During
loading, serial data flow is inhibited.
TYPICAL SUPPLY CURRENT
(TOTAL)
TYPE
TYPICAL f
MAX
74F198
95MHz
73mA
Shift right is accomplished synchronously, with the rising edge of the
clock pulse when S0 is High and S1 is Low. Serial data for this
ORDERING INFORMATION
mode is entered at the right data input (D ). When S0 is Low and
S1 is High, data shifts left synchronously and new data is entered at
COMMERCIAL RANGE
= 5V ±10%,
SR
V
DESCRIPTION
PKG DWG #
SOT222-1
SOT137-1
CC
T
amb
= 0°C to +70°C
the shift-left serial input (D ).
SL
24-pin Plastic Slim
DIP (300mil)
N74F198N
Clocking of the flip-flops is inhibited when both mode control inputs
are Low.
24-pin Plastic SOL
N74F198D
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
Parallel data inputs
74F (U.L.) HIGH/LOW
1.0/1.0
LOAD VALUE HIGH/LOW
20µA/0.6mA
D0–D7
D
Serial data input (Shift Right)
Serial data input (Shift Left)
Mode Select inputs
1.0/1.0
20µA/0.6mA
SR
D
1.0/1.0
20µA/0.6mA
SL
S0–S1
CP
1.0/1.0
20µA/0.6mA
Clock Pulse input (Active rising edge)
Master Reset input (Active Low)
Data outputs
1.0/1.0
20µA/0.6mA
MR
1.0/1.0
20µA/0.6mA
Q0–Q7
50/33
1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
2
October 2, 1987
853–0089 90746
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
LOGIC SYMBOL
IEC/IEEE SYMBOL
SRG8
13
1
R
0
2
3
5
7
9
15 17 19 21 22
0
3
M
23
11
1
C4
1 → /2 ←
D
D0 D1 D2 D3 D4 D5 D6 D7 D
SL
SR
2
3
13
1
MR
1, 4D
3, 4D
3, 4D
4
S0
S1
CP
5
6
8
23
11
7
9
10
14
16
18
15
17
19
21
22
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
3, 4D
2, 4D
20
4
6
8
10 14 16 18 20
SF00161
V
= Pin 24
GND = Pin 12
CC
SF00162
FUNCTION TABLE
INPUTS
OUTPUTS
MODE
SERIAL
PARALLEL
Q0
MR
S0
CP
Q1
…
Q6
Q7
S1
X
X
H
L
LEFT
RIGHT
0…7
L
X
X
H
H
H
L
X
L
↑
↑
↑
↑
↑
X
X
X
X
X
X
H
L
X
X
X
H
L
X
X
L
Q00
0
L
L
L
Q70
7
H
H
H
H
H
H
H
Q10
1
Q60
6
0…7
X
H
Q0n
Q0n
Q2n
Q2n
Q10
Q5n
Q5n
Q7n
Q7n
Q60
Q6n
Q6n
H
L
X
L
H
H
L
X
X
X
X
Q1n
Q1n
Q00
L
X
L
L
X
X
Q70
H
L
X
↑
=
=
=
=
=
High voltage level
Low voltage level
Don’t care
Low-to-High transition of designated input
The level of steady input at inputs 0 through 7, respectively.
0…7
Q00, Q10, Q60, Q70
Q0n, Q1n, Q6n, Q7n
=
=
The level of Q0, Q1, Q6, Q7, respectively, before the indicated steady state input conditions were established.
The level of Q0, Q1, Q6, Q7, respectively, before the most recent Low-to-High clock transition.
3
October 2, 1987
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
LOGIC DIAGRAM
11
CP
2
D
SR
23
S1
1
3
S0
D0
R
R
R
R
R
R
R
R
CP
Q
S
S
S
S
S
S
S
S
4
Q0
CP
Q
5
D1
D2
D3
D4
D5
D6
D7
6
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
Q
7
8
CP
Q
9
10
14
16
18
20
CP
Q
15
17
19
CP
Q
CP
Q
CP
Q
21
22
D
SL
13
MR
SF00163
4
October 2, 1987
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
TYPCIAL TIMING DIAGRAM
CP
S0
S1
MR
SERIAL
DATA
INPUTS
BIT A
L
L
L
H
H
H
H
H
H
L
H
L
PARALLEL
DATA
INPUTS
H
L
H
H
OUTPUTS
L
L
L
BIT A
H
H
H
H
H
CLEAR
SHIFT RIGHT
SHIFT LEFT
INHIBIT
CLEAR
LOAD
SF00165
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V
V
Supply voltage
Input voltage
Input current
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
CC
IN
V
V
I
mA
V
IN
V
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
–0.5 to V
40
OUT
OUT
CC
I
mA
°C
°C
T
amb
0 to +70
T
stg
–65 to +150
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
NOM
MAX
V
Supply voltage
5.0
5.5
V
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
2.0
0.8
–18
–1
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
OH
OL
20
T
amb
Operating free-air temperature range
0
+70
5
October 2, 1987
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
1
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
MAX
2
MIN
2.5
TYP
V
V
V
V
V
V
V
V
V
= MIN, V = MAX ±10%V
CC
IL
CC
V
OH
High-level output voltage
V
= MIN, I = MAX
±5%V
2.7
3.4
0.35
0.35
–0.73
IH
OH
CC
= MIN, V = MAX ±10%V
0.50
V
0.50
CC
IL
CC
CC
V
V
Low-level output voltage
OL
= MIN, I = MAX
±5%V
IH
OL
Input clamp voltage
= MIN, I = I
IK
–1.2
100
20
V
IK
CC
CC
CC
CC
CC
I
I
I
I
I
Input current at maximum input voltage
High-level input current
= MAX, V = 7.0V
µA
I
I
= MAX, V = 2.7V
µA
IH
IL
I
Low-level input current
= MAX, V = 0.5V
–0.6
–150
100
110
mA
mA
mA
mA
I
3
Short-circuit output current
= MAX
–60
OS
I
I
70
75
CCH
I
Supply current (total)
V
CC
= MAX
CC
CCL
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
6
October 2, 1987
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
AC ELECTRICAL CHARACTERISTICS
LIMITS
V
= +5.0V
= +25°C
V
= +5.0V ± 10%
= 0°C to +70°C
CC
CC
TEST
CONDITION
SYMBOL
PARAMETER
T
amb
T
amb
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
f
Maximum clock frequency
Waveform 1
Waveform 1
Waveform 3
80
95
70
MHz
ns
MAX
t
t
Propagation delay
CP to Qn
5.0
6.0
7.5
8.5
10.0
11.0
4.5
5.5
11.0
12.0
PLH
PHL
t
Propagation delay
5.0
7.5
10.0
4.5
11.0
ns
PHL
AC SETUP REQUIREMENTS
LIMITS
V
= +5.0V
= +25°C
V
T
= +5.0V ± 10%
= 0°C to +70°C
amb
CC
CC
TEST
CONDITION
SYMBOL
PARAMETER
T
amb
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
t (H)
t ((L)
S
Setup time, High or Low
Dn to CP
0.0
3.0
0.0
3.0
S
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 1
ns
ns
ns
ns
ns
ns
ns
t (H)
Hold time, High or Low
Dn to CP
0.0
3.5
1.0
4.0
h
t (L)
h
t (H)
Setup time, High or Low
0.0
3.0
0.0
3.0
S
t (L)
S
D
, D to CP
SR SL
t (H)
Hold time, High or Low
D , D to CP
SR
0.0
2.5
0.0
3.0
h
t (L)
h
SL
t (H)
Setup time, High or Low
Sn to CP
9.0
6.0
10.0
7.0
S
t (L)
S
t (H)
Hold time, High or Low
Sn to CP
0.0
0.0
0.0
0.0
h
t (L)
h
t (H)
CP Pulse width,
High or Low
5.0
5.0
6.0
6.0
w
t (L)
w
t (L)
MR Pulse width, Low
Waveform 3
Waveform 3
5.0
5.0
5.0
6.0
ns
ns
w
t
Recovery time MR to CP
REC
7
October 2, 1987
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
The shaded areas indicate when the input is permitted to change for predictable output performance.
Dn, Sn
1/f
MAX
V
V
V
V
M
M
M
M
t
(L)
w
D
, D
SL
SR
CP
Qn
t (H)
h
t (L)
h
V
V
M
t
M
t
t (H)
t (L)
s
s
(H)
w
PLH
t
CP
PHL
V
V
M
M
V
V
M
M
SF00164
SF00166
Waveform 1. Propagation ’Delay, Clock Input to Output,
Clock Widths, and Maximum Clock Frequency
Waveform 2. Setup Time and Hold Time
MR
CP
V
V
M
M
t
w
(L)
t
REC
V
M
t
PHL
Qn
V
M
SF00158
Waveform 3. Master Reset Pulse Width, Master Reset to
Output Delay and Master Reset to Clock Recovery Time
TEST CIRCUIT AND WAVEFORMS
t
AMP (V)
0V
V
w
CC
90%
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
family
V
rep. rate
t
w
t
t
THL
amplitude
M
TLH
Termination resistance should be equal to Z
pulse generators.
of
OUT
2.5ns 2.5ns
74F
3.0V
1.5V
1MHz
500ns
SF00006
8
October 2, 1987
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
9
1987 Oct 02
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
10
1987 Oct 02
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
NOTES
11
1987 Oct 02
Philips Semiconductors
Product specification
8-bit bidirectional universal shift register
74F198
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05097
Document order number:
Philips
Semiconductors
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