N74F244BD [NXP]

Octal buffers 3-State; 八路缓冲器三态
N74F244BD
型号: N74F244BD
厂家: NXP    NXP
描述:

Octal buffers 3-State
八路缓冲器三态

总线驱动器 总线收发器 逻辑集成电路 光电二极管 输出元件
文件: 总12页 (文件大小:97K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74F244/74F244B  
Octal buffers (3-State)  
Product specification  
IC15 Data Handbook  
1994 Dec 05  
Philip s Se m ic ond uc tors  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
FEATURES  
Octal bus interface  
DESCRIPTION  
The 74F244 is an octal buffer that is ideal for driving bus lines of  
buffer memory address registers. The outputs are all capable of  
sinking 64mA and sourcing up to 15mA, producing very good  
capacitive drive characteristics. The device features two output  
enables, OEa and OEb, each controlling four of the 3-State outputs.  
3-State output buffer sink 64mA  
15mA source current  
Guaranteed output skew less than 2.0ns (74F244B)  
Reduced ground bounce (74F244B)  
The 74F244B is functionally equivalent to the 74F244. It has been  
designed to reduce effects of ground noise. Other advantages are  
noted in the features.  
Reduced I (74F244B)  
CC  
Reduced loading (74F244B I = 40µA)  
IL  
TYPICAL  
PROPAGATION  
DELAY  
TYPICAL SUPPLY  
CURRENT (TOTAL)  
TYPE  
Split lead frame offers increased noise immunity (74F244B)  
Industrial temperature range available (-40°C to +85°C) for  
74F244  
4.0ns  
4.0ns  
53mA  
33mA  
74F244  
74F244B  
74F244 available in SSOP Type II package  
ORDERING INFORMATION  
ORDER CODE  
COMMERCIAL RANGE  
DESCRIPTION  
INDUSTRIAL RANGE  
= 5V ±10%,  
PKG DWG #  
V
CC  
= 5V ±10%,  
V
CC  
T
amb  
= 0°C to +70°C  
T
amb  
= -40°C to +85°C  
20-pin plastic DIP  
20-pin plastic SOL  
20-pin plastic SSOP II  
N74F244N, N74F244BN  
N74F244D, N74F244BD  
N74F244DB  
I74F244N  
SOT146-1  
SOT163-1  
SOT339-1  
I74F244D  
INPUT AND OUTPUT LOADING AND FAN OUT TABLE  
74F (U.L.)  
HIGH/LOW  
LOAD VALUE  
HIGH/LOW  
PINS  
DESCRIPTION  
Ian, Ibn  
Data inputs (74F244)  
Data inputs (74F244B)  
1.0/2.67  
20µA/1.6mA  
20µA/40µA  
20µA/1.0mA  
20µA/40µA  
15mA/64mA  
1.0/0.067  
1.0/1.67  
OEa, OEb  
Yan, Ybn  
Output enable inputs (active low) (74F244)  
Output enable inputs (active low) (74F244B)  
Data outputs  
1.0/0.067  
750/106.7  
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.  
PIN CONFIGURATION  
LOGIC SYMBOL  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OEa  
Ia0  
V
CC  
2
4
6
8
17 15 13 11  
OEb  
Ya0  
Yb0  
Ia1  
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3  
Ib0  
Yb1  
Ia2  
Ya1  
1
OEa  
OEb  
19  
Ib1  
Yb2  
Ia3  
Ya2  
Ib2  
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3  
Yb3  
Ya3  
Ib3  
18  
16 14 12  
3
5
7
9
GND 10  
V
= Pin 20  
GND = Pin 10  
CC  
SF00228  
SF00227  
2
1994 Dec 5  
853-0357 14381  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
IEC/IEEE SYMBOL  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
1
EN1  
EN2  
OEa  
Ia  
L
OEb  
L
Ib  
L
Ya  
L
Yb  
L
19  
L
2
4
18  
2D  
1
L
H
H
X
L
H
X
H
Z
H
Z
16  
14  
H
6
NOTES:  
H = High voltage level  
12  
3
8
17  
2
L
X
Z
=
=
=
Low voltage level  
Don’t care  
High impedance ”off” state  
5
15  
13  
11  
7
9
SF00229  
LOGIC DIAGRAM  
17  
15  
3
5
2
18  
16  
Ib0  
Yb0  
Yb1  
Yb2  
Yb3  
Ia0  
Ya0  
Ya1  
Ya2  
Ya3  
4
Ib1  
Ia1  
13  
7
9
6
14  
12  
Ib2  
Ia2  
11  
19  
8
Ib3  
Ia3  
1
OEb  
OEa  
V
= Pin 20  
CC  
GND = Pin 10  
SF00230  
3
1994 Dec 5  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
ABSOLUTE MAXIMUM RATINGS  
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the  
operating free air temperature range.)  
SYMBOL  
PARAMETER  
RATING  
-0.5 to +7.0  
-0.5 to +7.0  
-30 to +5  
UNIT  
V
V
CC  
V
IN  
Supply voltage  
Input voltage  
Input current  
V
I
IN  
mA  
V
I
Voltage applied to output in high output state  
Current applied to output in low output state  
-0.5 to V  
V
OUT  
CC  
128  
mA  
°C  
OUT  
Commercial range  
0 to +70  
T
Operating free air temperature range  
Storage temperature range  
amb  
Industrial range  
(74F244 only)  
-40 to +85  
°C  
°C  
T
stg  
-65 to +150  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
NOM  
5.0  
SYMBOL  
PARAMETER  
UNIT  
MIN  
4.5  
MAX  
V
CC  
V
IN  
V
IL  
Supply voltage  
5.5  
V
V
High-level input voltage  
Low-level input voltage  
Input clamp current  
2.0  
0.8  
–18  
–15  
64  
V
I
I
mA  
mA  
mA  
IK  
High-level output current  
Low-level output current  
OH  
ol  
i
Commercial range  
0
+70  
°C  
°C  
T
amb  
Operating free air temperature range  
Industrial range  
(74F244 only)  
–40  
+85  
4
1994 Dec 5  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
DC ELECTRICAL CHARACTERISTICS  
(Over recommended operating free-air temperature range unless otherwise noted.)  
LIMITS  
TEST  
CONDITIONS  
SYMBOL  
PARAMETER  
UNIT  
1
2
MIN  
TYP  
MAX  
±10%V  
±5%V  
V
V
V
= MIN,  
I
= -3mA  
2.5  
V
V
V
V
CC  
CC  
OH  
V
High-level output voltage  
= MAX,  
= MIN  
2.7  
2.0  
2.0  
3.4  
OH  
CC  
IL  
±10%V  
I
= -15mA  
= MAX  
CC  
CC  
IH  
OH  
±5%V  
V
V
= MIN,  
= MAX,  
CC  
IL  
V
V
Low-level output voltage  
I
±10%V  
0.55  
V
OL  
OL  
CC  
V
V
V
V
= MIN,  
±5%V  
0.42  
0.55  
-1.2  
100  
20  
V
IH  
CC  
Input clamp voltage  
= MIN, I = I  
IK  
-0.73  
V
IK  
CC  
CC  
CC  
I
I
I
Input current at maximum input voltage  
High-level input current  
= MAX, V = 7.0V  
µA  
µA  
mA  
mA  
µA  
I
I
IH  
= MAX, V = 2.7V  
I
74F244 OEa, OEb  
-1.0  
-1.6  
-40  
I
I
Low-level input current  
74F244 Ian, Ibn  
V
= MAX, V = 0.5V  
I
IL  
CC  
CC  
74F244B all inputs  
Off-state output current,  
high-level voltage applied  
µA  
µA  
V
= MAX, V = 2.7V  
50  
OZH  
O
Off-state output current,  
low-level voltage applied  
I
I
V
V
= MAX, V = 0.5V  
-50  
OZL  
CC  
O
3
Short-circuit output current  
Supply current (total)  
= MAX  
= MAX  
-100  
-225  
60  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
OS  
CC  
I
40  
60  
60  
20  
50  
29  
CCH  
74F244  
I
V
CC  
90  
CCL  
CCZ  
CCH  
I
I
90  
CC  
I
30  
74F244B  
I
V
CC  
= MAX  
70  
CCL  
I
40  
CCZ  
NOTES:  
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.  
2. All typical values are at V = 5V, T  
= 25°C.  
amb  
CC  
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold  
OS  
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting  
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any  
sequence of parameter tests, I tests should be performed last.  
OS  
5
1994 Dec 5  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
AC ELECTRICAL CHARACTERISTICS FOR 74F244  
A PORT LIMITS  
T
= +25°C  
T
= 0°C to +70°C  
T
amb  
= -40°C to +85°C  
= +5.0V ± 10%  
amb  
amb  
V
= +5.0V ± 10%  
V
CC  
SYMBOL  
PARAMETER  
TEST  
V
= +5.0V  
UNIT  
CC  
CC  
CONDITION  
C = 50pF,  
R = 500Ω  
L
C = 50pF,  
R = 500Ω  
L
C = 50pF,  
R = 500Ω  
L
L
L
L
MIN  
TYP  
MAX  
MIN  
MAX  
MIN  
MAX  
t
t
Propagation delay  
Ian, Ibn to Yn  
2.5  
2.5  
4.0  
4.0  
5.2  
5.2  
2.0  
2.0  
6.2  
6.5  
1.5  
2.0  
7.0  
7.0  
PLH  
PHL  
Waveform 1  
ns  
ns  
ns  
t
t
Output enable time  
to high or low  
Waveform 2  
Waveform 4  
2.0  
2.0  
4.3  
5.0  
5.7  
7.0  
2.0  
2.0  
6.7  
8.0  
2.0  
2.0  
8.0  
8.5  
PZH  
PZL  
t
t
Output disable time  
from high or low  
Waveform 2  
Waveform 4  
1.5  
1.5  
2.5  
2.5  
5.5  
5.5  
1.0  
1.0  
6.0  
5.5  
1.0  
1.0  
6.0  
5.5  
PHZ  
PLZ  
AC ELECTRICAL CHARACTERISTICS FOR 74F244B  
LIMITS  
T
= +25°C  
= +5.0V  
T
= 0°C to +70°C  
= +5.0V ± 10%  
amb  
amb  
V
SYMBOL  
PARAMETER  
TEST  
V
UNIT  
CC  
CC  
CONDITION  
C = 50pF, R = 500Ω  
C = 50pF, R = 500Ω  
L L  
L
L
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
Ian, Ibn to Yn  
2.5  
2.5  
4.5  
4.5  
5.7  
6.0  
2.0  
2.5  
6.2  
6.5  
PLH  
PHL  
Waveform 1  
ns  
ns  
t
t
Output enable time  
to high or low level  
Waveform 2  
Waveform 4  
2.0  
3.0  
4.0  
5.5  
6.0  
7.5  
2.0  
3.0  
6.5  
8.0  
PZH  
PZL  
t
t
Output disable time  
from high or low level  
Waveform 2  
Waveform 4  
1.5  
1.5  
2.5  
2.5  
5.5  
5.5  
1.0  
1.0  
6.0  
5.5  
PHZ  
PLZ  
ns  
ns  
1, 2  
t
Output skew  
1.5  
2.0  
sk(0)  
Waveform 3  
NOTES:  
1. |t actual - t actual| for any output compared to any other output where N and M are either LH or HL.  
PN  
PM  
2. Skew times are valid only under same test conditions (temperature, V , loading, etc.,).  
CC  
6
1994 Dec 5  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
AC WAVEFORMS  
For all waveforms, V = 1.5V.  
M
Ian, Ibn  
V
M
V
Yn, Yn  
Yn, Yn  
V
M
t
M
t
(0)  
t
sk  
PLH  
PHL  
Yn  
V
V
M
V
M
M
SF00231  
SF00232  
Waveform 1. Propagation Delay for data to outputs  
Waveform 3. Output skew  
V
V
M
M
t
OEn  
Yn  
OEn  
Yn  
V
V
M
M
t
t
t
PLZ  
PZH  
PHZ  
PZL  
3.5V  
V
–0.3V  
OH  
V
V
M
M
V
+0.3V  
OL  
0V  
SF00233  
SF00234  
Waveform 2. 3-State output enable time to high level  
and output disable time from high level  
Waveform 4. 3-State output enable time to low level  
and output disable time from low level  
TEST CIRCUIT AND WAVEFORMS  
SWITCH POSITION  
t
w
AMP (V)  
0V  
TEST  
SWITCH  
closed  
open  
90%  
90%  
7.0V  
V
CC  
NEGATIVE  
PULSE  
t
, t  
PLZ PZL  
V
V
M
M
All other  
10%  
10%  
R
L
V
V
OUT  
IN  
t
t
)
)
t
t )  
THL ( f  
TLH ( r  
PULSE  
GENERATOR  
D.U.T.  
t
t
t
t )  
TLH ( r  
THL ( f  
R
C
R
L
AMP (V)  
0V  
T
L
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
Test circuit for 3-State outputs  
DEFINITIONS:  
10%  
10%  
t
w
R
=
Load resistor; see AC electrical characteristics for  
value.  
Load capacitance includes jig and probe  
capacitance; see AC electrical characteristics for  
value  
Input pulse definition  
INPUT PULSE REQUIREMENTS  
L
C
=
L
family  
V
M
rep. rate  
t
t
t
THL  
amplitude  
w
TLH  
R
T
=
Termination resistance should be equal to Z  
pulse generators.  
of  
OUT  
74F  
3.0V  
1.5V  
1MHz  
500ns 2.5ns  
2.5ns  
SF000235  
7
1994 Dec 5  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
DIP20: plastic dual in-line package; 20 leads (300 mil)  
SOT146-1  
8
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
9
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm  
SOT339-1  
10  
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
NOTES  
11  
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffers (3-State)  
74F244/74F244B  
DEFINITIONS  
Data Sheet Identification  
Product Status  
Definition  
This data sheet contains the design target or goal specifications for product development. Specifications  
may change in any manner without notice.  
Objective Specification  
Formative or in Design  
Preproduction Product  
Full Production  
9397-750-05103  
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to make changes at any time without notice in order to improve design  
and supply the best possible product.  
Preliminary Specification  
Product Specification  
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes  
at any time without notice, in order to improve design and supply the best possible product.  
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,  
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,  
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes  
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting  
or modification.  
LIFE SUPPORT APPLICATIONS  
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,  
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected  
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips  
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully  
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Philips Semiconductors and Philips Electronics North America Corporation  
register eligible circuits under the Semiconductor Chip Protection Act.  
Copyright Philips Electronics North America Corporation 1996  
All rights reserved. Printed in U.S.A.  
(print code)  
Date of release: October 28, 1991  
9397-750-05103  
Document order number:  

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