N74F251AD [NXP]

8-input multiplexer 3-State; 8输入多路复用器三态
N74F251AD
型号: N74F251AD
厂家: NXP    NXP
描述:

8-input multiplexer 3-State
8输入多路复用器三态

复用器
文件: 总5页 (文件大小:48K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Philips Semiconductors  
Product specification  
8-input multiplexer (3-State)  
74F251A  
FEATURES  
PIN CONFIGURATION  
High speed 8-to-1 multiplexing  
I3  
I2  
I1  
I0  
Y
1
2
3
4
5
16  
V
On chip decoding  
CC  
15 I4  
14 I5  
13 I6  
12 I7  
11 S0  
10 S1  
Multifunction capability  
Inverting and Non-Inverting outputs  
Both outputs are 3-State for further multiplexer expansion  
Y
OE  
6
7
8
DESCRIPTION  
The 74F251A is a logic implementation of a single 8-position switch  
with the switch position controlled by the state of three Select (S0,  
S1, S2) inputs. True (Y) and complementary (Y) outputs are both  
provided. The output enable (OE) is active Low. When OE is High,  
both outputs are in High impedance state, allowing multiple output  
connections to a common bus without driving nor loading the bus  
significantly. All but one device must be in High impedance state to  
avoid high currents that would exceed the maximum ratings when  
the outputs of the 3-State devices are tied together. When the output  
of more than one device is tied together the user must ensure that  
there is no overlap in the active Low portion of the output enable  
voltages.  
GND  
9
S2  
SF00778  
TYPICAL  
PROPAGATION  
DELAY  
TYPICAL  
SUPPLY CURRENT  
(TOTAL)  
TYPE  
74F251A  
4.5ns  
19mA  
ORDERING INFORMATION  
ORDER CODE  
PKG  
DWG #  
COMMERCIAL RANGE  
DESCRIPTION  
V
CC  
= 5V ±10%,  
T
amb  
= 0°C to +70°C  
16-pin plastic DIP  
16-pin plastic SO  
N74F251AN  
N74F251AD  
SOT38-4  
SOT162-1  
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE  
PINS  
I0–I7  
S0–S2  
OE  
DESCRIPTION  
74F (U.L.) HIGH/LOW  
1.0/1.0  
LOAD VALUE HIGH/LOW  
Data inputs  
20µA/0.6mA  
20µA/0.6mA  
20µA/0.6mA  
3mA/24mA  
Select inputs  
1.0/1.0  
Output Enable input (active Low)  
Data outputs  
1.0/1.0  
Y, Y  
150/40  
NOTE:  
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.  
LOGIC SYMBOL  
IEC/IEEE SYMBOL  
4
3
2
1
15 14 13 12  
MUX  
7
EN  
0
11  
10  
9
0
7
G
5
6
I0  
I1  
I2  
I3  
I4  
I5  
I6  
I7  
2
4
11  
10  
S0  
3
S1  
S2  
OE  
2
9
7
1
Y
5
Y
15  
14  
13  
12  
V
= Pin 16  
GND = Pin 8  
CC  
6
SF00779  
SF00780  
1
1996 Jan 05  
853–0358 16191  
Philips Semiconductors  
Product specification  
8-input multiplexer (3-State)  
74F251A  
LOGIC DIAGRAM  
I0  
I1  
I2  
I3  
I4  
I5  
14  
I6  
I7  
12  
4
3
2
1
15  
13  
11  
S0  
10  
S1  
9
S2  
7
OE  
5
6
V
= Pin 16  
Y
Y
CC  
GND = Pin 8  
SF00781  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
S2  
X
L
S1  
X
L
S0  
X
L
OE  
H
L
Y
Y
Z
Z
I0  
I1  
I2  
I3  
I4  
I5  
I6  
I7  
I0  
I1  
I2  
I3  
I4  
I5  
I6  
I7  
L
L
H
L
L
L
H
H
L
L
L
H
L
L
H
H
H
L
L
H
L
L
H
H
L
H
H
L
NOTES:  
H = High voltage level  
L
X
Z
=
=
=
Low voltage level  
Don’t care  
High impedance “off” state  
2
1996 Jan 05  
Philips Semiconductors  
Product specification  
8-input multiplexer (3-State)  
74F251A  
ABSOLUTE MAXIMUM RATINGS  
(Operation beyond the limit set forth in this table may impair the useful life of the device.  
Unless otherwise noted these limits are over the operating free air temperature range.)  
SYMBOL  
PARAMETER  
RATING  
–0.5 to +7.0  
–0.5 to +7.0  
–30 to +5  
UNIT  
V
V
Supply voltage  
Input voltage  
Input current  
CC  
IN  
V
V
I
mA  
V
IN  
V
OUT  
OUT  
Voltage applied to output in High output state  
Current applied to output in Low output state  
Operating free-air temperature range  
Storage temperature  
–0.5 to V  
CC  
I
48  
mA  
°C  
°C  
T
amb  
0 to +70  
T
stg  
–65 to +150  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
UNIT  
MIN  
4.5  
NOM  
MAX  
V
Supply voltage  
5.0  
5.5  
V
V
CC  
IH  
IL  
V
V
High-level input voltage  
Low-level input voltage  
Input clamp current  
2.0  
0.8  
–18  
–3  
V
I
I
I
mA  
mA  
mA  
°C  
IK  
High-level output current  
Low-level output current  
OH  
OL  
24  
T
amb  
Operating free-air temperature range  
0
70  
DC ELECTRICAL CHARACTERISTICS  
(Over recommended operating free-air temperature range unless otherwise noted.)  
LIMITS  
1
SYMBOL  
PARAMETER  
TEST CONDITIONS  
UNIT  
2
MIN  
2.4  
TYP  
MAX  
V
V
V
V
V
±10%V  
±5%V  
CC  
V
V
= MIN, V = MAX,  
CC  
IH  
IL  
V
OH  
High-level output voltage  
= MIN, I = MAX  
OH  
2.7  
3.3  
CC  
0.35  
0.35  
0.50  
0.50  
–1.2  
±10%V  
CC  
CC  
V
V
= MIN, V = MAX,  
IL  
= MIN, I = MAX  
CC  
IH  
V
V
Low-level output voltage  
Input clamp voltage  
OL  
OL  
±5%V  
V
CC  
V
CC  
= MIN, I = I  
IK  
–0.73  
IK  
I
Input current at maximum input  
voltage  
I
I
= MAX, V = 7.0V  
100  
µA  
I
I
I
High-level input current  
Low-level input current  
V
V
= MAX, V = 2.7V  
20  
µA  
IH  
CC  
I
= MAX, V = 0.5V  
–0.6  
mA  
IL  
CC  
I
Off-state output current  
High-level voltage applied  
I
V
CC  
= MAX, V = 2.7V  
50  
µA  
OZH  
I
Off-state output current  
Low-level voltage applied  
I
I
V
V
= MAX, V = 0.5V  
–50  
mA  
OZL  
CC  
I
3
Short-circuit output current  
= MAX  
–60  
–150  
27  
mA  
mA  
mA  
mA  
OS  
CC  
I
I
I
20  
17  
21  
CCH  
CCL  
CCZ  
24  
I
Supply current (total)  
V
CC  
= MAX  
CC  
29  
NOTES:  
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.  
2. All typical values are at V = 5V, T = 25°C.  
CC  
amb  
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold  
OS  
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting  
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any  
sequence of parameter tests, I tests should be performed last.  
OS  
3
1996 Jan 05  
Philips Semiconductors  
Product specification  
8-input multiplexer (3-State)  
74F251A  
AC ELECTRICAL CHARACTERISTICS  
LIMITS  
V
amb  
= +5V  
= +25°C  
V
amb  
= +5V ± 10%  
= 0°C to +70°C  
CC  
CC  
TEST  
T
T
SYMBOL  
PARAMETER  
UNIT  
CONDITION  
C = 50pF  
L
C = 50pF  
L
R = 500Ω  
L
R = 500Ω  
L
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
In to Y  
3.0  
3.0  
5.0  
5.0  
7.0  
7.0  
2.5  
3.0  
8.0  
8.0  
PLH  
PHL  
Waveform 2  
Waveform 1  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
t
t
Propagation delay  
In to Y  
2.5  
1.0  
4.5  
2.5  
7.0  
5.0  
2.0  
1.0  
7.5  
5.0  
PLH  
PHL  
t
t
Propagation delay  
Sn to Y  
Waveform 1  
Waveform 2  
4.5  
4.0  
6.5  
5.5  
10.0  
9.0  
4.0  
3.5  
11.5  
9.5  
PLH  
PHL  
t
t
Propagation delay  
Sn to Y  
Waveform 1  
Waveform 2  
3.5  
2.5  
6.0  
4.5  
9.0  
7.0  
3.5  
2.5  
9.5  
7.5  
PLH  
PHL  
t
t
Output Enable time OE  
to Y  
Waveform 3  
Waveform 4  
3.5  
3.5  
5.5  
5.0  
7.5  
7.5  
3.0  
3.0  
8.5  
8.0  
PZH  
PZL  
t
t
Output Disable time  
OE to Y  
Waveform 3  
Waveform 4  
2.5  
1.0  
4.0  
4.0  
6.5  
6.0  
2.0  
1.0  
7.0  
6.5  
PHZ  
PLZ  
t
t
Output Enable time  
OE to Y  
Waveform 3  
Waveform 4  
2.5  
2.5  
4.0  
4.0  
6.5  
6.5  
2.0  
2.5  
7.0  
7.0  
PZH  
PZL  
t
t
Output Disable time  
OE to Y  
Waveform 3  
Waveform 4  
3.5  
1.0  
5.0  
2.0  
7.5  
4.5  
3.0  
1.0  
8.0  
4.5  
PHZ  
PLZ  
AC WAVEFORMS  
For all waveforms, V = 1.5V  
M
V
IN  
V
V
IN  
V
M
V
M
M
V
M
t
t
PHL  
PLH  
t
t
PLH  
PHL  
V
V
M
M
V
V
V
M
OUT  
M
V
OUT  
SF00782  
SF00092  
Waveform 1. For Inverting Outputs  
Waveform 2. For Non-Inverting Outputs  
V
V
V
V
M
OE  
OE  
M
M
M
t
t
t
t
PLZ  
PZH  
PHZ  
PZL  
V
–0.3V  
0V  
OH  
V
M
Y, Y  
Y, Y  
V
M
V
+0.3V  
OL  
SF00784  
SF00785  
Waveform 3. 3-State Output Enable Time to High Level and  
Output Disable Time from High Level  
Waveform 4. 3-State Output Enable Time to Low Level and  
Output Disable Time from Low Level  
4
1996 Jan 05  
Philips Semiconductors  
Product specification  
8-input multiplexer (3-State)  
74F251A  
TEST CIRCUIT AND WAVEFORMS  
V
CC  
t
w
AMP (V)  
90%  
7.0V  
90%  
NEGATIVE  
PULSE  
V
V
M
R
M
L
V
V
OUT  
IN  
10%  
10%  
PULSE  
GENERATOR  
D.U.T.  
0V  
t
t )  
t
t )  
THL ( f  
TLH ( r  
R
C
R
L
T
L
t
t )  
t
t )  
TLH ( r  
THL ( f  
AMP (V)  
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
0V  
t
w
SWITCH POSITION  
TEST  
SWITCH  
closed  
closed  
open  
Input Pulse Definition  
t
t
PLZ  
PZL  
All other  
DEFINITIONS:  
R
L
C
L
R
T
=
=
=
Load resistor;  
see AC electrical characteristics for value.  
Load capacitance includes jig and probe capacitance;  
see AC electrical characteristics for value.  
Termination resistance should be equal to Z  
pulse generators.  
INPUT PULSE REQUIREMENTS  
family  
V
M
rep. rate  
t
t
t
amplitude  
w
TLH  
THL  
of  
OUT  
2.5ns  
2.5ns  
74F  
3.0V  
1.5V  
1MHz  
500ns  
SF00777  
5
1996 Jan 05  

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