N74F283D [NXP]

4-bit binary full adder with fast carry; 4位二进制全加器与快速进
N74F283D
型号: N74F283D
厂家: NXP    NXP
描述:

4-bit binary full adder with fast carry
4位二进制全加器与快速进

运算电路 逻辑集成电路 光电二极管
文件: 总10页 (文件大小:118K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
74F283  
4-bit binary full adder with fast carry  
Product specification  
IC15 Data Handbook  
1989 Mar 03  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
4-bit binary full adder with fast carry  
74F283  
FEATURES  
PIN CONFIGURATION  
High speed 4-bit addition  
1
2
3
4
5
Σ1  
16  
15  
14  
13  
12  
11  
10  
V
CC  
Cascadable in 4-bit increments  
Fast Internal carry look-ahead  
B1  
B2  
A1  
A2  
Σ0  
Σ2  
DESCRIPTION  
The 74F283 adds two 4-bit binary words (An plus Bn) plus the  
incoming carry. The binary sum appears on the sum outputs  
A0  
B0  
A3  
B3  
Σ3  
C
6
7
8
(Σ0–Σ3) and the outgoing carry (C  
) according to the equation:  
OUT  
C
0
1
2
3
IN  
C
+2 (A0+B0)+2 (A1+B1)+2 (A2+B2)+2 (A3+B3)  
IN  
=Σ0+2Σ1+4Σ2+8Σ3+16C  
GND  
9
OUT  
OUT  
where (+)=plus  
SF00852  
Due to the symmetry of the binary add function, the 74F283 can be  
used with either all active-High operands (positive logic) or with all  
active-Low operands (negative logic). See Function Table. In case of  
all active-Low operands (negative logic) the results Σ1–Σ4 and C  
should be interpreted also as active-Low. With active-High inputs,  
TYPICAL  
PROPAGATION  
DELAY  
TYPICAL  
SUPPLY CURRENT  
(TOTAL)  
OUT  
TYPE  
C
cannot be left open; it must be held Low when no “carry in” is  
IN  
intended. Interchanging inputs of equal weight does not affect the  
74F283  
6.5ns  
40mA  
operation, thus A0, B0, C can arbitrarily be assigned to pins 5, 6,  
IN  
7, etc.  
ORDERING INFORMATION  
Due to pin limitations, the intermediate carries of the 74F283 are not  
brought out for use as inputs or outputs. However, other means can  
be used to effectively insert a carry into, or bring a carry out from, an  
intermediate stage.  
COMMERCIAL RANGE  
= 5V ±10%,  
V
DESCRIPTION  
PKG DWG #  
CC  
T
amb  
= 0°C to +70°C  
16-pin plastic DIP  
16-pin plastic SO  
N74F283N  
SOT38-4  
N74F283D  
SOT109-1  
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE  
74F(U.L.)  
LOAD VALUE  
PINS  
DESCRIPTION  
HIGH/LOW  
1.0/2.0  
1.0/2.0  
1.0/1.0  
50/33  
HIGH/LOW  
20µA/1.2mA  
20µA/1.2mA  
20µA/0.6mA  
1.0mA/20mA  
1.0mA/20mA  
A0 - A3  
B0 - B3  
A operand inputs  
B operand inputs  
Carry input  
C
IN  
C
Carry output  
OUT  
Σ0–Σ3  
Sum outputs  
50/33  
NOTE:  
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.  
LOGIC SYMBOL  
LOGIC SYMBOL (IEEE/IEC)  
Σ
5
0
5
6
3
2
14 15 12 11  
3
P
14  
3
0
12  
A0 B0 A1 B1 A2 B2 A3 B3  
0
3
4
1
Σ
C
C
OUT  
7
9
IN  
6
13  
10  
2
Σ0  
Σ1  
Σ2  
Σ3  
Q
15  
11  
3
4
1
13  
10  
7
CI  
CO  
9
V
=Pin 16  
CC  
GND=Pin 8  
SF00853  
SF00854  
2
1989 Mar 03  
853-0364 95944  
Philips Semiconductors  
Product specification  
4-bit binary full adder with fast carry  
74F283  
LOGIC DIAGRAM  
9
C
OUT  
11  
B3  
12  
A3  
10  
Σ3  
15  
B2  
13  
14  
A2  
Σ2  
2
B1  
1
4
Σ1  
Σ0  
3
A1  
6
B0  
5
A0  
7
C
V
=Pin 16  
IN  
CC  
GND=Pin 8  
SF00855  
FUNCTION TABLE  
PINS  
C
A0  
A1  
H
1
A2  
L
A3  
H
1
B0  
H
1
B1  
L
B2  
L
B3  
H
1
Σ0  
H
1
Σ1  
H
1
Σ2  
L
Σ3  
L
C
Example:  
1001  
1010  
IN  
OUT  
H
Logic levels  
Active High  
Active Low  
L
L
0
1
10011  
0
1
0
0
0
0
0
1
(10+9=19)  
(carry+5+6=12)  
0
1
0
0
1
1
0
0
0
1
1
0
H = High voltage level  
= Low voltage level  
L
3
1989 Mar 03  
Philips Semiconductors  
Product specification  
4-bit binary full adder with fast carry  
74F283  
Figure A shows how to make a 3-bit adder. Tying the operand inputs  
of the fourth adder (A3, B3) Low makes Σ3 dependent only on, and  
equal to, the carry from the third adder. Using somewhat the same  
principle, Figure B shows a way of dividing the 74F283 into a 2-bit  
and a 1-bit adder. The third stage adder (A2, B2, Σ2) is used as  
means of getting a carry (C10) signal into the fourth stage adder (via  
A2 and B2) and bringing out the carry from the second stage on Σ2.  
Note that as long as A2 and B2 are the same, whether High or Low,  
they do not influence Σ2. Similarly, when A2 and B2 are the same,  
the carry into the third stage does not influence the carry out of the  
third stage. Figure C shows a method of implementing a 5-input  
encoder where the inputs are equally weighted. The outputs Σ0, Σ1  
and Σ2 present a binary number of inputs I0–I4 that are true.  
Figure D shows one method of implementing a 5-input majority gate.  
When three or more of the inputs I0–I4 are true, the output M4 is  
true.  
APPLICATIONS  
C10  
A0 B0 A1 B1  
A10 B10  
L
A0 B0 A1 B1 A2 B2 A3 B3  
A0 B0 A1 B1 A2 B2 A3 B3  
C
C
C
C
C
OUT  
C
IN  
OUT  
IN  
IN  
11  
Σ0  
Σ1  
Σ2  
Σ3  
Σ0  
Σ0  
Σ1  
Σ1  
Σ2  
Σ3  
C3  
C2 Σ10  
A. 3-bit Adder  
B. 2-bit and 1-bit Adder  
I2  
I2  
I0 I1  
L
I3 I4  
I0 I1  
I3  
I4  
A0 B0 A1 B1 A2 B2 A3 B3  
A0 B0 A1 B1 A2 B2 A3 B3  
C
C
C
C
OUT  
IN  
OUT  
IN  
Σ0  
Σ1  
Σ2  
Σ3  
Σ0  
Σ1  
Σ2  
Σ3  
0
1
2
2
2
2
M4  
C. 5-input Encoder  
D. 5-input Majority Gate  
SF00856  
4
1989 Mar 03  
Philips Semiconductors  
Product specification  
4-bit binary full adder with fast carry  
74F283  
ABSOLUTE MAXIMUM RATINGS  
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the  
operating free-air temperature range.)  
SYMBOL  
PARAMETER  
RATING  
–0.5 to +7.0  
–0.5 to +7.0  
–30 to +5  
UNIT  
V
V
V
Supply voltage  
Input voltage  
Input current  
CC  
V
IN  
I
IN  
mA  
V
V
Voltage applied to output in High output state  
Current applied to output in Low output state  
Operating free-air temperature range  
Storage temperature  
–0.5 to V  
40  
OUT  
OUT  
CC  
I
mA  
°C  
°C  
T
amb  
0 to +70  
T
stg  
–65 to +150  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
Nom  
SYMBOL  
PARAMETER  
UNIT  
Min  
4.5  
2.0  
Max  
V
CC  
V
IH  
V
IL  
Supply voltage  
5.0  
5.5  
V
V
High-level input voltage  
Low-level input voltage  
Input clamp current  
0.8  
–18  
–1  
V
I
I
I
mA  
mA  
mA  
°C  
IK  
High-level output current  
Low-level output current  
Operating free-air temperature range  
OH  
OL  
20  
T
amb  
0
70  
DC ELECTRICAL CHARACTERISTICS  
(Over recommended operating free-air temperature range unless otherwise noted.)  
LIMITS  
NO TAG  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
UNIT  
TYP  
MIN  
MAX  
NO TAG  
V
V
V
V
V
V
V
= MIN, V = MAX ±10%V  
2.5  
2.7  
CC  
IL  
CC  
V
High-level output voltage  
V
V
OH  
= MIN, I = MAX  
±5%V  
3.4  
0.30  
0.30  
–0.73  
IH  
OH  
CC  
= MIN, V = MAX ±10%V  
0.50  
0.50  
–1.2  
100  
20  
CC  
IL  
CC  
CC  
V
V
Low-level output voltage  
OL  
= MIN, I = MAX  
±5%V  
IH  
OL  
Input clamp voltage  
= MIN, I = I  
IK  
V
IK  
CC  
CC  
CC  
I
I
I
Input current at maximum input voltage  
High-level input current  
= MAX, V = 7.0V  
µA  
I
I
= MAX, V = 2.7V  
µA  
IH  
IL  
I
C
only  
–0.6  
–1.2  
–150  
55  
mA  
mA  
mA  
mA  
IN  
I
Low-level input current  
V
CC  
= MAX, V = 0.5V  
I
An, Bn  
NO TAG  
I
I
Short-circuit output current  
V
V
= MAX  
= MAX  
–60  
OS  
CC  
4
Supply current (total)  
40  
CC  
CC  
NOTES:  
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.  
2. All typical values are at V = 5V, T = 25°C.  
CC  
amb  
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold  
OS  
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting  
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any  
sequence of parameter tests, I tests should be performed last.  
OS  
4. I should be measured with all outputs open and the following conditions:  
CC  
Condition1: all inputs grounded  
Condition 2: all B inputs Low, other inputs at 4.5V  
Condition 3: all inputs at 4.5V  
5
1989 Mar 03  
Philips Semiconductors  
Product specification  
4-bit binary full adder with fast carry  
74F283  
AC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
V
= +25°C  
T
V
= 0°C to +70°C  
= +5.V ± 10%  
amb  
amb  
CC  
= +5.V  
TEST  
CONDITIONS  
CC  
SYMBOL  
PARAMETER  
UNIT  
C = 50pF,  
R = 500Ω  
L
C = 50pF,  
L
R = 500Ω  
L
L
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
3.5  
4.0  
7.0  
7.0  
9.5  
9.5  
3.0  
3.5  
10.5  
10.5  
ns  
ns  
PLH  
PHL  
Waveform 1, 2  
Waveform 1, 2  
Waveform 2  
C
to Σi  
IN  
t
t
Propagation delay  
Ai or Bi to Σi  
3.5  
3.5  
7.0  
7.0  
9.5  
9.5  
2.5  
3.5  
10.5  
10.5  
ns  
ns  
PLH  
PHL  
t
t
Propagation delay  
3.5  
3.0  
5.7  
5.4  
7.5  
7.0  
3.5  
2.5  
8.5  
8.0  
ns  
ns  
PLH  
PHL  
C
to C  
IN  
OUT  
t
t
Propagation delay  
Ai or Bi to C  
3.5  
2.5  
5.7  
5.3  
7.5  
7.0  
3.0  
2.5  
8.5  
8.0  
ns  
ns  
PLH  
PHL  
Waveform 1, 2  
OUT  
AC WAVEFORMS  
For all waveforms, V =1.5V.  
M
Ai, Bi, C  
IN  
V
V
M
V
M
V
M
M
Ai, Bi, C  
IN  
t
t
t
t
PHL  
PLH  
PLH  
PHL  
Σi, C  
OUT  
V
M
V
M
V
V
M
M
Σi, C  
OUT  
SF00858  
SF00857  
Waveform 1. Propagation Delay  
Waveform 2. Propagation Delay  
Operands and Carry Inputs to Outputs  
Operands and Carry Inputs to Outputs  
TEST CIRCUIT AND WAVEFORM  
t
AMP (V)  
0V  
V
w
CC  
90%  
90%  
NEGATIVE  
PULSE  
V
V
M
M
10%  
10%  
V
V
OUT  
IN  
PULSE  
GENERATOR  
D.U.T.  
t
t )  
t
t )  
THL ( f  
TLH ( r  
R
C
R
L
t
t )  
T
L
t
t )  
TLH ( r  
THL ( f  
AMP (V)  
0V  
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
10%  
10%  
Test Circuit for Totem-Pole Outputs  
DEFINITIONS:  
t
w
Input Pulse Definition  
INPUT PULSE REQUIREMENTS  
R
L
C
L
R
T
=
=
=
Load resistor;  
see AC ELECTRICAL CHARACTERISTICS for value.  
Load capacitance includes jig and probe capacitance;  
see AC ELECTRICAL CHARACTERISTICS for value.  
family  
V
rep. rate  
t
w
t
t
THL  
amplitude  
M
TLH  
Termination resistance should be equal to Z  
pulse generators.  
of  
OUT  
2.5ns 2.5ns  
74F  
3.0V  
1.5V  
1MHz  
500ns  
SF00006  
6
1989 Mar 03  
Philips Semiconductors  
Product specification  
4-bit binary full adder with fast carry  
74F283  
DIP16: plastic dual in-line package; 16 leads (300 mil)  
SOT38-4  
7
1989 Mar 03  
Philips Semiconductors  
Product specification  
4-bit binary full adder with fast carry  
74F283  
SO16: plastic small outline package; 16 leads; body width 3.9 mm  
SOT109-1  
8
1989 Mar 03  
Philips Semiconductors  
Product specification  
4-bit binary full adder with fast carry  
74F283  
NOTES  
9
1989 Mar 03  
Philips Semiconductors  
Product specification  
4-bit binary full adder with fast carry  
74F283  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1999  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 04-99  
9397-750-05591  
Document order number:  
Philips  
Semiconductors  

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