N74F350D [NXP]
4-bit shifter; 4位移位器型号: | N74F350D |
厂家: | NXP |
描述: | 4-bit shifter |
文件: | 总6页 (文件大小:66K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Philips Semiconductors FAST Products
Product specification
4-bit shifter
74F350
FEATURES
PIN CONFIGURATION
• Shifts 4 bits of data to 0, 1, 2, 3 places under control of two
select lines
I–3
I–2
I–1
I0
1
2
3
4
5
16
V
CC
• 3-State outputs for bus organized systems
15 Y0
14 Y1
13 OE
12 Y2
11 Y3
10 S0
DESCRIPTION
The 74F350 is a combination logic circuit that shifts a 4-bit word
from 0 to 3 places. No clocking is required as with shift registers.
The 74F350 can be used to shift any number of bits any number of
places up or down by suitable interconnection. Shifting can be:
1. Logical — with logic zeros filled in at either end of the shifting
field.
I1
I2
I3
6
7
8
GND
9
S1
2. Arithmetic — where the sign bit is extended during a shift down.
3. End around — where the data word forms a continuous loop.
SF00205
ORDERING INFORMATION
The 3-State outputs are useful for bus interface applications or
expansion to a larger number of shift positions in end around
shifting. The active Low Output Enable (OE) controls the state of the
outputs. The outputs are in the high impedance “off” state when OE
is High, and they are active when OE is Low.
COMMERCIAL RANGE
= 5V ±10%, T = 0°C to +70°C
DESCRIPTION
V
CC
amb
16-pin plastic DIP
16-pin plastic SO
N74F350N
N74F350D
TYPE
TYPICAL PROPAGATION DELAY
TYPICAL SUPPLY CURRENT (TOTAL)
74F350
5.2ns
24mA
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
I–n, In
S0, S1
OE
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
Data inputs
1.0/2.0
1.0/2.0
1.0/2.0
150/40
20µA/1.2mA
20µA/1.2mA
20µA/1.2mA
3.0mA/24mA
Select inputs (active Low)
Output Enable input (active Low)
Data outputs
Y0 – Y3
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
D MUX
0
1
2
3
4
5
6
7
10
9
0
1
EN
[
]
G
SHIFTER
3
13
I–3 I–2 I–1 I0
I1
I2
I3
9
S1
≥1
≥1
≥1
≥1
10
3
2
1
0
10
S0
1
2
3
4
5
6
7
15
14
12
11
11
12
13
Z10
Z11
Z12
Z13
Z14
Z15
Z16
13
OE
Y0 Y1 Y2 Y3
11
12
13
14
3
2
1
0
15 14 12 11
V
= Pin 16
GND = Pin 8
CC
12
13
14
15
3
2
1
0
SF00206
13
14
15
16
3
2
1
0
SF00207
1
March 20, 1989
853–0368 96093
Philips Semiconductors FAST Products
Product specification
4-bit shifter
74F350
LOGIC DIAGRAM
I–3
1
I–2
I–1
I0
I1
I2
I3
S1
S0
OE
13
2
3
4
5
6
7
9
10
15
14
Y1
12
Y2
11
Y3
Y0
V
= Pin 16
CC
GND = Pin 8
SF00208
FUNCTION TABLE
INPUTS
OUTPUTS
OE
H
L
S1
X
S0
X
I3
X
I2
I1
X
I0
I–1
X
I–2
X
I–3
X
Y3
Y2
Z
Y1
Z
Y0
Z
X
X
Z
L
L
D3
X
D2
D2
X
D1
D1
D1
X
D0
D0
D0
D0
X
X
X
D3
D2
D1
D0
D2
D1
D0
D1
D0
D–1
D–2
D0
L
L
H
L
D–1
D–1
D–1
X
X
D–1
D–2
D–3
L
H
H
X
D–2
D–2
X
L
H
X
X
D–3
D–1
H = High voltage level
L
X
Z
=
=
=
Low voltage level
Don’t care
High impedance “off” state
Dn = High or Low state of referenced In input
2
March 20, 1989
Philips Semiconductors FAST Products
Product specification
4-bit shifter
74F350
APPLICATION FOR 16-BIT SHIFT UP 0, 1, 2, OR 3 PLACES
0
1
2
3
4
5
6
7
8
9
10 11
12 13 14 15
GND
I-3 I-2 I-1 I0 I1 I2 I3
I-3 I-2 I-1 I0 I1 I2 I3
I-3 I-2 I-1 I0 I1 I2 I3
I-3 I-2 I-1 I0 I1 I2 I3
S0
S1
S0
S1
S0
S1
S0
S1
OE
OE
OE
OE
Y0 Y1 Y2 Y3
Y0 Y1 Y2 Y3
Y0 Y1 Y2 Y3
Y0 Y1 Y2 Y3
S0
S1
OE
0
1
2
3
4
5
6
7
8
9
10 11
12 13 14 15
S0
L
S1
L
MODE
No shift
H
L
H
L
H
H
Shift 1 place
Shift 2 places
Shift 3 places
SF00209
APPLICATION FOR 8-BIT END AROUND SHIFT 0, 1, 2, 3, 4, 5, 6, OR 7 PLACES
0
1
2
3
4
5
6
7
I-3 I-2 I-1 I0 I1 I2 I3
I-3 I-2 I-1 I0 I1 I2 I3
I-3 I-2 I-1 I0 I1 I2 I3
I-3 I-2 I-1 I0 I1 I2 I3
S0
S1
S0
S1
S0
S1
S0
S1
OE
OE
OE
OE
Y0 Y1 Y2 Y3
Y0 Y1 Y2 Y3
Y0 Y1 Y2 Y3
Y0 Y1 Y2 Y3
S0
S1
S2
S3
0
1
2
3
4
5
6
7
S2
L
S1
L
S0
L
MODE
No shift
L
L
L
H
H
H
H
L
H
L
H
L
H
L
H
Shift end around 1
Shift end around 2
Shift end around 3
Shift end around 4
Shift end around 5
Shift end around 6
Shift end around 7
H
H
L
L
H
H
SF00210
3
March 20, 1989
Philips Semiconductors FAST Products
Product specification
4-bit shifter
74F350
APPLICATION FOR 13-BIT TWO’S COMPLEMENT SCALER
12 11 10
9
8
7
6
5
4
3
2
1
0
I-3 I-2 I-1 I0 I1 I2 I3
I-3 I-2 I-1 I0 I1 I2 I3
I-3 I-2 I-1 I0 I1 I2 I3
S0
S1
S0
S1
S0
S1
OE
OE
OE
Y0 Y1 Y2 Y3
Y0 Y1 Y2 Y3
Y0 Y1 Y2 Y3
S0
S1
12 11 10
9
8
7
6
5
4
3
2
1
0
S1
L
L
H
H
S0
L
H
L
H
SCALE
÷8
1/8
1/4
1/2
1
÷4
÷2
No change
SF00211
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
Supply voltage
Input voltage
Input current
CC
IN
V
V
I
mA
V
IN
V
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
–0.5 to V
48
OUT
OUT
CC
I
mA
°C
°C
T
amb
0 to +70
T
stg
–65 to +150
RECOMMENDED OPERATING CONDITIONS
LIMITS
NOM
5.0
SYMBOL
PARAMETER
UNIT
MIN
MAX
V
Supply voltage
4.5
2.0
5.5
V
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
0.8
–18
–3
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
OH
OL
24
T
amb
Operating free-air temperature range
0
+70
4
March 20, 1989
Philips Semiconductors FAST Products
Product specification
4-bit shifter
74F350
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
1
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
MAX
2
MIN
2.4
TYP
V
V
V
V
V
V
V
V
= MIN, V = MAX ±10%V
CC
IL
CC
V
OH
High-level output voltage
V
= MIN, I = MAX
±5%V
2.7
3.4
0.35
0.35
–0.73
IH
OH
CC
= MIN, V = MAX ±10%V
0.50
V
0.50
CC
IL
CC
CC
V
V
Low-level output voltage
OL
= MIN, I = MAX
±5%V
IH
OL
Input clamp voltage
= MIN, I = I
IK
–1.2
100
20
V
IK
CC
CC
CC
CC
I
I
I
I
Input current at maximum input voltage
High-level input current
= MAX, V = 7.0V
µA
µA
mA
I
I
= MAX, V = 2.7V
IH
IL
I
Low-level input current
= MAX, V = 0.5V
–1.2
I
Off-state output current,
High-level voltage applied
I
V
= MAX, V = 2.7V
50
µA
µA
OZH
CC
O
Off-state output current,
Low-level voltage applied
I
I
V
V
= MAX, V = 0.5V
–50
OZL
CC
O
3
Short-circuit output current
= MAX
–60
–150
35
mA
mA
mA
mA
OS
CC
I
22
26
26
CCH
I
41
I
Supply current (total)
V
CC
= MAX
CCL
CC
I
42
CCZ
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
AC ELECTRICAL CHARACTERISTICS
LIMITS
V
= +5.0V
= +25°C
V
= +5.0V ± 10%
= 0°C to +70°C
CC
CC
TEST
CONDITION
T
amb
T
amb
SYMBOL
PARAMETER
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay
In to Yn
3.0
2.5
4.5
4.0
6.0
5.5
3.0
2.5
7.0
6.5
PLH
PHL
Waveform 1
Waveform 1
ns
ns
ns
ns
t
t
Propagation delay
Sn to Yn
4.0
3.0
7.8
6.5
10.0
8.5
4.0
3.0
11.0
9.5
PLH
PHL
t
t
Output Enable time to
High or Low level
Waveform 2
Waveform 3
2.5
4.0
5.0
7.0
7.0
9.0
2.5
4.0
8.0
10.0
PZH
PZL
t
t
Output Disable time to
High or Low level
Waveform 2
Waveform 3
2.0
2.0
3.9
4.0
5.5
5.5
2.0
2.0
6.5
6.5
PHZ
PLZ
5
March 20, 1989
Philips Semiconductors FAST Products
Product specification
4-bit shifter
74F350
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
In, I–n, Sn
V
V
M
M
t
t
PLH
PHL
V
V
M
M
Yn
SF00212
Waveform 1. Propagation Delay Data and Select to Output
OE
OE
Yn
V
V
V
V
M
M
t
M
M
t
t
t
PLZ
PZH
PHZ
PZL
V
–0.3V
OH
V
V
M
M
V
+0.3V
Yn
OL
0V
SF00213
SF00214
Waveform 2. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
Waveform 3. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
V
CC
t
w
AMP (V)
0V
7.0V
90%
90%
NEGATIVE
PULSE
V
V
M
R
L
M
V
V
OUT
IN
10%
10%
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
T
L
t
t )
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
Test Circuit for Open Collector Outputs
10%
10%
t
w
SWITCH POSITION
TEST
SWITCH
closed
closed
open
Input Pulse Definition
t
t
PLZ
PZL
All other
DEFINITIONS:
R
L
C
L
R
T
=
=
=
Load resistor;
INPUT PULSE REQUIREMENTS
see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
Termination resistance should be equal to Z
pulse generators.
family
V
M
rep. rate
t
t
t
THL
amplitude
w
TLH
of
OUT
2.5ns
2.5ns
74F
3.0V
1.5V
1MHz
500ns
SF00128
6
March 20, 1989
相关型号:
N74F352N
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