NE5410F [NXP]
10-Bit high-speed multiplying D/A converter; 10位高速乘法D / A转换器
| 型号： | NE5410F |
| 厂家： | 
NXP |
| 描述： | 10-Bit high-speed multiplying D/A converter |
| 文件： | 总9页 (文件大小：106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
DESCRIPTION
PIN CONFIGURATION
The NE5410/SE5410 are 10-bit Multiplying Digital-to-Analog
Converters pin- and function-compatible with the industry-standard
MC3410, but with improved performance. These are capable of
high-speed performance, and are used as general-purpose building
blocks in cost effective D/A systems.
F Package
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
V
+
–
EE
REF
GND
V
V
REF
CC
OUTPUT
The NE/SE5410 provides complete 10-bit accuracy and differential
non-linearity over temperature, and a wide compliance voltage
range. Segmented current sources, in conjunction with an R/2R
DAC, provide the binary weighted currents. The output buffer
amplifier and voltage reference have been omitted to allow greater
speed, lower cost, and maximum user flexibility.
D
(MSB)
D
D
(LSB)
1
10
9
D
2
D
D
D
D
3
4
5
8
7
6
D
D
TOP VIEW
FEATURES
• Pin- and function-compatible with MC3410
BLOCK DIAGRAM
• 10-bit resolution and accuracy (±0.05%)
MSB
LSB
D
D
D
D
D
D
D
D
D
8 9
D
1
2
3
4
5
6
7
10
• Guaranteed differential non-linearity over temperature
• Wide compliance voltage range—-2.5 to +2.5V
• Fast settling time—250ns typical
4
5
6
7
8
9 10 11 12 13
I
O
3
CURRENT SWITCHES
• Digital inputs are TTL- and CMOS-compatible
• High-speed multiplying input slew rate—20mA/µs
LADDER TERMINATORS
R-2R LADDER
• Reference amplifier internally-compensated
• Standard supply voltages +5V and -15V
APPLICATIONS
• Successive approximation A/D converters
16
15
V
V
REF(+)
REF(–)
• High-speed, automatic test equipment
• High-speed modems
BIAS
CIRCUITRY
REFERENCE
CURRENT
AMPLIFIER
14
• Waveform generators
V
CC
• CRT displays
1
2
• Strip CHART and X-Y plotters
• Programmable power supplies
• Programmable gain and attenuation
GND
V
EE
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
0 to +70°C
ORDER CODE
NE5410F
DWG #
0582B
0582B
16-Pin Ceramic Dual In-Line Package (CERDIP)
16-Pin Ceramic Dual In-Line Package (CERDIP)
-55 to +125°C
SE5410F
767
August 31, 1994
853-0945 13721
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
ABSOLUTE MAXIMUM RATINGS
T =+25°C, unless otherwise specified.
A
SYMBOL
PARAMETER
RATING
+7.0
UNIT
V
V
V
V
Power supply
V
DC
V
DC
V
DC
V
DC
CC
-18
EE
Digital input voltage
Applied output voltage
Reference current
+15
I
+4, -5.0
2.5
O
I
mA
REF(16)
V
V
Reference amplifier inputs
V
, V
V
REF
CC
EE
DC
DC
Reference amplifier differential inputs
Operating temperature range
SE5410
0.7
V
REF(D)
T
A
-55 to +125
0 to +70
°C
NE5410
°C
T
J
Junction temperature
Ceramic package
+150
°C
°C
T
STG
Storage temperature
-65 to +150
Maximum power dissipation
T =25°C (still-air)
A
P
D
1190
mW
1
NOTES:
1. Derate above 25°C at the following rate:
F package at 9.5mW/°C
DC ELECTRICAL CHARACTERISTICS (Continued)
V
CC
=+5.0V , V =-15V , I
=2.0mA, all digital inputs at high logic level. SE5410: T =-55°C to +125°C, NE5410 Series: T =0°C to +70°C,
DC
EE
DC REF
A
A
unless otherwise noted.
LIMITS
Typ
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
Min
Max
±0.05
±1/2
Relative accuracy
Over Temperature
±0.025
±1/4
%
LSB
%
R
(Error relative to full scale I )
O
Differential non-linearity
Over temperature
±0.025
±1/4
±0.05
±1/2
LSB
Settling time to within ±1/2 LSB
(all bits low to high)
t
S
T = 25°C
A
250
ns
t
t
35
20
PLH
PHL
Propagation delay time
T = 25°C
A
ns
TCI
Output full-scale current drift
20
40
ppm/°C
O
Digital input logic levels (all bits)
High level, Logic “1”
V
IH
V
DC
2.0
Low level, Logic “0”
0.8
Digital input current (all bits)
I
IH
I
IL
High level, V = 5.5V
20
–20
µA
IH
Low level, V = 0.8V
IL
I
I
I
Reference input bias current (Pin 15)
Output current (all bits high)
–1.0
3.996
0
–5.0
4.054
0.4
µA
mA
µA
REF(15)
OH
V
REF
= 2.000V, R16 = 1000Ω
3.937
Output currents (all bits low)
T = 25°C
A
OL
T = 25°C
A
–2.5
+2.5
V
O
Output voltage compliance
< 0.050%
V
DC
R
relative to full-scale
SR I
Reference amplifier slew rate
Reference amplifier settling time
20
2.0
mA/µs
µs
REF
ST I
0 to 4.0mA, ±0.1%
REF
PSRR(–) Output current power supply sensitivity
Output capacitance
0.003
25
0.01
%/%
pF
C
V = 0
O
O
768
August 31, 1994
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
DC ELECTRICAL CHARACTERISTICS
V
CC
=+5.0V , V =-15V , I
=2.0mA, all digital inputs at high logic level. SE5410: T =-55°C to +125°C, NE5410 Series: T =0°C to +70°C,
DC
EE
DC REF
A
A
unless otherwise noted.
LIMITS
Typ
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
pF
Min
Max
C
Digital input capacitance (all bits high)
Power supply current (all bits low)
4.0
I
I
I
+2
–12
+4
–18
CC
EE
mA
V
CC
V
EE
T = 25°C
+4.75
–14.25
+5.0
–15
+5.25
–15.75
A
Power supply voltage range
Power consumption
V
DC
V
O
= 0
190
300
mW
4.0
3.0
13
12
11
10
4
I
EE
+V
–V
= +5V
CC
= –15V
2.0
1.0
0
EE
+V
–V
= +5V
CC
EE
T
= 25°C
A
= –15V
= 2mA
I
= 2mA
I
REF
REF
3
+I
CC
2
1
–1.0
0
–5
–3
–1
0
1
3
5
–75 –50 –25
0
25 50 75 100 125
COMPLIANCE VOLTAGE (VOLT)
T
(°C)
A
Figure 1. Output Current vs Output Compliance Voltage
Figure 3. Power Supply Currents vs Temperature
4.0
3.0
2.0
+V
–V
= +5V
CC
EE
1.0
0
= –15V
I
= 2mA
REF
–1.0
–2.0
–3.0
–4.0
–75 –50 –25
0
25 50 75 100 125
T
(°C)
A
Figure 2. Maximum Output Compliance Voltage
vs Temperature
Figure 4. Reference Amplifier Frequency Response
An on-chip high slew reference current amplifier drives the R/2R
ladder and segment decoder. The currents are scaled in such a way
that, with all bits on, the maximum output current is two times
1023/1024 of the reference amplifier current, or nominally 3.996mA
for a 2.000mA reference input current. The reference amplifier
allows the user to provide a voltage input: out-board resistor R16
(see Figure 6) converts this voltage to a usable current. A current
mirror doubles this reference current and feeds it to the segment
decoder and resistor ladder. Thus, for a reference voltage of 2.0V
and a 1kΩ resistor tied to Pin 16, the full-scale current is
CIRCUIT DESCRIPTION
The NE5410 consists of four segment current sources which
generate the 2 Most Significant Bits (MSBs), and an R/2R DAC
implemented with ion-implanted resistors for scaling the remaining 8
Least Significant Bits (LSBs) (see Figure 5). This approach provides
complete 10-bit accuracy without trimming.
The individual bit currents are switched ON or OFF by
fully-differential current switches. The switches use current steering
for speed.
769
August 31, 1994
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
approximately 4.0mA. This relationship will remain regardless of the
reference voltage polarity.
bypassing the junction of the two resistors with a 0.1µF capacitor to
ground.
Connections for a positive reference voltage are shown in Figure 6a.
For negative reference voltage inputs, or for bipolar reference
voltage inputs in the multiplying mode, R15 can be tied to a negative
voltage corresponding to the minimum input level. For a negative
reference input, R16 should be grounded (Figure 6b). In addition,
The reference amplifier is internally-compensated with a 10pF
feed-forward capacitor, which gives it its high slew rate and fast
settling time. Proper phase margin is maintained with all possible
values of R16 and reference voltages which supply 2.0mA reference
current into Pin 16. The reference current can also be supplied by a
high impedance current source of 2.0mA. As R16 increases, the
bandwidth of the amplifier decreases slightly and settling time
increases. For a current source with a dynamic output impedance of
1.0MΩ, the bandwidth of the reference amplifier is approximately
half what it is in the case of R16=1.0kΩ, and settling time is ±10µs.
The reference amplifier phase margin decreases as the current
source value decreases in the case of a current source reference,
so that the minimum reference current supplied from a current
source is 0.5mA for stability.
the negative voltage reference must be at least 3V above the V
supply voltage for best operation. Bipolar input signals may be
EE
handled by connecting R16 to a positive voltage equal to the peak
positive input level at Pin 15.
When a DC reference voltage is used, capacitive bypass to ground
is recommended. The 5V logic supply is not recommended as a
reference voltage. If a well regulated 5.0V supply, which drives logic,
is to be used as the reference, R16 should be decoupled by
connecting it to the +5.0V logic supply through another resistor and
(4)
MSB
(13)
LSB
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
D
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
D
1
10
GND
(2)
I
OUT
(3)
SEGMENT
DECODER
V
BIAS
(INTERNAL)
2R
2R
2R
2R
2R
2R
2R
2R
R
R
R
R
R
R
(16)
+
V
+
–
REF
(15)
CODE SELECTED 0111110011
–
2R
1
R
R
R
R
1
1
1
1
V
(1)
EE
Figure 5. NE5410 Equivalent Circuit
770
August 31, 1994
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
and full-scale current drift. Relative accuracy, or linearity, is the
measure of each output current with respect to its intended fraction
of the full-scale current. The relative accuracy of the NE5410 is fairly
constant over temperature due to the excellent temperature tracking,
of the implanted resistors. The full-scale current from the reference
amplifier may drift with temperature causing a change in the
absolute accuracy. However, the NE5410 has a low full-scale
current drift with temperature.
V
(+)
R
V
R
T
R
R
15
16
15
16
14
CC
I
O
The SE5410 and the NE5410 are accurate to within ± LSB at 25°C
with a reference current of 2.0mA on Pin 16.
5410
2
D
THROUGH D
10
1
3
1
NOTES:
R
R
I
+ R = R = R
V
EE
MONOTONICITY
16
T
O
T
15
REF
<
<R
16
The NE5410 and SE5410 are guaranteed monotonic over
temperature. This means that for every increase in the input digital
code, the output current either remains the same or increases but
never decreases. In the multiplying mode, where reference input
current will vary, monotonicity can be assured if the reference input
current remains above 0.5mA.
F.S. = 2 I = V
/R
a. Positive Reference Voltage
R
REF REF
V
(–)
R
R
T
V
CC
R
R
16
15
SETTLING TIME
13
15
The worst-case switching condition occurs when all bits are
switched “on,” which corresponds to a LOW-to-HIGH transition for
all bits. This time is typically 250ns for the output to settle to within ±
1/2LSB for 10-bit accuracy, and 200ns for 8-bit accuracy. The
turn-off time is typically 120ns. These times apply when the output
swing is limited to a small (<0.7V) swing and the external output
capacitance is under 25pF.
I
O
5410
D
THROUGH D
10
1
NOTES:
1
2
R
R
+ R = R
15
T
T
16
<
<R
15
VEE
V
EE
b. Negative Reference Voltage
IV
≥ R + 3V
REF
The major carry (MSB off-to-on, all others on-to-off) settles in
approximately the same time as when all bits are switched off-to-on.
Figure 6. Basic Connections
If a load resistor of 625Ω is connected to ground, allowing the output
to swing to -2.5V, the settling time increases to 1.5µs.
OUTPUT VOLTAGE COMPLIANCE
The output voltage compliance ranges from -2.5 to +2.5V. As shown
in Figure 2, this compliance range is nearly constant over
temperature. At the temperature extremes, however, the compliance
Extra care must be taken in board layout as this is usually the
dominant factor in satisfactory test results when measuring settling
time. Short leads, 100µF supply bypassing, and minimum scope
lead length are all necessary.
voltage may be reduced if V >-15V.
EE
A typical test setup for measuring settling time is shown in Figure 7.
The same setup for the most part can be used to measure the slew
rate of the reference amplifier (Figure 9) by tying all data bits high,
pulsing the voltage reference input between 0 and 2V, and using a
ACCURACY
Absolute accuracy is a measure of each output current level with
respect to its intended value. It is dependent upon relative accuracy
500Ω load resistor R .
L
771
August 31, 1994
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
V
CC
0.1µF
+2VDC
14
RISE AND FALL TIMES ≤ 10ns
1k
16
15
4
5
2.4V
V
I
1k
6
0.1µF
0.4V
0.5V
7
R
L
8
500
NE5410
9
10
11
12
13
3
2
V
O
V
O
0
t
— 250ns TYPICAL
TO ± 1/2 LSB
S
C
≤ 25pF
O
V
I
50
1
0.1µF
V
EE
Figure 7. Settling Time
V
CC
0.1µF
14
1k
+2VDC
16
15
4
5
RISE AND FALL TIMES ≤ 10ns
1k
6
0.1µF
2.4V
0.4V
7
V
I
8
NE5410
9
10
11
12
13
3
2
V
O
R
L
20
0V
V
O
V
I
50
1
–80mV
0.1µF
TO ± 1/2 LSB
t
t
PLH
PHL
V
EE
FOR PROPAGATION
DELAY TIME
Figure 8. Propagation Delay Time
772
August 31, 1994
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
V
CC
0.1µF
V
(+)
REF
2V
0
14
1k
1k
2.0V
16
15
4
5
V
(+)
REF
6
0.1µF
0
7
R
L
0.5V
8
NE5410
500
9
SLEW RATE
V
O
10
11
12
13
3
2
V
O
0
t
= 2µs TYPICAL
S
≤ 25pF
TO ±0.1%
1
NOTE:
Use R = 20Ω to GND for slew rate measurement.
0.1µF
L
V
EE
Figure 9. Reference Amplifier Settling Time and Slew Rate
F.S. ADJ
5V
REF
R
R
F
T
2.5k
V
+15V
CC
0.1µF
R
REF
2.5k
16
5410
15
1/2 NE5535
0
V
OUT
2.5k
V
EE
ADJ
10k
0.1µF
–15V
Figure 10. Bipolar Voltage Output Circuits (-10V to +10V)
773
August 31, 1994
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
5V
REF
ANALOG
INPUT
(0-10V)
2.4k
20k
+5VDC
1
+5VDC
F.S.
–V
+V
ADJ
200Ω
ZERO
ADJ
2.5k
500k
14
16
2.5k
15
3
3
V
V
2+
1+
NE5410
IN A
NE529
2.5k
4
IN B
OUT A
10
–15VDC
D
6
OUT
–10VDC
Q
Q
0
9
D
S
E
START
EOC
2504 SAR
Q
CLOCK
CP
10
+5VDC
NOTES:
10-bit conversion time = 3.3µs with 3MHz clock.
This converter uses a 2504 12-bit successive approximation register in the short cycle operating mode where the end of conversion signal is taken from the first unused bit of the
SAR (Q ).
10
Figure 11. Successive Approximation A/D Converter
1
OE
19
16
15
7
6
5
12
4
3
2
1
0
µP
BUS
LS373
9
6
5
2
NE5410
E
CONTROL
SIGNALS
FROM µP
2
1
E
E
2,3
Q
2
11
13
1
7
2
6
D
Q
0
0
1/2 LS375
1/2LS375
Q
3
D
Q
1
0,1
1
E
4
TIMING SEQUENCE
E
E
1
2
DATA
DB
DB
2-9
0,1
NOTES:
With this double latch technique, valid data will be latched to the DAC until updated with the E pulse. Timing will depend on the processor used.
2
Figure 12. 8-Bit µP Bus Interface
774
August 31, 1994
Philips Semiconductors Linear Products
Product specification
10-Bit high-speed multiplying D/A converter
NE/SE5410
V
+5V
IN
3k
R
T
ZERO
ADJ
V
V
CC
14
EE
1
5V
REF
2
3k
TTL
CLOCK
R
I
2.5k
2.5k
16
15
3
NE5410
+
–
COMP
LSB
13 12 11 10
9
8
7
6
5
4 MSB
D
OUT
Q
Q
9
0
–15
START
RST
CP
10-BIT COUNTER
NOTE:
FULL SCALE
1023
1024
) ǒ Ǔ
V
+
4mA (R
) R
1
IN
T
Figure 13. Staircase A/D
775
August 31, 1994
相关型号：
©2020 ICPDF网 联系我们和版权申明