NE56625-20D [NXP]
IC 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, 3.90 MM, PLASTIC, MS-012, SOP-8, Power Management Circuit;
| 型号： | NE56625-20D |
| 厂家： | 
NXP |
| 描述： | IC 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, 3.90 MM, PLASTIC, MS-012, SOP-8, Power Management Circuit 光电二极管 |
| 文件： | 总15页 (文件大小：196K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
NE56625-20
System reset with Watchdog timer
Product data
2003 Oct 15
Supersedes data of 2002 Mar 25
Philips
Semiconductors
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
GENERAL DESCRIPTION
The NE56625-20 is comprised of a power-on reset, a Watchdog
timer and low battery detection circuit. The NE56625 is designed to
generate an Active-LOW reset signal for a variety of microprocessor
and logic systems. Accurate reset signals are generated during
momentary power interruptions or whenever power supply voltages
sag to intolerable levels. The built-in Watchdog timer monitors the
microprocessor and ensures it is operating properly. Any abnormal
system operations due to microprocessor malfunctions are
terminated by a system reset generated by the Watchdog. To
accommodate a wide range of system requirements, the Watchdog
Monitoring Time and power-on reset delay time are programmable
from 10 ms to 10 sec.
The NE56625-20 is designed for low voltage battery powered
applications with low battery detection threshold at 2.2 V. It is offered
in the 8-lead small outline surface mount package (SOP005).
FEATURES
APPLICATIONS
• Microcomputer systems and logic systems
• 2 V cordless phones
• Accurate threshold detection voltages:
– Low battery: 2.2 V ±3%
– Power-on reset: 2.0 V ±3%
• Various portable, battery operated equipment
• Low hysteresis voltage (both low battery check and power-on
reset): 50 mV typ.
• Low supply current: 150 µA typ.
• Programmable power-on reset detection voltage
• Programmable power-on reset delay: 10 ms to 10 s
• Internal Watchdog timer programmable with external resistor and
capacitor: 10 ms to 10 s
• Reset assertion with V down to 0.8 V (typical)
CC
DC
• Few external components required
SIMPLIFIED SYSTEM DIAGRAM
V
CC
R
CT
LOGIC SYSTEM
R
CT
6
5
NE56625-20
BC
BATTERY
CHECK
NMI
2
8
V
S
7
RESET
CLK
RESET
GENERATOR
RESET
V
REF
C
PROGRAMMABLE
WATCHDOG
TIMER
CLK
3
GND
4
1
GND
C
T
SL01593
Figure 1. Simplified system diagram.
2
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
ORDERING INFORMATION
PACKAGE
TEMPERATURE
RANGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
SOP005
NE56625-20D
SO8
plastic small outline package; 8 leads; body width 3.9 mm
–20 to +75 °C
PIN CONFIGURATION
TOP VIEW
C
1
2
3
4
8
7
6
5
RESET
T
BC
CLK
GND
V
S
R
CT
CC
V
SL01586
Figure 2. Pin configuration.
PIN DESCRIPTION
PIN
SYMBOL
DESCRIPTION
, t times are dependent on the value of external C capacitor used. See Figure 17 (Timing
1
C
t
, t
, t
, t adjustment pin.
T
WDM WDR PR
t
WDM WDR PR
T
Diagram) for definition of t
, t
, t times.
WDM WDR PR
2
3
4
5
6
BC
Battery check Active-LOW output.
Clock input pin from logic system for Watchdog timer.
Circuit ground.
CLK
GND
V
CC
Positive supply voltage.
R
Watchdog timer control pin.
The Watchdog timer is enabled when this pin is pulled-up to V with a resistor, and disabled when this pin
CT
CC
is connected to ground.
7
8
V
Detection threshold adjustment pin.
The detection threshold can be decreased by connecting this pin to V with a pull-up resistor. The
detection threshold can be increased by connecting this pin to ground with a pull-down resistor.
S
CC
RESET
Reset Active-LOW output.
MAXIMUM RATINGS
SYMBOL
PARAMETER
MIN.
–0.3
–0.3
–0.3
–0.3
–20
–40
–
MAX.
7
UNIT
V
V
V
V
V
Power supply voltage
pin voltage
CC
VS
V
S
7
V
CLK pin voltage
7
V
CLK
OH
RESET and BC pin voltage
Operating temperature
Storage temperature
Power dissipation
7
V
T
+75
+125
300
°C
°C
mW
oper
T
stg
P
3
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
RATING
1.9 to 6.5
0 to 500
0 to 5.0
< 1.0
UNIT
V
V
Power supply voltage
RESET sink current
CC
I
µA
mA
V
OLR
OLC
I
BC sink current
V
V
HIGH-level clock input voltage
LOW-level clock input voltage
Clock monitoring time
Clock rise and fall times
CKH
< 0.2
V
CKL
t
t
t
t
1 to 10,000
< 100
ms
µs
µs
µs
°C
WD
, t
r(CLK) f(CLK)
r(VCC)
Power supply voltage rise time
Power supply voltage fall time
Operating ambient temperature
TC capacitance
< 100
< 50
f(VCC)
T
–20 to +70
amb
C
0.0022 to 2.2
µF
T
DC ELECTRICAL CHARACTERISTICS
T
amb
= 25 °C, V = 2.6 V, unless otherwise specified.
CC
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
I
Supply current during Watchdog timer
operation
no load
–
0.7
1.0
mA
CC
V
RESET detection threshold
V
V
= falling; R : GND; V = open
1.94
–
2.0
2.06
V
SLR
CC
CT
S
∆V /∆T
Temperature coefficient of reset detection
voltage
–20 °C ≤ T ≤ 70 °C
amb
±0.01
±0.05
%/°C
SR
amb
V
V
RESET threshold hysteresis
Battery detection voltage
= falling; R : GND; V = open
25
2.13
–
50
100
2.27
mV
V
hysR
CC
CT
S
V
CC
= falling; R = 10 kΩ
2.20
±0.01
SLB
LB
∆V /∆T
Temperature coefficient of battery
detection voltage
±0.05
%/°C
SB
amb
V
Battery hysteresis voltage
V
= falling; R = 10 kΩ
25
175
0.8
–
50
200
1.2
0
100
225
2.0
1
mV
mV
V
hysB
CC
LB
∆V
Detection voltage difference
CLK input threshold
∆V = V
– V
SLB SLR
SL
SL
V
TH
I
IH
I
IL
HIGH-level CLK input current
LOW-level CLK input current
HIGH-level output voltage, RESET
HIGH-level output voltage, BC
LOW-level output voltage, RESET
LOW-level output voltage, BC
RESET output sink current
Battery Check output sink current
RESET output source current
V
CLK
= 2.6 V
µA
µA
V
V
CLK
= 0 V
–15
2.0
2.0
–
–6
–2
–
V
V
V
V
I
= –1.0 µA; V = open
2.2
2.2
0.3
0.3
700
7
OHR
OHB
OLR
OLB
OLR
OLB
OHR
CT1
RESET
S
R
= 10 kΩ
–
V
LB
I
= 500 µA; V = 1.8 V
0.5
0.5
–
V
RESET
CC
I
= 5 mA; V = 1.8 V
–
V
BC
CC
I
I
I
I
V
= 0.5 V; V = 1.8 V
500
5
µA
mA
µA
µA
RESET
CC
V
= 0.5 V; V = 1.8 V
–
BC
CC
V
= 2.0 V
2
4
–
RESET
V
CT
= 0.5 V;
–0.3
–0.15
–0.075
C charge current
T
during Watchdog operation
I
V
= 0.5 V;
–0.3
–
–0.15
0.8
–0.075
1.0
µA
CT2
CT
during power-on reset operation
V
Supply voltage to assert reset operation
V
= 0.4 V; I = 0.05 mA
V
CCL
RESET
RESET
4
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
AC ELECTRICAL CHARACTERISTICS
Characteristics measured with V = 2.6 V, and T
= 25 °C, unless otherwise specified.
CC
amb
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
t
P1
Minimum power supply pulse width for
detection
4.0 V ≤ negative-going V pulse ≤ 5.0 V
8.0
–
–
µs
CC
t
t
t
t
t
t
t
Clock input pulse width
3.0
20
50
1.0
50
–
–
–
–
µs
µs
CLKW
Clock input cycle
–
CLK
Watchdog monitoring time (Notes 1, 6)
Watchdog reset time (Notes 2, 6)
Power-on reset delay time (Notes 3, 6)
RESET propagation delay time (Note 4)
C = 0.022 µF; R = open
100
2.0
100
10
150
3.0
150
–
ms
ms
ms
µs
WDM
WDR
PR
T
CT
C = 0.022 µF
T
V
= rising from 0 V; C = 0.022 µF
T
CC
V
= falling; R = 100 kΩ; C = 15 pF
LR LR
PDR
PDB
CC
Battery Check propagation delay time
(Note 4)
V
= falling; R = 10 kΩ; C = 15 pF
–
10
–
µs
CC
LB
LB
t
t
t
t
RESET rise time (Note 5)
R
R
= 100 kΩ; C = 15 pF
–
–
–
–
10
2
–
–
–
–
µs
µs
µs
µs
RR
FR
RB
FB
LR
LR
LR
RESET fall time (Note 5)
= 100 kΩ; C = 15 pF
LR
Battery Check rise time (Note 5)
Battery Check fall time (Note 5)
R
= 10 kΩ; C = 15 pF
10
2
LB
LB
LB
R
= 10 kΩ; C = 15 pF
LB
NOTES:
1. ‘Watchdog monitoring time’ (t
) is the duration from the last pulse (negative-going edge) of the timer clear clock pulse until reset output
WDM
pulse occurs (see Figure 17). A reset signal is output if a clock pulse is not input during this time.
2. ‘Watchdog reset time’ (t ) is the reset pulse width. Do not confuse this with the power-on reset delay time (t ).
WDR
PR
3. The power-on reset delay or hold time is the duration measured from the time V exceeds the upper detection threshold (V
) and
SHR
CC
power-on reset release is experienced (RESET output HIGH).
4. ‘Reset response time’ is the duration from when the supply voltage sags below the lower detection threshold (V ) and reset occurs (RESET
SL
output LOW).
5. Reset rise and fall times and Battery Check rise and fall times are measured at 10% and 90% output levels.
6. Watchdog monitoring time (t
), Watchdog reset time (t ), and power-on reset delay time (t ) during power-on can be modified by
WDR PR
WDM
varying the C capacitance. The times can be approximated by applying the following formula. The recommended range for C is 0.0022 µF
T
T
to 2.2 µF.
Formula 1. Calculation for approximate t , t
, and t
values:
WDR
PR WDM
t
t
t
(ms) ≈ 4500 × C (µF)
T
PR
(ms) ≈ 4500 × C (µF)
WDM
WDR
T
(ms) ≈ 90 × C (µF)
T
Example: When C = 0.022 µF and R = open:
T
CT
t
≈ 100 ms
PR
t
t
≈ 100 ms
≈ 2.0 ms
WDM
WDR
5
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
TYPICAL PERFORMANCE CURVES
–2.95
180
V
= 2.4 V
CC
170
160
NO LOAD
–3.00
–3.05
150
140
130
–3.10
–3.15
–3.20
V
V
= 2.4 V
CC
= 0 V
CLK
120
110
–3.25
100
–25
0
25
50
75
100
–25
0
25
50
75
100
AMBIENT TEMPERATURE, T
(°C)
AMBIENT TEMPERATURE, T (°C)
amb
amb
SL01818
SL01819
Figure 3. Supply current versus ambient temperature.
Figure 4. LOW-level CLK input current versus
ambient temperature.
6
6
5
4
3
V
R
FALLING
= 10 kΩ
V
R
FALLING
CC
CC
LB
= 100 kΩ
LR
R
= GND
CT
= OPEN
5
4
3
V
S
T
amb
= –25 °C
T
amb
= –25 °C
T
amb
= +25 °C
T
amb
= +25 °C
2
1
0
2
1
0
T
= +75 °C
T
= +75 °C
amb
amb
T
amb
= +100 °C
T
amb
= +100 °C
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE, V (V)
SUPPLY VOLTAGE, V (V)
CC
CC
SL01820
SL01821
Figure 5. Battery detection votlage versus supply voltage.
Figure 6. RESET detection voltage versus supply voltage.
600
2.50
T
amb
= –25 °C
T
amb
= –25 °C
500
400
300
T
= +25 °C
amb
2.00
1.50
T
= +25 °C
amb
T
= +75 °C
amb
T
amb
= +75 °C
T
amb
= +100 °C
1.00
0.50
0.00
200
100
0
T
amb
= +100 °C
I
R
V
= 1 µA
= 10 kΩ
= OPEN
RESET
LB
S
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
SUPPLY VOLTAGE, V (V)
HIGH-LEVEL OUTPUT CURRENT, I
(µA)
OH
CC
SL01822
SL01823
Figure 7. Supply current versus supply voltage.
Figure 8. HIGH-level output voltage versus
HIGH-level output current
6
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
1.0
0.9
0.8
1.2
I
= 5 mA
= 0.5 V
I
= 500 µA
BC
RESET
V
V
V
V
V
= 0.5 V
BC
RESET
1.0
0.8
0.6
= 2.0 V
= 2.0 V
CC
CC
T
= +100 °C
amb
= 0 V
S
0.7
0.6
T
amb
= +75 °C
0.5
0.4
T
amb
= +75 °C
T
amb
= +100 °C
0.4
0.2
0.0
0.3
0.2
T
amb
= +25 °C
T
amb
= +25 °C
0.1
T
amb
= –25 °C
T
amb
= –25 °C
0.0
0
2
4
6
8
10
12
14
16
18
20
0.0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
(mA)
2.7
3.0
BATTERY CHECK OUTPUT SINK CURRENT, I
(mA)
RESET OUTPUT SINK CURRENT, I
OLB
OLR
SL01824
SL01825
Figure 9. Battery check LOW-level output voltage versus
battery check output sink current
Figure 10. LOW-level RESET output voltage versus
RESET output sink current.
2.40
2.35
200
180
V
SHB
∆V
SL
160
2.30
2.25
2.20
2.15
2.10
2.05
V
SLB
140
120
100
V
SHR
80
60
40
20
V
V
HYSB
HYSR
V
SLR
–25
0
25
50
75
100
–25
0
25
50
75
100
AMBIENT TEMPERATURE, T
(°C)
AMBIENT TEMPERATURE, T (°C)
amb
amb
SL01826
SL01827
Figure 11. RESET and battery detection voltages versus
temperature.
Figure 12. RESET and battery hysteresis voltages versus
temperature.
95
100
V
= 2.4 V
= 0.022 µF
= OPEN
CC
V
C
V
= 2.4 V
= 0.022 µF
rising from 0 V to 2.4 V
CC
T
CC
C
T
90
85
80
75
70
65
60
R
CT
80
60
40
20
–25
0
25
50
75
100
–25
0
25
50
75
100
AMBIENT TEMPERATURE, T
(°C)
AMBIENT TEMPERATURE, T (°C)
amb
amb
SL01828
SL01829
Figure 13. Power-on reset delay time versus temperature.
Figure 14. Watchdog monitoring time versus temperature.
7
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
V
= 2.4 V
CC
1.1
1.0
C
= 0.022 µF
T
–25
0
25
50
75
100
AMBIENT TEMPERATURE, T
(°C)
amb
SL01830
Figure 15. Watchdog reset delay time versus temperature.
8
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
The Watchdog timer requires a pulse input. Normally this signal
comes from the system microprocessor’s clock. For operation, pin 6
TECHNICAL DESCRIPTION
The NE56625-20 combines a Watchdog timer, a Battery Check and
an Undervoltage Reset functions in a single SO8 surface mount
package. This provides a space-saving solution for maintaining
proper operation of typical 2.0 volt cordless telephone and other low
voltage portable, handheld communication and industrial equipment.
is not connected (open) or an external resistor (R ) of 1 MΩ or
CT
greater is connected from Pin 6 to V and an external capacitor
CC
(C ) is placed from Pin 1 to ground. The recommended range for C
T
T
capacitor is 2.2 nF to 2.2 µF. The external R resistor and C
CT
T
capacitor establish the required minimum frequency of Watchdog
input signal for the device to not output a reset signal. The R
While the Watchdog monitors the microprocessor operation, the
Battery Check and Undervoltage Reset monitor the supply voltage
to the microprocessor. If the microprocessor clock signal ceases or
becomes erratic, the NE56625-20 outputs a reset signal to the
microprocessor. If the microprocessor supply voltage sags to
2.0 volts or less, the NE56625-20 outputs a reset signal for the
duration of the supply voltage deficiency. The Undervoltage Reset
signal allows the microprocessor to shut down in an orderly manner
to avoid system corruption. In addition to a RESET output, the
NE56625-20 has a Battery Check output for system use. If the
supply voltage sags below 2.2 volts or less, the Battery Check
output goes LOW and remains LOW until the supply voltage
recovers. Both the undervoltage detection threshold and battery
check detection threshold incorporate hysteresis to prevent
generating erratic resets.
CT
resistor establishes, in part, the rate of charge of the C capacitor. In
T
the absence of a Watchdog input pulse, the C capacitor charges to
T
the 0.2 volt threshold of the internal comparator, causing a reset
signal to be output. If microprocessor clock signals are received
within the required interval, no Watchdog reset signal will be output.
The Watchdog function can be disabled by grounding Pin 6 without
affecting the undervoltage detection function.
Although the temperature coefficient of detection threshold is
specified over a temperature of –20 °C to +70 °C, the device will
support operation in excess of this temperature range. See the
supporting curves for performance over the full temperature range of
–25 °C to +100 °C. Some degradation in performance will be
experienced at the temperature extremes and the system designer
should take this into account.
V
CC
R
CT
V
2
BC
6
R
CT
5
CC
C
230 kΩ
0.1 V
1 µA
(typ.)
Q
S
R
V
S
7
S
R
Q
1.25 V (typ.)
Q
S
R
250 kΩ
C
0.2 V
PULSE
GENERATOR
CLK
3
1
4
8
GND
C
T
RESET
SL01594
Figure 16. Functional diagram.
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2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
Timing diagram
The timing diagram shown in Figure 17 depicts the operation of the
device. Letters indicate events on the TIME axis.
within normal operating range. V continues to sag until the V
CC SLB
battery check undervoltage threshold is reached. At that time (G),
BC output goes LOW. V sags still further until V reset
CC
SLR
A: At start-up ‘A’, the V voltage begins to rise. Also the RESET
and Battery Check (BC) voltages initially rise, but then abruptly
return to a LOW state. This is due to V reaching the level of 0.8 V
that activates the internal bias circuitry, asserting RESET and BC.
CC
undervoltage threshold is reached. At this point (H), reset is
asserted and RESET goes LOW. Between ‘H’ and ‘I’, V starts to
CC
CC
rise, however, C voltage does not start to ramp up until ‘I’, when
T
V
CC
reaches the V
upper reset threshold. Also, the RESET
SHR
delay is initiated.
B: Just before ‘B’, the C voltage starts to ramp up. This is caused
T
by, and coincident to, V reaching the threshold level of V
. At
SHR
CC
J–K: At ‘J’, the BC output goes HIGH when V rises to V
.
SHB
CC
this level the device initiates the RESET delay time, t
. V
CC
PLH
Between ‘J’ and ‘K, C reaches the upper threshold level again. At
T
continues to rise above V
.
SHR
‘K’, RESET delay time elapses and the reset is released and
RESET goes HIGH.
C: At ‘C’, V rises to the threshold level of V
, the upper
SHB
CC
voltage BC detection threshold. At this level, the BC output goes
L–M: From ‘L’ to ‘M’, the R is shorted to ground. This disables
CT
HIGH. BC output follows V to its normal operating level.
CC
the Watchdog timer by shorting C to ground. At other times R is
T
CT
open or taken to V with a resistor of 1 MΩ or greater. This
D: At ‘D’, V is above the undervoltage detect threshold and C
CC
CC
T
configuration enables the Watchdog timer.
has ramped up to its upper detect level. At this point, an internal
ramp discharge transistor activates, discharging C . Reset assertion
is still in effect since the delay time has not elapsed.
T
N: After ‘N’, normal CLK signals are received, but at a lower
frequency than those following event ‘D’. The frequency is above the
minimum frequency required to keep the device from outputting
reset signals.
E: At ‘E’, the delay time has elapsed and the device removes the
hold on the reset. RESET goes HIGH.
O–P: At ‘O’, V is normal, CLK signals are being received, and
In a microprocessor based system these events remove the reset
from the microprocessor, allowing it to function normally. The system
must send clock signals to the Watchdog Timer often enough to
CC
no reset signals are output. At event ‘P’, the V starts falling,
CC
causing RESET and BC to also fall.
prevent C from ramping up to the C threshold, to prevent reset
signals from being generated. Each clock signal discharges C .
T
T
T
Q: At event ‘Q’ V sags to the point where the V
threshold point is reached, and at that level reset signal is outputted
(RESET to a LOW state).
undervoltage
SLR
CC
E–F: Midway between ‘E’ and ‘F’, the CLK signals cease allowing
the C voltage to ramp up to its RESET threshold at ‘F’. At this time
reset signals are generated (RESET goes LOW). The device
T
R: At event ‘R’ the V voltage has deteriorated to a level where
normal internal circuit bias is no longer able to maintain a RESET,
and as a result may exhibit a slight rise to something less than 0.8 V.
CC
attempts to come out of reset as the C voltage is discharged, and
T
finally does come out of reset when CLK signals are reestablished
As V decays even further, RESET also decreases to zero.
CC
after two attempts of C .
T
G–I: Immediately before ‘G’, falling V causes the RESET and
CC
BC outputs to sag. CLK signals are still being received, and C is
T
10
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
V
V
V
SHB
SLB
SHR
V
CC
V
SLR
0.8 V
t
CLKW
t
CLK
CLK
C
T
t
WDM
t
PR
RESET
t
WDR
BC
R
CT
OPEN
F
A
B C
D E
G H I J
K
L
M
N
O
PQ
R
SL01592
Figure 17. Timing diagram.
11
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
The Reset Detection Threshold can be increased by connecting an
APPLICATION INFORMATION
external resistor R from Pin 7 to ground, as shown in Figure 18.
1
See Figure 19 to determine the approximate value of R to use. The
threshold made be varied somewhat linearly from 2.4 V to 3.0 V.
Detection threshold
1
The detection threshold voltage can be adjusted by externally
influencing the internal divider reference voltage. Figures 18 and 20
show a method to raise and lower the threshold voltage. Figures 19
and 21 show the influence of the pull-down and pull-up resistors on
the threshold voltage. The use of a capacitor (1000 pF or larger)
from pin 7 to ground is recommended to filter out noise from being
imposed on the threshold voltages.
The Reset Detection Threshold can be decreased by connecting an
external resistor R from Pin 7 to V , as shown in Figure 20. See
2
CC
Figure 21 to determine the approximate value of R to use. The
2
lower thresholds may be varied in a linear fashion from 1.85 V to
1.65 V.
V
CC
3.1
LOGIC SYSTEM
T
amb
= 25 °C
3.0
RESET
8
7
6
5
1
2
3
4
2.9
2.8
CLK
NMI
2.7
2.6
2.5
2.4
C
T
GND
V
SHR
R
2
1000 pF
V
SLR
2.3
200
300
400
500
600
700
800
900
R , EXTERNAL PIN 7 TO GROUND RESISTOR (kΩ)
1
SL01588
SL01590
Figure 18. Circuit to raise detection threshold.
Figure 19. Reset detection threshold versus external R .
1
V
CC
1.9
LOGIC SYSTEM
T
amb
= 25 °C
R
1
RESET
CLK
8
7
6
5
1
2
3
4
V
SHR
1.8
1.7
V
SLR
NMI
C
T
GND
1000 pF
1.6
200
300
400
500
600
700
800
900
R , EXTERNAL PIN 7 TO V
2
RESISTOR (kΩ)
CC
SL01589
SL01591
Figure 20. Circuit to lower detection threshold.
Figure 21. Reset detection threshold versus external R .
2
12
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
Watchdog monitoring time
The Watchdog timer’s external component values are critical to its
performance.
100
80
C
T
= 0.0022 µF
= 25 °C
T
amb
The values of R and C affect the Watchdog monitoring time
CT
T
(t
WDM
), the Watchdog reset time (t
), and power-on reset delay
WDR
time (t ). See Formula 1 in the AC Electrical Characteristics and
60
PR
the timing diagram shown in Figure 17 for parameter definitions.
The effect of RCT on the Watch-Dog Timer Monitoring Time at room
temperature for CT = 0.0022 µF is shown in Figure 22.
40
20
0
∞
10k
100k
1M
10M
100M
R
, WATCHDOG TIMER CURRENT RESISTOR (Ω)
CT
SL01587
Figure 22. Watchdog monitoring vs. pull-up resistor R
.
CT
PACKING METHOD
The NE56625-20 is packed in reels, as shown in Figure 23.
GUARD
BAND
TAPE
TAPE DETAIL
REEL
ASSEMBLY
COVER TAPE
CARRIER TAPE
BARCODE
LABEL
BOX
SL01305
Figure 23. Tape and reel packing method.
13
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOP005
14
2003 Oct 15
Philips Semiconductors
Product data
System reset with Watchdog timer
NE56625-20
REVISION HISTORY
Rev
Date
Description
_2
20031015
Product data (9397 750 12124). ECN 853-2327 30314 of 08 September 2003.
Supersedes data of 2002 Mar 25 (9397 750 09645).
Modifications:
• Change package version to SOP005 in Ordering information and Package outline sections.
_1
20020325
Product data (9397 750 09645). ECN 853-2327 27919 of 25 March 2002.
Data sheet status
Product
status
Definitions
[1]
Level
Data sheet status
[2] [3]
I
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,
copyright, or mask work right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2003
Contact information
All rights reserved. Printed in U.S.A.
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 10-03
9397 750 12124
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
Philips
Semiconductors
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