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NTB0104D [NXP]

Dual supply translating transceiver; auto direction sensing; 3-state; 双电源转换收发器;自动方向感应;三态
NTB0104D
型号： NTB0104D
厂家： NXP    NXP
描述：

Dual supply translating transceiver; auto direction sensing; 3-state
双电源转换收发器;自动方向感应;三态

总线驱动器 总线收发器 逻辑集成电路 光电二极管
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NTB0104  
Dual supply translating transceiver; auto direction sensing;  
3-state  
Rev. 1 — 26 October 2010  
Product data sheet  
1. General description  
The NTB0104 is a 4-bit, dual supply translating transceiver with auto direction sensing,  
that enables bidirectional voltage level translation. It features two data input-output ports  
(An and Bn), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A)  
can be supplied at any voltage between 1.2 V and 3.6 V and VCC(B) can be supplied at any  
voltage between 1.65 V and 5.5 V, making the device suitable for translating between any  
of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V).  
Pins An and OE are referenced to VCC(A) and pins Bn are referenced to VCC(B). A LOW  
level at pin OE causes the outputs to assume a high-impedance OFF-state. This device is  
fully specified for partial power-down applications using IOFF. The IOFF circuitry disables  
the output, preventing the damaging backflow current through the device when it is  
powered down.  
2. Features and benefits  
„ Wide supply voltage range:  
‹ VCC(A): 1.2 V to 3.6 V and VCC(B): 1.65 V to 5.5 V  
„ IOFF circuitry provides partial Power-down mode operation  
„ Inputs accept voltages up to 5.5 V  
„ ESD protection:  
‹ HBM JESD22-A114E Class 2 exceeds 2500 V for A port  
‹ HBM JESD22-A114E Class 3B exceeds 15000 V for B port  
‹ MM JESD22-A115-A exceeds 200 V  
‹ CDM JESD22-C101E exceeds 1500 V  
„ Latch-up performance exceeds 100 mA per JESD 78B Class II  
„ Multiple package options  
„ Specified from −40 °C to +85 °C and −40 °C to +125 °C  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature  
range  
Name  
Description  
Version  
NTB0104D  
−40 °C to +125 °C SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
SOT402-1  
NTB0104PW  
NTB0104BQ  
−40 °C to +125 °C TSSOP14  
plastic thin shrink small outline package; 14 leads;  
body width 4.4 mm  
−40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1  
thin quad flat package; no leads; 14 terminals;  
body 2.5 × 3 × 0.85 mm  
NTB0104GU16  
NTB0104GU12  
−40 °C to +125 °C XQFN16  
−40 °C to +125 °C XQFN12  
plastic, extremely thin quad flat package; no leads;  
16 terminals; body 1.80 × 2.60 × 0.50 mm  
SOT1161-1  
SOT1174  
plastic, extremely thin quad flat package; no leads;  
12 terminals; body 1.70 × 2.0 × 0.50 mm  
4. Marking  
Table 2.  
Marking  
Type number  
NTB0104D  
Marking code  
NTB0104D  
NTB0104  
B0104  
NTB0104PW  
NTB0104BQ  
NTB0104GU16  
NTB0104GU12  
t4  
t4  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
2 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
5. Functional diagram  
OE  
A1  
B1  
B2  
B3  
B4  
A2  
A3  
A4  
V
CC(A)  
V
CC(B)  
001aam795  
Fig 1. Logic symbol  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
3 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
6. Pinning information  
6.1 Pinning  
NTB0104  
terminal 1  
index area  
NTB0104  
2
3
4
5
6
13  
12  
11  
10  
9
A1  
A2  
B1  
B2  
B3  
B4  
n.c.  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
V
V
CC(B)  
CC(A)  
A1  
B1  
B2  
B3  
B4  
n.c.  
OE  
A3  
A2  
A3  
(1)  
A4  
GND  
n.c.  
A4  
n.c.  
GND  
001aam797  
8
Transparent top view  
001aam796  
(1) This is not a supply pin, the substrate is attached to this  
pad using conductive die attach material. There is no  
electrical or mechanical requirement to solder this pad  
however if it is soldered the solder land should remain  
floating or be connected to GND.  
Fig 2. Pin configuration SO14 (SOT108-1) and  
TSSOP14 (SOT402-1)  
Fig 3. Pin configuration DHVQFN14 (SOT762-1)  
terminal 1  
index area  
NTB0104  
terminal 1  
index area  
A1  
A2  
A3  
A4  
1
2
3
4
12 B1  
11 B2  
10 B3  
V
CC(A)  
1
2
3
4
5
11  
V
CC(B)  
A1  
10 B1  
NTB0104  
A2  
A3  
A4  
9
8
7
B2  
B3  
9
B4  
B4  
001aam798  
001aam799  
Transparent top view  
Transparent top view  
Fig 4. Pin configuration XQFN16 (SOT1161-1)  
Fig 5. Pin configuration XQFN12 (SOT1174)  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
4 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
6.2 Pin description  
Table 3.  
Symbol  
Pin description  
Pin  
Description  
SOT108-1,SOT402-1 SOT1161-1 SOT1174  
and SOT762-1  
VCC(A)  
1
16  
1
supply voltage A  
A1, A2, A3, A4 2, 3, 4, 5  
1, 2, 3, 4  
5, 14, 15  
6, 7  
2, 3, 4, 5 data input or output (referenced to VCC(A))  
n.c.  
GND  
OE  
6, 9  
7
-
not connected  
ground (0 V)  
6
8
8
12  
output enable input (active HIGH; referenced to VCC(A))  
B4, B3, B2, B1 10, 11, 12, 13  
VCC(B) 14  
9, 10, 11, 12 7, 8, 9, 10 data input or output (referenced to VCC(B)  
13 11 supply voltage B  
)
7. Functional description  
Table 4.  
Function table[1]  
Supply voltage  
VCC(A)  
Input  
Input/output  
VCC(B)  
OE  
L
An  
Bn  
1.2 V to VCC(B)  
1.2 V to VCC(B)  
GND[2]  
1.65 V to 5.5 V  
1.65 V to 5.5 V  
GND[2]  
Z
Z
H
input or output  
Z
output or input  
Z
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.  
[2] When either VCC(A) or VCC(B) is at GND level, the device goes into power-down mode.  
8. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC(A)  
VCC(B)  
VI  
Parameter  
Conditions  
Min  
−0.5  
−0.5  
−0.5  
−0.5  
−0.5  
−50  
−50  
-
Max  
Unit  
V
supply voltage A  
supply voltage B  
input voltage  
+6.5  
+6.5  
V
[1]  
[1][2][3]  
[1]  
+6.5  
V
VO  
output voltage  
Active mode  
VCCO + 0.5  
V
Power-down or 3-state mode  
VI < 0 V  
+6.5  
-
V
IIK  
input clamping current  
output clamping current  
output current  
mA  
mA  
mA  
mA  
mA  
°C  
IOK  
IO  
VO < 0 V  
-
[2]  
VO = 0 V to VCCO  
ICC(A) or ICC(B)  
±50  
100  
-
ICC  
IGND  
Tstg  
supply current  
-
ground current  
−100  
−65  
storage temperature  
+150  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
5 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
Table 5.  
Limiting values …continued  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
[4]  
Ptot  
total power dissipation  
Tamb = −40 °C to +125 °C  
-
250  
mW  
[1] The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] VCCO is the supply voltage associated with the output.  
[3] VCCO + 0.5 V should not exceed 6.5 V.  
[4] For SO14 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.  
For TSSOP14 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.  
For DHVQFN14 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K.  
For XQFN12 packages: above 128 °C the value of Ptot derates linearly with 11.5 mW/K.  
For XQFN16 packages: above 135 the value of Ptot derates linearly at 16.9 mW/K.  
9. Recommended operating conditions  
Table 6.  
Symbol  
VCC(A)  
VCC(B)  
VI  
Recommended operating conditions[1][2]  
Parameter  
Conditions  
Min  
1.2  
1.65  
0
Max  
3.6  
Unit  
V
supply voltage A  
supply voltage B  
input voltage  
5.5  
5.5  
V
V
VO  
output voltage  
Power-down or 3-state mode;  
VCC(A) = 1.2 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
A port  
B port  
0
3.6  
V
0
5.5  
V
Tamb  
ambient temperature  
−40  
+125  
40  
°C  
ns/V  
Δt/ΔV  
input transition rise and fall rate VCC(A) = 1.2 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
-
[1] The A and B sides of an unused I/O pair must be held in the same state, both at VCCI or both at GND.  
[2] VCC(A) must be less than or equal to VCC(B)  
.
10. Static characteristics  
Table 7.  
Typical static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 °C.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
VOH  
VOL  
II  
HIGH-level  
output voltage  
A port; VCC(A) = 1.2 V; IO = −20 μA  
-
1.1  
-
V
LOW-level  
output voltage  
A port; VCC(A) = 1.2 V; IO = 20 μA  
-
-
-
0.09  
-
V
input leakage  
current  
OE input; VI = 0 V to 3.6 V; VCC(A) = 1.2 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
-
-
±1  
±1  
μA  
μA  
[1]  
IOZ  
OFF-stateoutput A or B port; VO = 0 V to VCCO; VCC(A) = 1.2 V to 3.6 V;  
current VCC(B) = 1.65 V to 5.5 V  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
6 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
Table 7.  
Typical static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 °C.  
Symbol Parameter  
IOFF power-off  
Conditions  
Min  
Typ  
Max  
Unit  
A port; VI or VO = 0 V to 3.6 V;  
-
-
±1  
μA  
leakage current VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V  
B port; VI or VO = 0 V to 5.5 V;  
-
-
±1  
μA  
VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V  
[2]  
ICC  
supply current  
VI = 0 V or VCCI; IO = 0 A  
ICC(A); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V  
ICC(B); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V  
ICC(A) + ICC(B); VCC(A) = 1.2 V; VCC(B) = 1.65 V to 5.5 V  
OE input; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V  
-
-
-
-
0.05  
3.3  
-
-
-
-
μA  
μA  
μA  
pF  
3.5  
2.8  
CI  
input  
capacitance  
CI/O  
input/output  
capacitance  
A port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V  
B port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V  
-
-
4.0  
7.5  
-
-
pF  
pF  
[1] VCCO is the supply voltage associated with the output.  
[2] VCCI is the supply voltage associated with the input.  
Table 8.  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
−40 °C to +85 °C  
−40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
[1]  
[1]  
[2]  
VIH  
HIGH-level  
input voltage  
A or B port and OE input  
VCC(A) = 1.2 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
0.65VCCI  
-
0.65VCCI  
-
V
V
VIL  
LOW-level  
input voltage  
A or B port and OE input  
VCC(A) = 1.2 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
-
0.35VCCI  
-
0.35VCCI  
VOH  
HIGH-level  
IO = −20 μA  
output voltage  
A port; VCC(A) = 1.4 V to 3.6 V  
B port; VCC(B) = 1.65 V to 5.5 V  
IO = 20 μA  
VCCO − 0.4  
VCCO − 0.4  
-
-
VCCO − 0.4  
VCCO − 0.4  
-
-
V
V
[2]  
VOL  
LOW-level  
output voltage  
A port; VCC(A) = 1.4 V to 3.6 V  
B port; VCC(B) = 1.65 V to 5.5 V  
-
-
-
0.4  
0.4  
±2  
-
-
-
0.4  
0.4  
±5  
V
V
II  
input leakage OE input; VI = 0 V to 3.6 V;  
μA  
current  
VCC(A) = 1.2 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
[2]  
IOZ  
OFF-state  
A or B port; VO = 0 V or VCCO  
;
-
±2  
-
±10  
μA  
output current VCC(A) = 1.2 V to 3.6 V;  
CC(B) = 1.65 V to 5.5 V  
V
IOFF  
power-off  
leakage  
current  
A port; VI or VO = 0 V to 3.6 V;  
VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V  
-
-
±2  
±2  
-
-
±10  
±10  
μA  
μA  
B port; VI or VO = 0 V to 5.5 V;  
VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
7 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
Table 8.  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter Conditions −40 °C to +85 °C  
−40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
[1]  
ICC  
supply current VI = 0 V or VCCI; IO = 0 A  
ICC(A)  
OE = LOW;  
VCC(A) = 1.4 V to 3.6 V;  
-
-
5
5
-
-
15  
20  
μA  
μA  
VCC(B) = 1.65 V to 5.5 V  
OE = HIGH;  
VCC(A) = 1.4 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
V
CC(A) = 3.6 V; VCC(B) = 0 V  
-
-
2
-
-
15  
μA  
μA  
VCC(A) = 0 V; VCC(B) = 5.5 V  
ICC(B)  
−2  
−15  
OE = LOW;  
VCC(A) = 1.4 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
-
-
5
5
-
-
15  
20  
μA  
μA  
OE = HIGH;  
VCC(A) = 1.4 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
VCC(A) = 3.6 V; VCC(B) = 0 V  
VCC(A) = 0 V; VCC(B) = 5.5 V  
CC(A) + ICC(B)  
-
-
−2  
-
-
−15  
μA  
μA  
2
15  
I
VCC(A) = 1.4 V to 3.6 V;  
VCC(B) = 1.65 V to 5.5 V  
-
10  
-
40  
μA  
[1] VCCI is the supply voltage associated with the input.  
[2] VCCO is the supply voltage associated with the output.  
11. Dynamic characteristics  
Table 9.  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for waveforms see Figure 6 and Figure 7.  
Typical dynamic characteristics for temperature 25 °C[1]  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.8 V  
2.5 V  
3.3 V  
5.0 V  
VCC(A) = 1.2 V; Tamb = 25 °C  
tpd  
propagation delay A to B  
5.9  
5.6  
0.5  
8.3  
10.4  
81  
4.8  
4.8  
0.5  
8.3  
9.4  
69  
4.4  
4.5  
0.5  
8.3  
9.3  
83  
4.2  
4.4  
0.5  
8.3  
8.8  
68  
ns  
ns  
μs  
ns  
ns  
ns  
ns  
ns  
ns  
B to A  
ten  
enable time  
disable time  
OE to A, B  
[2]  
[2]  
tdis  
OE to A; no external load  
OE to B; no external load  
OE to A  
OE to B  
81  
69  
83  
68  
tt  
transition time  
A port  
4.0  
2.6  
4.0  
2.0  
4.1  
1.7  
4.1  
1.4  
B port  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
8 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
Table 9.  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for waveforms see Figure 6 and Figure 7.  
Typical dynamic characteristics for temperature 25 °C[1] …continued  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.8 V  
0.2  
15  
2.5 V  
0.2  
13  
3.3 V  
0.2  
13  
5.0 V  
0.2  
13  
[3]  
tsk(o)  
tW  
skew  
between channels  
data inputs  
ns  
pulse width  
data rate  
ns  
fdata  
70  
80  
80  
80  
Mbps  
[1] tpd is the same as tPLH and tPHL  
ten is the same as tPZL and tPZH  
tdis is the same as tPLZ and tPHZ  
tt is the same as tTHL and tTLH  
.
.
.
[2] Delay between OE going LOW and when the outputs are actually disabled.  
[3] Skew between any two outputs of the same package switching in the same direction.  
Table 10. Dynamic characteristics for temperature range −40 °C to +85 °C[1]  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7.  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V  
Min  
Max Min Max Min Max Min Max  
VCC(A) = 1.5 V ± 0.1 V  
tpd  
propagation  
delay  
A to B  
1.4  
0.9  
-
12.9  
14.2  
1.0  
12.9  
18.7  
320  
200  
5.1  
4.7  
0.5  
-
1.2  
0.7  
-
10.1  
12.0  
1.0  
12.9  
15.8  
260  
200  
5.1  
3.2  
0.5  
-
1.1  
0.4  
-
10.0  
11.7  
1.0  
12.9  
15.1  
260  
200  
5.1  
2.5  
0.5  
-
0.8  
0.3  
-
9.9 ns  
B to A  
13.7 ns  
1.0 μs  
12.9 ns  
14.4 ns  
280 ns  
200 ns  
5.1 ns  
2.7 ns  
0.5 ns  
ten  
enable time  
OE to A, B  
[2]  
[2]  
tdis  
disable time OE to A; no external load  
1.0  
1.0  
-
1.0  
1.0  
-
1.0  
1.0  
-
1.0  
1.0  
-
OE to B; no external load  
OE to A  
OE to B  
-
-
-
-
tt  
transition  
time  
A port  
0.9  
0.9  
-
0.9  
0.6  
-
0.9  
0.5  
-
0.9  
0.4  
-
B port  
[3]  
tsk(o)  
tW  
skew  
between channels  
data inputs  
pulse width  
data rate  
25  
-
25  
-
25  
-
25  
-
-
ns  
fdata  
40  
40  
40  
40 Mbps  
VCC(A) = 1.8 V ± 0.15 V  
tpd  
propagation  
delay  
A to B  
1.6  
1.5  
-
11.0  
12.0  
1.0  
1.4  
1.3  
-
7.7  
8.4  
1.0  
11.7  
14.5  
230  
200  
4.1  
3.2  
0.5  
-
1.3  
1.0  
-
6.8  
7.6  
1.0  
11.7  
13.7  
230  
200  
4.1  
2.5  
0.5  
-
1.2  
0.9  
-
6.5 ns  
7.1 ns  
1.0 μs  
11.7 ns  
12.7 ns  
230 ns  
200 ns  
4.1 ns  
2.7 ns  
0.5 ns  
B to A  
ten  
enable time  
OE to A, B  
[2]  
[2]  
tdis  
disable time OE to A; no external load  
1.0  
1.0  
-
11.7  
16.9  
260  
200  
4.1  
1.0  
1.0  
-
1.0  
1.0  
-
1.0  
1.0  
-
OE to B; no external load  
OE to A  
OE to B  
-
-
-
-
tt  
transition  
time  
A port  
0.8  
0.9  
-
0.8  
0.6  
-
0.8  
0.5  
-
0.8  
0.4  
-
B port  
4.7  
[3]  
tsk(o)  
tW  
skew  
between channels  
data inputs  
0.5  
pulse width  
20  
-
17  
17  
17  
-
ns  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
9 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
Table 10. Dynamic characteristics for temperature range −40 °C to +85 °C[1] …continued  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7.  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V  
Min  
Max Min Max Min Max Min Max  
fdata  
data rate  
-
49  
-
60  
-
60  
-
60 Mbps  
VCC(A) = 2.5 V ± 0.2 V  
tpd  
propagation  
delay  
A to B  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.1  
1.2  
-
6.3  
6.6  
1.0  
9.7  
12.9  
200  
200  
3.0  
3.2  
0.5  
-
1.0  
1.1  
-
5.2  
5.1  
1.0  
9.7  
12.0  
200  
200  
3.0  
2.5  
0.5  
-
0.9  
0.9  
-
4.7 ns  
4.4 ns  
1.0 μs  
9.7 ns  
11.0 ns  
200 ns  
200 ns  
3.0 ns  
2.7 ns  
0.5 ns  
B to A  
ten  
enable time  
OE to A, B  
[2]  
[2]  
tdis  
disable time OE to A; no external load  
1.0  
1.0  
-
1.0  
1.0  
-
1.0  
1.0  
-
OE to B; no external load  
OE to A  
OE to B  
-
-
-
tt  
transition  
time  
A port  
0.7  
0.7  
-
0.7  
0.5  
-
0.7  
0.4  
-
B port  
[3]  
tsk(o)  
tW  
skew  
between channels  
data inputs  
pulse width  
data rate  
12  
-
10  
-
10  
-
-
ns  
fdata  
85  
100  
100 Mbps  
VCC(A) = 3.3 V ± 0.3 V  
tpd  
propagation  
delay  
A to B  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9  
1.0  
-
4.7  
4.9  
1.0  
9.4  
11.3  
260  
200  
2.5  
2.5  
0.5  
-
0.8  
0.9  
-
4.0 ns  
3.8 ns  
1.0 μs  
9.4 ns  
10.4 ns  
260 ns  
200 ns  
2.5 ns  
2.7 ns  
0.5 ns  
B to A  
ten  
enable time  
OE to A, B  
[2]  
[2]  
tdis  
disable time OE to A; no external load  
1.0  
1.0  
-
1.0  
1.0  
-
OE to B; no external load  
OE to A  
OE to B  
-
-
tt  
transition  
time  
A port  
0.7  
0.5  
-
0.7  
0.4  
-
B port  
[3]  
tsk(o)  
tW  
skew  
between channels  
data inputs  
pulse width  
data rate  
10  
-
10  
-
-
ns  
fdata  
100  
100 Mbps  
[1] tpd is the same as tPLH and tPHL  
ten is the same as tPZL and tPZH  
.
.
tdis is the same as tPLZ and tPHZ  
.
tt is the same as tTHL and tTLH  
[2] Delay between OE going LOW and when the outputs are actually disabled.  
[3] Skew between any two outputs of the same package switching in the same direction.  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
10 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
Table 11. Dynamic characteristics for temperature range −40 °C to +125 °C[1]  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7.  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V  
Min  
Max Min Max Min Max Min Max  
VCC(A) = 1.5 V ± 0.1 V  
tpd  
propagation  
delay  
A to B  
1.4  
0.9  
-
15.9  
17.2  
1.0  
13.5  
19.9  
340  
220  
7.1  
6.5  
0.5  
-
1.2  
0.7  
-
13.1  
15.0  
1.0  
13.5  
16.8  
280  
220  
7.1  
5.2  
0.5  
-
1.1  
0.4  
-
13.0  
14.7  
1.0  
13.5  
16.1  
280  
220  
7.1  
4.8  
0.5  
-
0.8  
0.3  
-
12.9 ns  
B to A  
16.7 ns  
1.0 μs  
13.5 ns  
15.2 ns  
300 ns  
220 ns  
7.1 ns  
4.7 ns  
0.5 ns  
ten  
enable time  
OE to A, B  
[2]  
[2]  
tdis  
disable time OE to A; no external load  
1.0  
1.0  
-
1.0  
1.0  
-
1.0  
1.0  
-
1.0  
1.0  
-
OE to B; no external load  
OE to A  
OE to B  
-
-
-
-
tt  
transition  
time  
A port  
0.9  
0.9  
-
0.9  
0.6  
-
0.9  
0.5  
-
0.9  
0.4  
-
B port  
[3]  
tsk(o)  
tW  
skew  
between channels  
data inputs  
pulse width  
data rate  
25  
-
25  
-
25  
-
25  
-
-
ns  
fdata  
40  
40  
40  
40 Mbps  
VCC(A) = 1.8 V ± 0.15 V  
tpd  
propagation  
delay  
A to B  
1.6  
1.5  
-
14.0  
15.0  
1.0  
12.3  
18.1  
280  
220  
6.2  
5.8  
0.5  
-
1.4  
1.3  
-
10.7  
11.4  
1.0  
12.3  
15.3  
250  
220  
6.1  
5.2  
0.5  
-
1.3  
1.0  
-
9.8  
10.6  
1.0  
12.3  
14.5  
250  
220  
6.1  
4.8  
0.5  
-
1.2  
0.9  
-
9.5 ns  
10.1 ns  
1.0 μs  
12.3 ns  
13.5 ns  
250 ns  
220 ns  
6.1 ns  
4.7 ns  
0.5 ns  
B to A  
ten  
enable time  
OE to A, B  
[2]  
[2]  
tdis  
disable time OE to A; no external load  
1.0  
1.0  
-
1.0  
1.0  
-
1.0  
1.0  
-
1.0  
1.0  
-
OE to B; no external load  
OE to A  
OE to B  
-
-
-
-
tt  
transition  
time  
A port  
0.8  
0.9  
-
0.8  
0.6  
-
0.8  
0.5  
-
0.8  
0.4  
-
B port  
[3]  
tsk(o)  
tW  
skew  
between channels  
data inputs  
pulse width  
data rate  
22  
-
19  
-
19  
-
19  
-
-
ns  
fdata  
45  
55  
55  
55 Mbps  
VCC(A) = 2.5 V ± 0.2 V  
tpd  
propagation  
delay  
A to B  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.1  
1.2  
-
9.3  
9.6  
1.0  
10.1  
13.5  
220  
220  
5.0  
4.6  
0.5  
-
1.0  
1.1  
-
8.2  
8.1  
1.0  
10.1  
12.7  
220  
220  
5.0  
4.8  
0.5  
-
0.9  
0.9  
-
7.7 ns  
7.4 ns  
1.0 μs  
10.1 ns  
11.7 ns  
220 ns  
220 ns  
5.0 ns  
4.7 ns  
0.5 ns  
B to A  
ten  
enable time  
OE to A, B  
[2]  
[2]  
tdis  
disable time OE to A; no external load  
1.0  
1.0  
-
1.0  
1.0  
-
1.0  
1.0  
-
OE to B; no external load  
OE to A  
OE to B  
-
-
-
tt  
transition  
time  
A port  
0.7  
0.7  
-
0.7  
0.5  
-
0.7  
0.4  
-
B port  
[3]  
tsk(o)  
tW  
skew  
between channels  
data inputs;  
pulse width  
14  
13  
10  
-
ns  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
11 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
Table 11. Dynamic characteristics for temperature range −40 °C to +125 °C[1]  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8; for wave forms see Figure 6 and Figure 7.  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V  
Min  
Max Min Max Min Max Min Max  
fdata  
data rate  
-
-
-
75  
-
80  
-
100 Mbps  
VCC(A) = 3.3 V ± 0.3 V  
tpd  
propagation  
delay  
A to B  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9  
1.0  
-
7.7  
7.9  
1.0  
9.9  
12.1  
280  
220  
4.5  
4.1  
0.5  
-
0.8  
0.9  
-
7.0 ns  
6.8 ns  
1.0 μs  
9.9 ns  
10.9 ns  
280 ns  
220 ns  
4.5 ns  
4.7 ns  
0.5 ns  
B to A  
ten  
enable time  
OE to A, B  
[2]  
[2]  
tdis  
disable time OE to A; no external load  
1.0  
1.0  
-
1.0  
1.0  
-
OE to B; no external load  
OE to A  
OE to B  
-
-
tt  
transition  
time  
A port  
0.7  
0.5  
-
0.7  
0.4  
-
B port  
[3]  
tsk(o)  
tW  
skew  
between channels  
data inputs  
pulse width  
data rate  
10  
-
10  
-
-
ns  
fdata  
100  
100 Mbps  
[1] tpd is the same as tPLH and tPHL  
ten is the same as tPZL and tPZH  
.
.
tdis is the same as tPLZ and tPHZ  
.
tt is the same as tTHL and tTLH  
[2] Delay between OE going LOW and when the outputs are actually disabled.  
[3] Skew between any two outputs of the same package switching in the same direction.  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
12 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
Table 12. Typical power dissipation capacitance  
Voltages are referenced to GND (ground = 0 V).[1][2]  
Symbol Parameter  
Conditions  
VCC(A)  
1.8 V  
VCC(B)  
1.8 V  
Unit  
1.2 V  
1.8 V  
1.2 V  
5.0 V  
1.5 V  
1.8 V  
2.5 V  
2.5 V  
2.5 V  
5.0 V  
3.3 V  
3.3 V  
to  
5.0 V  
Tamb = 25 °C  
CPD  
power  
dissipation  
capacitance  
outputs enabled; OE = VCC(A)  
A port: (direction A to B)  
A port: (direction B to A)  
B port: (direction A to B)  
B port: (direction B to A)  
outputs disabled; OE = GND  
A port: (direction A to B)  
A port: (direction B to A)  
B port: (direction A to B)  
B port: (direction B to A)  
5
8
5
8
5
8
5
8
5
8
5
8
5
8
pF  
pF  
pF  
pF  
18  
13  
18  
16  
18  
12  
18  
12  
18  
12  
18  
12  
18  
13  
0.12  
0.01  
0.01  
0.07  
0.12  
0.01  
0.01  
0.09  
0.04  
0.01  
0.01  
0.07  
0.05  
0.01  
0.01  
0.07  
0.08  
0.01  
0.01  
0.05  
0.08  
0.01  
0.01  
0.09  
0.07 pF  
0.01 pF  
0.01 pF  
0.09 pF  
[1] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL × VCC2 × fo) = sum of the outputs.  
[2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.  
12. Waveforms  
V
I
An, Bn  
input  
V
M
GND  
t
t
PHL  
PLH  
V
OH  
90 %  
Bn, An  
output  
V
M
10 %  
V
OL  
t
t
THL  
TLH  
001aal918  
Measurement points are given in Table 13.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 6. The data input (An, Bn) to data output (Bn, An) propagation delay times  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
13 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
V
I
OE input  
V
M
GND  
t
t
PLZ  
PZL  
V
CCO  
output  
V
LOW-to-OFF  
OFF-to-LOW  
M
V
X
V
OL  
t
t
PHZ  
PZH  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
outputs  
enabled  
outputs  
disabled  
outputs  
enabled  
001aal919  
Measurement points are given in Table 13.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 7. Enable and disable times  
Table 13. Measurement points[1]  
Supply voltage  
VCCO  
Input  
Output  
VM  
VM  
VX  
VY  
1.2 V  
0.5VCCI  
0.5VCCI  
0.5VCCI  
0.5VCCI  
0.5VCCI  
0.5VCCI  
0.5VCCO  
0.5VCCO  
0.5VCCO  
0.5VCCO  
0.5VCCO  
0.5VCCO  
VOL + 0.1 V  
VOL + 0.1 V  
VOL + 0.15 V  
VOL + 0.15 V  
VOL + 0.3 V  
VOL + 0.3 V  
VOH − 0.1 V  
VOH − 0.1 V  
VOH − 0.15 V  
VOH − 0.15 V  
VOH − 0.3 V  
VOH − 0.3 V  
1.5 V ± 0.1 V  
1.8 V ± 0.15 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
5.0 V ± 0.5 V  
[1] VCCI is the supply voltage associated with the input and VCCO is the supply voltage associated with the output.  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
14 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
t
W
V
I
90 %  
negative  
pulse  
V
M
V
M
10 %  
0 V  
t
f
t
r
t
r
t
f
V
I
90 %  
positive  
pulse  
V
M
V
M
10 %  
0 V  
t
W
V
EXT  
V
CC  
R
L
L
V
V
O
I
G
DUT  
C
R
L
001aal920  
Test data is given in Table 14.  
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz; ZO = 50 Ω; dV/dt ≥ 1.0 V/ns.  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
VEXT = External voltage for measuring switching times.  
Fig 8. Test circuit for measuring switching times  
Table 14. Test data  
Supply voltage  
VCC(A) VCC(B)  
Input  
VI[1]  
Load  
CL  
VEXT  
[2]  
[3]  
Δt/ΔV  
RL  
tPLH, tPHL tPZH, tPHZ tPZL, tPLZ  
1.2 V to 3.6 V 1.65 V to 5.5 V VCCI  
≤ 1.0 ns/V  
15 pF  
50 kΩ, 1 MΩ open  
open  
2VCCO  
[1] VCCI is the supply voltage associated with the input.  
[2] For measuring data rate, pulse width, propagation delay and output rise and fall measurements, RL = 1 MΩ; for measuring enable and  
disable times, RL = 50 KΩ.  
[3] VCCO is the supply voltage associated with the output.  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
15 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
13. Application information  
13.1 Applications  
Voltage level-translation applications. The NTB0104 can be used to interface between  
devices or systems operating at different supply voltages. See Figure 9 for a typical  
operating circuit using the NTB0104.  
1.8 V  
3.3 V  
0.1 μF  
0.1 μF  
V
CC(A)  
V
CC(B)  
1.8 V  
3.3 V  
OE  
SYSTEM  
CONTROLLER  
A1  
A2  
A3  
A4  
B1  
SYSTEM  
B2  
B3  
B3  
NTB0104  
DATA  
DATA  
GND  
001aam800  
Fig 9. Typical operating circuit  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
16 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
13.2 Architecture  
The architecture of the NTB0104 is shown in Figure 10. The device does not require an  
extra input signal to control the direction of data flow from A to B or from B to A. In a static  
state, the output drivers of the NTB0104 can maintain a defined output level, but the  
output architecture is designed to be weak, so that they can be overdriven by an external  
driver when data on the bus starts flowing in the opposite direction. The output one shots  
detect rising or falling edges on the A or B ports. During a rising edge, the one shots turn  
on the PMOS transistors (T1, T3) for a short duration, accelerating the low-to-high  
transition. Similarly, during a falling edge, the one shots turn on the NMOS transistors (T2,  
T4) for a short duration, accelerating the high-to-low transition. During output transitions  
the typical output impedance is 70 Ω at VCCO = 1.2 V to 1.8 V, 50 Ω at VCCO = 1.8 V to  
3.3 V and 40 Ω at VCCO = 3.3 V to 5.0 V.  
V
CC(A)  
V
CC(B)  
ONE  
SHOT  
T1  
4 kΩ  
T2  
ONE  
SHOT  
B
A
ONE  
SHOT  
T3  
4 kΩ  
T4  
ONE  
SHOT  
001aal921  
Fig 10. Architecture of NTB0104 I/O cell (one channel)  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
17 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
13.3 Input driver requirements  
For correct operation, the device driving the data I/Os of the NTB0104 must have a  
minimum drive capability of ±2 mA See Figure 11 for a plot of typical input current versus  
input voltage.  
I
I
V /4 kΩ  
T
V
I
−(V − V )/4 kΩ  
D
T
001aal922  
VT: input threshold voltage of the NTB0104 (typically VCCI / 2).  
VD: supply voltage of the external driver.  
Fig 11. Typical input current versus input voltage graph  
13.4 Power up  
During operation VCC(A) must never be higher than VCC(B), however during power-up  
VCC(A) ≥ VCC(B) does not damage the device, so either power supply can be ramped up  
first. There is no special power-up sequencing required. The NTB0104 includes circuitry  
that disables all output ports when either VCC(A) or VCC(B) is switched off.  
13.5 Enable and disable  
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all  
I/Os to assume the high-impedance OFF-state. The disable time (tdis with no external  
load) indicates the delay between when OE goes LOW and when outputs actually  
become disabled. The enable time (ten) indicates the amount of time the user must allow  
for one one-shot circuitry to become operational after OE is taken HIGH. To ensure the  
high-impedance OFF-state during power-up or power-down, pin OE should be tied to  
GND through a pull-down resistor, the minimum value of the resistor is determined by the  
current-sourcing capability of the driver.  
13.6 Pull-up or pull-down resistors on I/O lines  
As mentioned previously the NTB0104 is designed with low static drive strength to drive  
capacitive loads of up to 70 pF. To avoid output contention issues, any pull-up or  
pull-down resistors used must be kept higher than 50 kΩ. For this reason the NTB0104 is  
not recommended for use in open drain driver applications such as 1-Wire or I2C. For  
these applications, the NTS0104 level translator is recommended.  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
18 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
14. Package outline  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
D
E
A
X
v
c
y
H
M
A
E
Z
8
14  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
7
e
detail X  
w
M
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
8.75  
8.55  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.75  
1.27  
0.05  
1.05  
0.25  
0.01  
0.25  
0.1  
0.25  
0.01  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.35  
0.014 0.0075 0.34  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches  
0.041  
0.01 0.004  
0.069  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT108-1  
076E06  
MS-012  
Fig 12. Package outline SOT108-1 (SO14)  
NTB0104  
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© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
19 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
7
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.72  
0.38  
mm  
1.1  
0.65  
0.25  
1
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT402-1  
MO-153  
Fig 13. Package outline SOT402-1 (TSSOP14)  
NTB0104  
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© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
20 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
14 terminals; body 2.5 x 3 x 0.85 mm  
SOT762-1  
B
A
D
A
A
1
E
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
6
L
1
7
8
E
h
e
14  
13  
9
D
h
X
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
h
h
1
max.  
0.05 0.30  
0.00 0.18  
3.1  
2.9  
1.65  
1.35  
2.6  
2.4  
1.15  
0.85  
0.5  
0.3  
mm  
0.05  
0.1  
1
0.2  
0.5  
2
0.1  
0.05  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-10-17  
03-01-27  
SOT762-1  
- - -  
MO-241  
- - -  
Fig 14. Package outline SOT762-1 (DHVQFN14)  
NTB0104  
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© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
21 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
XQFN16: plastic, extremely thin quad flat package; no leads;  
16 terminals; body 1.80 x 2.60 x 0.50 mm  
SOT1161-1  
X
D
B
A
E
terminal 1  
index area  
A
A
1
A
3
detail X  
e
1
C
v
w
C A  
C
B
e
b
y
1
y
C
5
8
L
4
1
9
e
e
2
12  
terminal 1  
index area  
16  
13  
L
1
0
1
2 mm  
scale  
Dimensions  
(1)  
Unit  
A
A
1
A
3
b
D
E
e
e
1
e
2
L
L
1
v
w
y
y
1
max 0.5 0.05  
mm nom  
min  
0.25 1.9 2.7  
0.127 0.20 1.8 2.6 0.4 1.2 1.2 0.40 0.50 0.1 0.05 0.05 0.05  
0.15 1.7 2.5 0.35 0.45  
0.45 0.55  
0.00  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
sot1161-1_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
- - -  
JEDEC  
- - -  
JEITA  
- - -  
09-12-28  
09-12-29  
SOT1161-1  
Fig 15. Package outline SOT1161-1 (XQFN16)  
NTB0104  
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© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
22 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
XQFN12: plastic, extremely thin quad flat package; no leads;  
12 terminals; body 1.70 x 2.00 x 0.50 mm  
SOT1174-1  
X
D
B
A
E
terminal 1  
index area  
A
A
1
A
3
detail X  
C
∅ v  
∅ w  
C A  
C
B
b
y
1
y
C
5
1
7
e
1
e
11  
terminal 1  
index area  
L
1
L
0
1
2 mm  
scale  
Dimensions  
(1)  
Unit  
A
A
1
A
3
b
D
E
e
e
1
L
L
1
v
w
y
y
1
max 0.5 0.05  
mm nom  
min  
0.25 1.8 2.1  
0.55  
0.127 0.20 1.7 2.0 0.4 1.6 0.50 0.15 0.1 0.05 0.05 0.05  
0.15 1.6 1.9 0.45  
0.00  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
sot1174-1_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
- - -  
JEDEC  
JEITA  
- - -  
10-04-07  
10-04-21  
SOT1174-1  
MO-288  
Fig 16. Package outline SOT1174 (XQFN12)  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
23 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
15. Abbreviations  
Table 15. Abbreviations  
Acronym  
CDM  
Description  
Charged Device Model  
CMOS  
DUT  
Complementary Metal Oxide Semiconductor  
Device Under Test  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
MM  
Machine Model  
16. Revision history  
Table 16. Revision history  
Document ID  
Release date  
20101026  
Data sheet status  
Change notice  
Supersedes  
NTB0104 v.1  
Product data sheet  
-
-
NTB0104  
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© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
24 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
17. Legal information  
17.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
suitable for use in medical, military, aircraft, space or life support equipment,  
17.2 Definitions  
nor in applications where failure or malfunction of an NXP Semiconductors  
product can reasonably be expected to result in personal injury, death or  
severe property or environmental damage. NXP Semiconductors accepts no  
liability for inclusion and/or use of NXP Semiconductors products in such  
equipment or applications and therefore such inclusion and/or use is at the  
customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
17.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Suitability for use in automotive applications — This NXP  
Semiconductors product has been qualified for use in automotive  
applications. The product is not designed, authorized or warranted to be  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
25 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
17.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
18. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
NTB0104  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 1 — 26 October 2010  
26 of 27  
NTB0104  
NXP Semiconductors  
Dual supply translating transceiver; auto direction sensing; 3-state  
19. Contents  
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5  
7
Functional description . . . . . . . . . . . . . . . . . . . 5  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Recommended operating conditions. . . . . . . . 6  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
8
9
10  
11  
12  
13  
Application information. . . . . . . . . . . . . . . . . . 16  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Input driver requirements . . . . . . . . . . . . . . . . 18  
Power up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Enable and disable. . . . . . . . . . . . . . . . . . . . . 18  
Pull-up or pull-down resistors on I/O lines . . . 18  
13.1  
13.2  
13.3  
13.4  
13.5  
13.6  
14  
15  
16  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 24  
17  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 25  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
17.1  
17.2  
17.3  
17.4  
18  
19  
Contact information. . . . . . . . . . . . . . . . . . . . . 26  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2010.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 26 October 2010  
Document identifier: NTB0104  

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