NTS0101GM,115 [NXP]

NTS0101 - Dual supply translating transceiver; open drain; auto direction sensing SON 6-Pin;
NTS0101GM,115
型号: NTS0101GM,115
厂家: NXP    NXP
描述:

NTS0101 - Dual supply translating transceiver; open drain; auto direction sensing SON 6-Pin

电信 光电二极管 电信集成电路
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NTS0101  
Dual supply translating transceiver; open drain; auto  
direction sensing  
Rev. 5 — 11 August 2014  
Product data sheet  
1. General description  
The NTS0101 is a 1-bit, dual supply translating transceiver with auto direction sensing,  
that enables bidirectional voltage level translation. It features two 1-bit input-output ports  
(A and B), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A)  
can be supplied at any voltage between 1.65 V and 3.6 V. VCC(B) can be supplied at any  
voltage between 2.3 V and 5.5 V. This flexibility makes the device suitable for translating  
between any of the voltage nodes (1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins A and OE are  
referenced to VCC(A) and pin B is referenced to VCC(B). A LOW level at pin OE causes the  
outputs to assume a high-impedance OFF-state. This device is fully specified for partial  
power-down applications using IOFF. The IOFF circuitry disables the output, preventing the  
damaging backflow current through the device when it is powered down.  
2. Features and benefits  
Wide supply voltage range:  
VCC(A): 1.65 V to 3.6 V and VCC(B): 2.3 V to 5.5 V  
Maximum data rates:  
Push-pull: 50 Mbps  
IOFF circuitry provides partial Power-down mode operation  
Inputs accept voltages up to 5.5 V  
ESD protection:  
HBM JESD22-A114E Class 2 exceeds 2500 V for A port  
HBM JESD22-A114E Class 3B exceeds 8000 V for B port  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1500 V  
Latch-up performance exceeds 100 mA per JESD 78B Class II  
Multiple package options  
Specified from 40 C to +85 C and 40 C to +125 C  
3. Applications  
I2C/SMBus  
UART  
GPIO  
 
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
4. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
NTS0101GW  
NTS0101GM  
40 C to +125 C  
40 C to +125 C  
SC-88  
plastic surface-mounted package; 6 leads  
SOT363  
XSON6  
plastic extremely thin small outline package; no leads; SOT886  
6 terminals; body 1 1.45 0.5 mm  
NTS0101GF  
NTS0101GS  
40 C to +125 C  
40 C to +125 C  
XSON6  
XSON6  
plastic extremely thin small outline package; no leads; SOT891  
6 terminals; body 1 1 0.5 mm  
extremely thin small outline package; no leads;  
SOT1202  
6 terminals; body 1.0 1.0 0.35 mm  
5. Marking  
Table 2.  
Marking  
Type number  
NTS0101GW  
NTS0101GM  
NTS0101GF  
NTS0101GS  
Marking code[1]  
s1  
s1  
s1  
s1  
[1] The pin 1 indicator is on the lower left corner of the device, below the marking code.  
6. Functional diagram  
GATE BIAS  
5
OE  
3
A
4
B
V
CC(A)  
V
CC(B)  
001aan317  
Fig 1. Logic symbol  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
2 of 23  
 
 
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
7. Pinning information  
7.1 Pinning  
NTS0101  
NTS0101  
V
1
2
3
6
5
4
V
CC(B)  
CC(A)  
GND  
NTS0101  
1
2
3
6
5
4
V
V
CC(B)  
V
1
2
3
6
5
4
V
CC(B)  
CC(A)  
GND  
CC(A)  
GND  
OE  
B
OE  
B
OE  
B
A
A
A
001aan319  
001aan320  
Transparent top view  
Transparent top view  
001aan318  
Fig 2. Pin configuration SOT363  
Fig 3. Pin configuration SOT886  
Fig 4. Pin configuration SOT891  
and SOT1202  
7.2 Pin description  
Table 3.  
Symbol  
VCC(A)  
GND  
A
Pin description  
Pin  
1
Description  
supply voltage A  
ground (0 V)  
2
3
data input or output (referenced to VCC(A)  
)
)
B
4
data input or output (referenced to VCC(B)  
OE  
5
output enable input (active HIGH; referenced to VCC(A)  
)
VCC(B)  
6
supply voltage B  
8. Functional description  
Table 4.  
Function table[1]  
Supply voltage  
VCC(A)  
Input  
OE  
L
Input/output  
VCC(B)  
A
B
1.65 V to VCC(B)  
1.65 V to VCC(B)  
GND[2]  
2.3 V to 5.5 V  
2.3 V to 5.5 V  
GND[2]  
Z
Z
H
input or output  
Z
output or input  
Z
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.  
[2] When either VCC(A) or VCC(B) is at GND level, the device goes into power-down mode.  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
3 of 23  
 
 
 
 
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
9. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC(A)  
VCC(B)  
VI  
Parameter  
Conditions  
Min  
Max  
+6.5  
+6.5  
+6.5  
+6.5  
Unit  
V
supply voltage A  
supply voltage B  
input voltage  
0.5  
0.5  
0.5  
0.5  
V
[1][2]  
[1][2]  
[1][2]  
A port and OE input  
B port  
V
V
VO  
output voltage  
Active mode  
A or B port  
0.5  
VCCO + 0.5  
V
[1]  
Power-down or 3-state mode  
A port  
0.5  
0.5  
50  
50  
-
+4.6  
+6.5  
-
V
B port  
V
IIK  
input clamping current  
output clamping current  
output current  
VI < 0 V  
mA  
mA  
mA  
mA  
mA  
C  
IOK  
IO  
VO < 0 V  
-
[2]  
[3]  
VO = 0 V to VCCO  
ICC(A) or ICC(B)  
50  
100  
-
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
ground current  
100  
65  
-
storage temperature  
total power dissipation  
+150  
250  
Tamb = 40 C to +125 C  
mW  
[1] The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] CCO is the supply voltage associated with the output.  
V
[3] For SC-88 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.  
For XSON6 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.  
10. Recommended operating conditions  
Table 6.  
Symbol  
VCC(A)  
VCC(B)  
Tamb  
Recommended operating conditions[1][2]  
Parameter  
Conditions  
Min  
1.65  
2.3  
Max  
3.6  
Unit  
V
supply voltage A  
supply voltage B  
5.5  
V
ambient temperature  
40  
+125  
C  
t/V  
input transition rise and fall rate A or B port; push-pull driving  
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
-
-
10  
10  
ns/V  
ns/V  
OE input  
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
[1] The A and B sides of an unused I/O pair must be held in the same state, both at VCCI or both at GND.  
[2]  
V
CC(A) must be less than or equal to VCC(B)  
.
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
4 of 23  
 
 
 
 
 
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
11. Static characteristics  
Table 7.  
Typical static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
II  
input leakage  
current  
OE input; VI = 0 V to 3.6 V; VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
-
-
1  
A  
[1]  
IOZ  
IOFF  
OFF-stateoutput A or B port; VO = 0 V or VCCO; VCC(A) = 1.65 V to 3.6 V;  
-
-
-
-
-
1  
1  
1  
-
A  
A  
A  
pF  
current  
VCC(B) = 2.3 V to 5.5 V  
power-off  
A port; VI or VO = 0 V to 3.6 V;  
-
leakage current  
VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V  
B port; VI or VO = 0 V to 5.5 V;  
VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V  
-
CI  
input  
OE input; VCC(A) = 3.3 V; VCC(B) = 3.3 V  
1
capacitance  
CI/O  
input/output  
capacitance  
A port  
-
-
-
4
-
-
-
pF  
pF  
pF  
B port  
7.5  
11  
A or B port; VCC(A) = 3.3 V; VCC(B) = 3.3 V  
[1] VCCO is the supply voltage associated with the output.  
Table 8.  
Typical supply current  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C.  
VCC(A)  
VCC(B)  
3.3 V  
Unit  
2.5 V  
5.0 V  
ICC(A)  
0.1  
0.1  
-
ICC(B)  
0.5  
0.1  
-
ICC(A)  
0.1  
ICC(B)  
1.5  
ICC(A)  
0.1  
ICC(B)  
1.8 V  
2.5 V  
3.3 V  
4.6  
3.8  
2.8  
A  
A  
A  
0.1  
0.8  
0.1  
0.1  
0.1  
0.1  
Table 9.  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C  
Unit  
Min  
Max  
Min  
Max  
VIH  
HIGH-level  
A port  
input voltage  
[1]  
[1]  
VCC(A) = 1.65 V to 1.95 V;  
VCC(B) = 2.3 V to 5.5 V  
VCCI 0.2  
VCCI 0.4  
-
-
VCCI 0.2  
VCCI 0.4  
-
-
V
V
VCC(A) = 2.3 V to 3.6 V;  
V
CC(B) = 2.3 V to 5.5 V  
B port  
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
OE input  
[1]  
VCCI 0.4  
-
-
VCCI 0.4  
-
-
V
V
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
0.65VCC(A)  
0.65VCC(A)  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
5 of 23  
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
Table 9.  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C  
Unit  
Min  
Max  
Min  
Max  
VIL  
LOW-level  
A or B port  
input voltage  
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
-
0.15  
-
0.15  
V
V
V
OE input  
VCC(A) = 1.65 V to 3.6 V;  
-
0.35VCC(A)  
-
0.35VCC(A)  
VCC(B) = 2.3 V to 5.5 V  
VOH  
HIGH-level  
output voltage  
IO = 20 A  
[2]  
[2]  
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
0.67VCCO  
-
0.67VCCO  
-
VOL  
LOW-level  
A or B port; IO = 1 mA  
output voltage  
VI 0.15 V;  
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
-
-
-
0.4  
2  
2  
-
-
-
0.4  
12  
12  
V
II  
input leakage OE input; VI = 0 V to 3.6 V;  
current  
A  
A  
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
[2]  
IOZ  
OFF-state  
A or B port; VO = 0 V or VCCO;  
output current VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
IOFF  
power-off  
leakage  
current  
A port; VI or VO = 0 V to 3.6 V;  
VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V  
-
-
2  
2  
-
-
12  
12  
A  
A  
B port; VI or VO = 0 V to 3.6 V;  
VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V  
[1]  
ICC  
supply current VI = 0 V or VCCI; IO = 0 A  
ICC(A)  
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
-
2.4  
-
15  
A  
VCC(A) = 3.6 V; VCC(B) = 0 V  
VCC(A) = 0 V; VCC(B) = 5.5 V  
ICC(B)  
-
-
2.2  
-
-
15  
A  
A  
1  
8  
VCC(A) = 1.65 V to 3.6 V;  
-
12  
-
30  
A  
VCC(B) = 2.3 V to 5.5 V  
VCC(A) = 3.6 V; VCC(B) = 0 V  
VCC(A) = 0 V; VCC(B) = 5.5 V  
ICC(A) + ICC(B)  
-
-
1  
-
-
5  
A  
A  
1
6
VCC(A) = 1.65 V to 3.6 V;  
VCC(B) = 2.3 V to 5.5 V  
-
14.4  
-
30  
A  
[1] VCCI is the supply voltage associated with the input.  
[2] VCCO is the supply voltage associated with the output.  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
6 of 23  
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
12. Dynamic characteristics  
Table 10. Dynamic characteristics for temperature range 40 C to +85 C[1]  
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 7; for wave forms, see Figure 5 and Figure 6.  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
2.5 V 0.2 V  
3.3 V 0.3 V  
5.0 V 0.5 V  
Min  
Max  
Min  
Max  
Min  
Max  
VCC(A) = 1.8 V 0.15 V  
tPHL  
tPLH  
tPHL  
tPLH  
HIGH to LOW  
propagation delay  
A to B  
A to B  
B to A  
B to A  
-
-
-
-
4.6  
6.8  
4.4  
5.3  
-
-
-
-
4.7  
6.8  
4.5  
4.5  
-
-
-
-
5.8  
7.0  
4.7  
0.5  
ns  
ns  
ns  
ns  
LOW to HIGH  
propagation delay  
HIGH to LOW  
propagation delay  
LOW to HIGH  
propagation delay  
ten  
enable time  
disable time  
OE to A; B  
-
200  
25  
-
200  
25  
-
200  
25  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
[2]  
[2]  
tdis  
OE to A; no external load  
OE to B; no external load  
OE to A  
-
-
-
-
-
-
25  
25  
25  
-
230  
200  
9.5  
-
230  
200  
9.3  
9.1  
-
230  
200  
7.6  
7.6  
OE to B  
-
-
-
tTLH  
LOW to HIGH  
output transition  
time  
A port  
3.2  
3.3  
2.3  
2.7  
1.8  
2.7  
B port  
10.8  
tTHL  
HIGH to LOW  
output transition  
time  
A port  
B port  
2.0  
2.9  
5.9  
7.6  
1.9  
2.8  
6.0  
7.5  
1.7  
2.8  
13.3 ns  
10.0 ns  
tW  
pulse width  
data rate  
data inputs  
20  
-
-
20  
-
-
20  
-
-
ns  
fdata  
50  
50  
50  
Mbps  
VCC(A) = 2.5 V 0.2 V  
tPHL  
tPLH  
tPHL  
tPLH  
HIGH to LOW  
propagation delay  
A to B  
A to B  
B to A  
B to A  
-
-
-
-
3.2  
3.5  
3.0  
2.5  
-
-
-
-
3.3  
4.1  
3.6  
1.6  
-
-
-
-
3.4  
4.4  
4.3  
0.7  
ns  
ns  
ns  
ns  
LOW to HIGH  
propagation delay  
HIGH to LOW  
propagation delay  
LOW to HIGH  
propagation delay  
ten  
enable time  
disable time  
OE to A; B  
-
200  
20  
-
200  
20  
-
200  
20  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
[2]  
[2]  
tdis  
OE to A; no external load  
OE to B; no external load  
OE to A  
-
-
-
-
-
-
20  
20  
20  
-
200  
200  
7.4  
8.3  
-
200  
200  
6.6  
7.9  
-
200  
200  
6.2  
6.8  
OE to B  
-
-
-
tTLH  
LOW to HIGH  
output transition  
time  
A port  
2.8  
3.2  
2.6  
2.9  
1.8  
2.4  
B port  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
7 of 23  
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
Table 10. Dynamic characteristics for temperature range 40 C to +85 C[1] …continued  
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 7; for wave forms, see Figure 5 and Figure 6.  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
2.5 V 0.2 V  
3.3 V 0.3 V  
5.0 V 0.5 V  
Min  
1.9  
2.2  
Max  
5.7  
Min  
1.9  
2.4  
Max  
5.5  
Min  
1.8  
2.6  
Max  
5.3  
tTHL  
HIGH to LOW  
output transition  
time  
A port  
B port  
ns  
ns  
7.8  
6.7  
6.6  
tW  
pulse width  
data rate  
data inputs  
20  
-
-
20  
-
-
20  
-
-
ns  
fdata  
50  
50  
50  
Mbps  
VCC(A) = 3.3 V 0.3 V  
tPHL  
tPLH  
tPHL  
tPLH  
HIGH to LOW  
propagation delay  
A to B  
A to B  
B to A  
B to A  
-
-
-
-
-
-
-
-
-
-
-
-
2.4  
4.2  
2.5  
2.5  
-
-
-
-
3.1  
4.4  
3.3  
2.6  
ns  
ns  
ns  
ns  
LOW to HIGH  
propagation delay  
HIGH to LOW  
propagation delay  
LOW to HIGH  
propagation delay  
ten  
enable time  
disable time  
OE to A; B  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
200  
15  
-
200  
15  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
[2]  
[2]  
tdis  
OE to A; no external load  
OE to B; no external load  
OE to A  
-
-
-
-
15  
15  
-
260  
200  
5.6  
6.4  
-
260  
200  
5.9  
7.4  
OE to B  
-
-
tTLH  
LOW to HIGH  
output transition  
time  
A port  
2.3  
2.5  
1.9  
2.1  
B port  
tTHL  
HIGH to LOW  
output transition  
time  
A port  
B port  
-
-
-
-
2.0  
2.3  
5.4  
7.4  
1.9  
2.4  
5.0  
7.6  
ns  
ns  
tW  
pulse width  
data rate  
data inputs  
-
-
-
-
20  
-
-
20  
-
-
ns  
fdata  
50  
50  
Mbps  
[1] ten is the same as tPZL and tPZH  
tdis is the same as tPLZ and tPHZ  
[2] Delay between OE going LOW and when the outputs are disabled.  
.
.
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
8 of 23  
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
Table 11. Dynamic characteristics for temperature range 40 C to +125 C[1]  
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 7; for wave forms, see Figure 5 and Figure 6.  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
2.5 V 0.2 V  
3.3 V 0.3 V  
5.0 V 0.5 V  
Min  
Max  
Min  
Max  
Min  
Max  
VCC(A) = 1.8 V 0.15 V  
tPHL  
tPLH  
tPHL  
tPLH  
HIGH to LOW  
propagation delay  
A to B  
A to B  
B to A  
B to A  
-
-
-
-
5.8  
8.5  
5.5  
6.7  
-
-
-
-
5.9  
8.5  
5.7  
5.7  
-
-
-
-
7.3  
8.8  
5.9  
0.7  
ns  
ns  
ns  
ns  
LOW to HIGH  
propagation delay  
HIGH to LOW  
propagation delay  
LOW to HIGH  
propagation delay  
ten  
enable time  
disable time  
OE to A; B  
-
200  
30  
-
200  
30  
-
200  
30  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
[2]  
[2]  
tdis  
OE to A; no external load  
OE to B; no external load  
OE to A  
-
-
-
-
-
-
30  
30  
30  
-
250  
220  
11.9  
13.5  
-
250  
220  
11.7  
11.4  
-
250  
220  
9.5  
9.5  
OE to B  
-
-
-
tTLH  
LOW to HIGH  
output transition  
time  
A port  
3.2  
3.3  
2.3  
2.7  
1.8  
2.7  
B port  
tTHL  
HIGH to LOW  
output transition  
time  
A port  
B port  
2.0  
2.9  
7.4  
9.5  
1.9  
2.8  
7.5  
9.4  
1.7  
2.8  
16.7 ns  
12.5 ns  
tW  
pulse width  
data rate  
data inputs  
20  
-
-
20  
-
-
20  
-
-
ns  
fdata  
50  
50  
50  
Mbps  
VCC(A) = 2.5 V 0.2 V  
tPHL  
tPLH  
tPHL  
tPLH  
HIGH to LOW  
propagation delay  
A to B  
A to B  
B to A  
B to A  
-
-
-
-
4.0  
4.4  
3.8  
3.2  
-
-
-
-
4.2  
5.2  
4.5  
2.0  
-
-
-
-
4.3  
5.5  
5.4  
0.9  
ns  
ns  
ns  
ns  
LOW to HIGH  
propagation delay  
HIGH to LOW  
propagation delay  
LOW to HIGH  
propagation delay  
ten  
enable time  
disable time  
OE to A; B  
-
200  
25  
-
200  
25  
-
200  
25  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
[2]  
[2]  
tdis  
OE to A; no external load  
OE to B; no external load  
OE to A  
-
-
-
-
-
-
25  
25  
25  
-
220  
220  
9.3  
-
220  
220  
8.3  
9.7  
-
220  
220  
7.8  
8.3  
OE to B  
-
-
-
tTLH  
LOW to HIGH  
output transition  
time  
A port  
2.8  
3.2  
2.6  
2.9  
1.8  
2.4  
B port  
10.4  
tTHL  
HIGH to LOW  
output transition  
time  
A port  
B port  
1.9  
2.2  
7.2  
9.8  
1.9  
2.4  
6.9  
8.4  
1.8  
2.6  
6.7  
8.3  
ns  
ns  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
9 of 23  
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
Table 11. Dynamic characteristics for temperature range 40 C to +125 C[1] …continued  
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 7; for wave forms, see Figure 5 and Figure 6.  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
2.5 V 0.2 V  
3.3 V 0.3 V  
5.0 V 0.5 V  
Min  
20  
-
Max  
-
Min  
20  
-
Max  
-
Min  
20  
-
Max  
-
tW  
pulse width  
data rate  
data inputs  
ns  
fdata  
50  
50  
50  
Mbps  
VCC(A) = 3.3 V 0.3 V  
tPHL  
tPLH  
tPHL  
tPLH  
HIGH to LOW  
propagation delay  
A to B  
A to B  
B to A  
B to A  
-
-
-
-
-
-
-
-
-
-
-
-
3.0  
5.3  
3.2  
3.2  
-
-
-
-
3.9  
5.5  
4.2  
3.3  
ns  
ns  
ns  
ns  
LOW to HIGH  
propagation delay  
HIGH to LOW  
propagation delay  
LOW to HIGH  
propagation delay  
ten  
enable time  
disable time  
OE to A; B  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
200  
20  
-
200  
20  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
[2]  
[2]  
tdis  
OE to A; no external load  
OE to B; no external load  
OE to A  
-
-
-
-
20  
20  
-
280  
220  
7.0  
8.0  
-
280  
220  
7.4  
9.3  
OE to B  
-
-
tTLH  
LOW to HIGH  
output transition  
time  
A port  
2.3  
2.5  
1.9  
2.1  
B port  
tTHL  
HIGH to LOW  
output transition  
time  
A port  
B port  
-
-
-
-
2.0  
2.3  
6.8  
9.3  
1.9  
2.4  
6.3  
9.5  
ns  
ns  
tW  
pulse width  
data rate  
data inputs  
-
-
-
-
20  
-
-
20  
-
-
ns  
fdata  
50  
50  
Mbps  
[1] ten is the same as tPZL and tPZH  
tdis is the same as tPLZ and tPHZ  
[2] Delay between OE going LOW and when the outputs are disabled.  
.
.
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
10 of 23  
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
13. Waveforms  
V
I
V
A, B input  
GND  
M
t
t
PLH  
PHL  
V
OH  
90 %  
B, A output  
V
V
M
10 %  
OL  
t
t
THL  
TLH  
001aan321  
Measurement points are given in Table 12.  
OL and VOH are typical output voltage levels that occur with the output load.  
V
Fig 5. The data input (A, B) to data output (B, A) propagation delay times  
V
I
OE input  
V
M
GND  
t
t
PLZ  
PZL  
V
CCO  
output  
V
LOW-to-OFF  
OFF-to-LOW  
M
V
X
V
OL  
t
t
PHZ  
PZH  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
outputs  
enabled  
outputs  
disabled  
outputs  
enabled  
001aal919  
Measurement points are given in Table 12.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 6. Enable and disable times  
Table 12. Measurement points[1][2]  
Supply voltage  
VCCO  
Input  
Output  
VM  
VM  
VX  
VY  
1.8 V 0.15 V  
2.5 V 0.2 V  
3.3 V 0.3 V  
5.0 V 0.5 V  
0.5VCCI  
0.5VCCI  
0.5VCCI  
0.5VCCI  
0.5VCCO  
0.5VCCO  
0.5VCCO  
0.5VCCO  
VOL + 0.15 V  
VOL + 0.15 V  
VOL + 0.3 V  
VOL + 0.3 V  
VOH 0.15 V  
VOH 0.15 V  
VOH 0.3 V  
VOH 0.3 V  
[1] VCCI is the supply voltage associated with the input.  
[2] VCCO is the supply voltage associated with the output.  
NTS0101  
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© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
11 of 23  
 
 
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
EXT  
V
CC  
R
L
V
V
O
I
G
DUT  
C
L
R
L
001aal963  
Test data is given in Table 13.  
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz; ZO = 50 ; dV/dt 1.0 V/ns.  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
VEXT = External voltage for measuring switching times.  
Fig 7. Test circuit for measuring switching times  
Table 13. Test data  
Supply voltage  
VCC(A)  
Input  
VI[1]  
Load  
CL  
VEXT  
[2]  
[3]  
VCC(B)  
t/V  
RL  
tPLH, tPHL tPZH, tPHZ tPZL, tPLZ  
1.65 V to 3.6 V 2.3 V to 5.5 V VCCI  
1.0 ns/V  
15 pF  
50 k, 1 Mopen  
open  
2VCCO  
[1] VCCI is the supply voltage associated with the input.  
[2] For measuring data rate, pulse width, propagation delay and output rise and fall measurements, RL = 1 M. For measuring enable and  
disable times, RL = 50 K.  
[3]  
VCCO is the supply voltage associated with the output.  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
12 of 23  
 
 
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
14. Application information  
14.1 Applications  
Voltage level-translation applications. The NTS0101 can be used in point-to-point  
applications to interface between devices or systems operating at different supply  
voltages. The device is primarily targeted at I2C or 1-wire which use open-drain drivers. It  
may also be used in applications where push-pull drivers are connected to the ports,  
however the NTB0101 may be more suitable.  
1.8 V  
3.3 V  
1.8 V  
V
V
CC(B)  
3.3 V  
CC(A)  
0.1 μF  
0.1 μF  
1 μF  
OE  
SYSTEM  
CONTROLLER  
NTS0101  
SYSTEM  
DATA  
A
B
DATA  
001aan322  
Fig 8. Typical operating circuit  
14.2 Architecture  
The architecture of the NTS0101 is shown in Figure 9. The device does not require an  
extra input signal to control the direction of data flow from A to B or B to A.  
V
CC(A)  
V
CC(B)  
T1  
T2  
ONE  
ONE  
SHOT  
SHOT  
10 kΩ  
10 kΩ  
GATE BIAS  
T3  
A
B
001aal965  
Fig 9. Architecture of NTS0101 I/O cel  
The NTS0101 is a "switch" type voltage translator, it employs two key circuits to enable  
voltage translation:  
1. A pass-gate transistor (N-channel) that ties the ports together.  
2. An output edge-rate accelerator that detects and accelerates rising edges on the I/O  
pins.  
NTS0101  
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© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
13 of 23  
 
 
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
The gate bias voltage of the pass gate transistor (T3) is set at approximately one  
threshold voltage above the VCC level of the low-voltage side. During a LOW-to-HIGH  
transition, the output one-shot accelerates the output transition by switching on the PMOS  
transistors (T1, T2). It bypasses the 10 kpull-up resistors and increases the current  
drive capability. The one-shot is activated once the input transition reaches approximately  
V
CCI/2; it is de-activated approximately 50 ns after the output reaches VCCO/2. During the  
acceleration time, the driver output resistance is between approximately 50 and 70 .  
To avoid signal contention and minimize dynamic ICC, the user should wait for the  
one-shot circuit to turn-off before applying a signal in the opposite direction. Pull-up  
resistors are included in the device for DC current sourcing capability.  
14.3 Input driver requirements  
As the NTS0101 is a switch type translator, properties of the input driver directly effect the  
output signal. The external open-drain or push-pull driver applied to an I/O determines the  
static current sinking capability of the system. The max data rate, HIGH-to-LOW output  
transition time (tTHL), and propagation delay (tPHL), are dependent upon the output  
impedance and edge-rate of the external driver. The limits provided for these parameters  
in the data sheet assume a driver with output impedance below 50 is used.  
14.4 Output load considerations  
The maximum lumped capacitive load that can be driven is dependant upon the one-shot  
pulse duration. In cases with very heavy capacitive loading, there is a risk that the output  
does not reach the positive rail within the one-shot pulse duration.  
To avoid excessive capacitive loading and to ensure correct triggering of the one-shot,  
use short trace lengths and low capacitance connectors on NTS0101 PCB layouts. The  
length of the PCB trace should be such that the round-trip delay of any reflection is within  
the one-shot pulse duration (approximately 50 ns). It ensures low impedance termination  
and avoids output signal oscillations and one-shot retriggering.  
14.5 Power-up  
During operation, VCC(A) must never be higher than VCC(B). However, during power-up,  
VCC(A) VCC(B) does not damage the device, so either power supply can be ramped up  
first. There is no special power-up sequencing required. The NTS0101 includes circuitry  
that disables all output ports when either VCC(A) or VCC(B) is switched off.  
14.6 Enable and disable  
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all  
I/Os to assume the high-impedance OFF-state. The disable time (tdis with no external  
load) indicates the delay between when OE goes LOW and when outputs actually  
become disabled. The enable time (ten) indicates the amount of time the user must allow  
for one one-shot circuitry to become operational after OE is taken HIGH. To ensure the  
high-impedance OFF-state during power-up or power-down, pin OE should be tied to  
GND through a pull-down resistor. The current-sourcing capability of the driver determines  
the minimum value of the resistor.  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
14 of 23  
 
 
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
14.7 Pull-up or pull-down resistors on I/Os lines  
The A port I/O has an internal 10 kpull-up resistor to VCC(A). The B port I/O has an  
internal 10 kpull-up resistor to VCC(B). If a smaller value of pull-up resistor is required,  
add an external resistor in parallel to the internal 10 k. This pull-up resistor effects the  
V
OL level. When OE goes LOW, the internal pull-ups of the NTS0101 are disabled.  
NTS0101  
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© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
15 of 23  
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
15. Package outline  
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NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
16 of 23  
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
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NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
17 of 23  
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
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Fig 12. Package outline SOT891 (XSON6)  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
18 of 23  
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
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Fig 13. Package outline SOT1202 (XSON6)  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
19 of 23  
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
16. Abbreviations  
Table 14. Abbreviations  
Acronym  
CDM  
DUT  
Description  
Charged Device Model  
Device Under Test  
ESD  
ElectroStatic Discharge  
GPIO  
General Purpose Input Output  
Human Body Model  
HBM  
I2C  
Inter-Integrated Circuit  
MM  
Machine Model  
PCB  
Printed-Circuit Board  
PMOS  
SMBus  
UART  
Positive Metal Oxide Semiconductor  
System Management Bus  
Universal Asynchronous Receiver Transmitter  
17. Revision history  
Table 15. Revision history  
Document ID  
NTS0101 v.5  
Modifications:  
NTS0101 v.4  
Modifications:  
NTS0101 v.3  
Modifications:  
NTS0101 v.2  
NTS0101 v.1  
Release date  
20140811  
Data sheet status  
Change notice  
Supersedes  
Product data sheet  
-
NTS0101 v.4  
Type number NTS0101GV has been removed  
20120514 Product data sheet  
Package outline drawing of SOT886 (Figure 11) modified.  
-
NTS0101 v.3  
NTS0101 v.2  
20111110  
Product data sheet  
-
Legal pages updated.  
20110427  
20101230  
Product data sheet  
Product data sheet  
-
-
NTS0101 v.1  
-
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
20 of 23  
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
18. Legal information  
18.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
Suitability for use — NXP Semiconductors products are not designed,  
18.2 Definitions  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
18.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
21 of 23  
 
 
 
 
 
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
non-automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
18.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
19. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
NTS0101  
All information provided in this document is subject to legal disclaimers.  
© NXP Semiconductors N.V. 2014. All rights reserved.  
Product data sheet  
Rev. 5 — 11 August 2014  
22 of 23  
 
 
NTS0101  
NXP Semiconductors  
Dual supply translating transceiver; open drain; auto direction sensing  
20. Contents  
1
2
3
4
5
6
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
7
7.1  
7.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
8
Functional description . . . . . . . . . . . . . . . . . . . 3  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 4  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
9
10  
11  
12  
13  
14  
Application information. . . . . . . . . . . . . . . . . . 13  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Input driver requirements . . . . . . . . . . . . . . . . 14  
Output load considerations. . . . . . . . . . . . . . . 14  
Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Enable and disable. . . . . . . . . . . . . . . . . . . . . 14  
Pull-up or pull-down resistors on I/Os lines . . 15  
14.1  
14.2  
14.3  
14.4  
14.5  
14.6  
14.7  
15  
16  
17  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20  
18  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
18.1  
18.2  
18.3  
18.4  
19  
20  
Contact information. . . . . . . . . . . . . . . . . . . . . 22  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP Semiconductors N.V. 2014.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 11 August 2014  
Document identifier: NTS0101  
 

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