OQ2538HP/S1 [NXP]

IC ATM/SONET/SDH SUPPORT CIRCUIT, PQFP48, 7 X 7 X 1.40 MM, PLASTIC, LQFP-48, ATM/SONET/SDH IC;
OQ2538HP/S1
型号: OQ2538HP/S1
厂家: NXP    NXP
描述:

IC ATM/SONET/SDH SUPPORT CIRCUIT, PQFP48, 7 X 7 X 1.40 MM, PLASTIC, LQFP-48, ATM/SONET/SDH IC

ATM 异步传输模式 电信 电信集成电路
文件: 总30页 (文件大小:179K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
DATA SHEET  
OQ2538HP; OQ2538U  
SDH/SONET STM16/OC48 main  
amplifiers  
Product specification  
2000 Sep 29  
Supersedes data of 1998 Oct 14  
File under Integrated Circuits, IC19  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
FEATURES  
GENERAL DESCRIPTION  
Differential 100 outputs for direct connection to  
Current-Mode Logic (CML) inputs  
The OQ2538HP is a limiting amplifier IC intended for use  
as the main amplifier in 2.5 Gbits/s Non-Return to Zero  
(NRZ) transmission systems (SDH/SONET).  
Wide bandwidth (3 GHz)  
48.5 dB limiting gain  
Comprised of four amplifier stages with a total gain of  
48.5 dB, it provides for a wide input signal dynamic range  
at a constant CML-compatible output level.  
Noise figure typically 11 dB  
Automatic offset compensation  
Two level-detection circuits are provided for monitoring  
AGC and LOS input signal levels. An internal automatic  
offset compensation circuit eliminates offset in the  
amplifier chain.  
Input level-detection circuits for Automatic Gain Control  
(AGC) and Loss Of Signal (LOS) detection  
Low power dissipation (typically 270 mW)  
Single 4.5 V supply voltage  
Low cost LQFP48 plastic package.  
APPLICATIONS  
Main amplifier in Synchronous Digital Hierarchy (SDH)  
and Synchronous Optical Network (SONET) systems for  
short, medium and long haul optical transmission  
Level detector for laser diode control loops  
Wideband RF gain block with internal level detectors.  
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
OQ2538HP  
OQ2538U  
LQFP48  
plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm  
bare die; dimensions 2070 × 2070 × 380 µm  
SOT313-2  
2000 Sep 29  
2
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
BLOCK DIAGRAM  
V
EE  
3
AGC  
43  
A
AGCDC  
19  
18  
LOS  
B
LOSDC  
8
6
32  
30  
IN  
OUT  
AMP A  
AMP B  
AMP C  
AMP D  
INQ  
OUTQ  
reference  
BAND GAP  
voltage  
for all cells  
OQ2538HP  
21  
22  
45 44  
MGE745  
REF CAPA  
COFF COFFQ  
GND  
Fig.1 Block diagram.  
2000 Sep 29  
3
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
PINNING  
PIN  
(OQ2538HP)  
PAD  
(OQ2538U)  
SYMBOL  
TYPE(1)  
DESCRIPTION  
VEE  
1, 12, 13, 24, 25, 2, 3, 11, 12, 28,  
S
negative power supply  
36, 37, 48  
29(2)  
n.c.  
2, 11, 14, 15, 23,  
26, 27, 35, 38,  
40, 46, 47  
20, 22(3)  
not connected  
AGC  
GND  
3
30  
O
S
rectifier A output  
ground  
4, 5, 7, 9, 10, 16, 1, 4, 5, 8, 13, 14,  
17, 20, 28, 29,  
31, 33, 34, 39,  
41, 42  
16, 18, 19, 21,  
23, 24, 31, 32,  
34, 36(2)  
INQ  
6
33  
35  
6
I
main amplifier inverting input  
main amplifier input  
IN  
8
I
LOSDC  
LOS  
REF  
CAPA  
18  
19  
21  
22  
O
O
O
A
rectifier B reference output  
rectifier B output  
7
9
band gap reference  
10  
pin for connecting band gap reference decoupling  
capacitor  
OUTQ  
OUT  
30  
32  
43  
44  
15  
17  
25  
26  
O
O
O
A
main amplifier inverted output  
main amplifier output  
AGCDC  
COFFQ  
rectifier A reference output  
pin for connecting automatic offset control capacitor  
(return)  
COFF  
45  
27  
A
pin for connecting automatic offset control capacitor  
Notes  
1. Pin type abbreviations: O = Output, I = Input, S = power Supply and A = Analog function.  
2. All GND and VEE pads must be bonded; do not leave one single GND or VEE pad unconnected!  
3. Pads denoted ‘n.c.’ should not be connected. Connections to these pads degrade device performance.  
2000 Sep 29  
4
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
V
V
1
2
36  
35  
EE  
EE  
n.c.  
n.c.  
3
34 GND  
33  
AGC  
GND  
GND  
INQ  
4
GND  
5
32 OUT  
31 GND  
6
OQ2538HP  
GND  
IN  
7
OUTQ  
30  
29 GND  
GND  
8
GND  
GND  
n.c.  
9
28  
27 n.c.  
10  
11  
12  
26  
25  
n.c.  
V
V
EE  
EE  
MGE744  
Fig.2 Pin configuration.  
2000 Sep 29  
5
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
FUNCTIONAL DESCRIPTION  
REF and CAPA band gap output and decoupling  
capacitance  
The OQ2538HP is comprised of four DC-coupled amplifier  
stages along with additional circuitry for offset  
compensation and level detection.  
To reduce band gap noise levels, a 1 nF decoupling  
capacitor on CAPA is recommended. Since the band gap  
is referenced to the negative power supply, the decoupling  
The first amplifier stage contains a modified  
Cherry/Hooper amplifying cell with high gain  
capacitor should be connected between CAPA and VEE  
.
(approximately 20 dB) and a wide bandwidth. Special  
attention is paid to minimizing the equivalent input noise at  
this stage, thus reducing the overall noise level. Additional  
feedback is applied at the second and third stages,  
improving isolation and reducing the gain to 14 dB per  
stage. The last stage is an output buffer, a unity gain  
amplifier, with an output impedance of 100 .  
The band gap voltage is present on pin REF for test  
purposes only. It is not intended to serve as an external  
reference.  
RF input and output connections  
Striplines, or microstrips, with an odd mode characteristic  
impedance of Zo(odd) = 50 must be used for the  
differential RF connections on the PCB. This applies to  
both the input signal pair IN and INQ and to the output  
signal pair OUT and OUTQ. The two lines in each pair  
should have the same length.  
The total gain of the OQ2538HP amounts to 48.5 dB, thus  
providing a constant CML-compatible output signal over a  
wide input signal range.  
Two rectifier circuits are used to measure the input signal  
level. Two separate RF preamplifiers are used to generate  
the voltage gain needed to obtain a suitable rectifier output  
voltage. For rectifier A the gain is approximately 18 dB, for  
rectifier B it is about 14 dB. The output of rectifier A can be  
used for AGC at the preamplifier stage in front of the  
OQ2538HP. The output of rectifier B can be used for LOS  
detection. There is a linear relationship between the  
rectifier output voltage and the input signal level provided  
the amplifiers are not saturated.  
RF input matching circuit  
The input circuit for pins IN and INQ contains internal  
100 resistors decoupled to ground via an internal  
common mode 6 pF capacitor. The topology is depicted in  
Fig.3.  
Because the four gain stages are DC-coupled and provide  
a high overall gain, the effect of the input offset can be  
considerable. The OQ2538HP features an internal offset  
compensation circuit for eliminating the input offset.  
The bandwidth of the offset control loop is determined by  
an external capacitor.  
GND  
handbook, halfpage  
6 pF  
100 Ω  
100 Ω  
IN  
INQ  
COFF and COFFQ offset compensation  
Automatic offset compensation eliminates the input offset  
of the OQ2538HP. This offset cancellation influences the  
low frequency gain of the amplifier stages. With a  
capacitance of 100 nF between COFF and COFFQ the  
loop bandwidth will be less than 1.5 kHz, small enough to  
have no influence on amplifier gain over the frequencies of  
interest. If the capacitor was omitted, the loop bandwidth  
would be greater than 30 MHz, which would influence the  
input signal gain. The loop bandwidth can be calculated  
from the following formula:  
MGM114  
Fig.3 RF input topology.  
1
floop  
=
(1)  
------------------------------------------------  
2π × 1250 Ω × Cext  
where Cext is the capacitance connected between COFF  
and COFFQ.  
2000 Sep 29  
6
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
An external 200 resistor between IN and INQ is  
recommended in order to match the inputs to a differential  
transmission line, coupled microstrip or stripline with an  
odd mode impedance Zo(odd) = 50 , as shown in Fig.4.  
RF output matching circuit  
Matching of the main amplifier outputs, OUT and OUTQ, is  
not mandatory. In most applications, the receiving end of  
the transmission line will be properly matched, so very little  
reflection will occur. Matching the transmitting end to  
absorb these reflections is only recommended for very  
sensitive applications. In such cases, 100 pull-up  
resistors should be connected from OUT and OUTQ to  
ground, as close as possible to the IC pins. These  
matching resistors will not be needed in most applications,  
however. The output circuit of the OQ2538HP is depicted  
in Fig.6. For more information see “Application Note  
AN96051” describing the OM5801 STM16 demo board.  
handbook, halfpage  
22 nF  
200 Ω  
22 nF  
IN  
differential line  
= 50 Ω  
Z
o(odd)  
INQ  
MGM115  
GND  
handbook, halfpage  
Fig.4 Differential input matching.  
100 Ω  
100 Ω  
OUT  
OUTQ  
For single-ended excitation, separate matching networks  
on IN and INQ, as depicted in Fig.5, achieve optimum  
matching. Care should be taken to avoid DC loading, since  
the OQ2538HP controls its own DC input voltage.  
The resistors on the unused input INQ may be combined  
for convenience.  
MGM117  
Fig.6 RF output topology.  
handbook, halfpage  
22 nF  
100 Ω  
transmission line  
= 50 Ω  
22 nF  
22 nF  
IN  
Z
o
INQ  
50 Ω  
100 Ω  
22 nF  
MGM116  
Fig.5 Single-ended input matching.  
In both cases, the essence of good matching is the equity  
of the circuitry on both input pins. The impedance seen on  
pins IN and INQ should be as equal as possible. For more  
information see “Application Note AN96051” describing  
the OM5801 STM16 demo board.  
2000 Sep 29  
7
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
RF gain and group delay measurements  
When performing S21 measurements make sure the input  
power level is around 50 dBm, as indicated in Fig.7  
(port 1 of the network analyzer). For correct measurement  
results the OQ2538 should not be limiting the input signal,  
but operate in its linear region. This can be achieved by  
using a very small input signal level of 50 dBm.  
The measurement set-up shown in Fig.7 was used to  
measure the single-ended small signal gain as specified in  
Chapter “Characteristics”. Since the network analyzer can  
only perform single-ended measurements, the  
single-ended matching scheme described above is used  
to match the inputs of the OQ2538HP to 50 . For greater  
accuracy, the outputs are also matched. The gain  
measured with this set-up is denoted by S21. Graphs of  
typical S21 and group delay characteristics are shown in  
Figs 8 and 9. The OQ2538HP test PCB used for these  
measurements can be supplied on request.  
Although the differential voltage gain of the OQ2538HP  
cannot be measured directly, it can be calculated from S21.  
The differential voltage gain is 6 dB greater than the  
measured S21 value, typically 46 dB (40 + 6 dB). If the  
100 matching resistors on the output are omitted, the  
differential voltage gain is increased by a further 2.4 dB,  
typically to 48.4 dB. This is due to the fact that the output  
load is increased from 25 to 33 , so the output voltage is  
increased by a factor of 1.32 (2.4 dB).  
6 GHz NETWORK ANALYZER  
S-PARAMETER TEST SET  
P = 50 dBm  
PORT 1  
PORT 2  
Z
= 50 Ω  
Z
= 50 Ω  
o
o
OQ2538HP  
test PCB  
100 pF  
100 pF  
50 semi rigid  
50 semi rigid  
50 semi rigid  
50 semi rigid  
IN  
OUT  
INQ  
OUTQ  
50 SMA  
termination  
50 SMA  
termination  
100 Ω  
100 Ω  
100 Ω  
100 Ω  
V
= 4.5 V  
EE  
MGM111  
Fig.7 S21 and group delay measurement set-up.  
8
2000 Sep 29  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
S
log MAG  
21  
MGM160  
(2)  
40 dB  
(1)  
(4)  
(3)  
start: 30 kHz  
stop: 6 GHz  
Vertical scale 6 dB/division.  
Linear frequency sweep; start: 30 kHz; stop: 6 GHz.  
(1) 41.603 dB; 1 GHz.  
(2) 38.633 dB; 3.45 GHz.  
(3) 41.291 dB; 2 GHz.  
(4) 41.386 dB; 2.5 GHz.  
Fig.8 S21 characteristic, measured on the OQ2538HP test PCB.  
2000 Sep 29  
9
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
S
delay  
21  
MGM161  
(2)  
(4)  
(3)  
(1)  
0 ps  
start: 30 kHz  
stop: 6 GHz  
Vertical scale 200 ps/division.  
Linear frequency sweep; start: 30 kHz; stop: 6 GHz.  
(1) 832.91 ps; 1 GHz.  
(2) 1007.4 ps; 3.45 GHz.  
(3) 834 ps; 2 GHz.  
(4) 860.93 ps; 2.5 GHz.  
Fig.9 Group delay characteristic, measured on the OQ2538HP test PCB.  
2000 Sep 29  
10  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
Noise figure measurements  
whereas the differential power gain is applicable in this  
situation. Ni can be replaced with the available noise  
power at the input, which is kT under matched conditions  
(k is Boltzmann’s constant). The formula expressed in  
dBm makes calculation easier:  
The noise figure is the ratio of signal-to-noise ratio at the  
input (Si/Ni) to signal-to-noise ratio at the output (So/No) of  
the amplifier. This definition is true for both single-ended  
and differential amplifiers, provided the correct values for  
Si/Ni and So/No are substituted in the formula. The noise  
figure is measured using the differential set-up shown in  
Fig.10. The total noise on the output (No in dBm) is  
measured using the spectrum analyzer at the frequency of  
interest. From this value, the actual (differential) noise  
figure for that frequency (spot noise figure) can be  
calculated using the following formula:  
F = No (S21 + 3) + 173.8 [dB] ,  
assuming log(kT) is 173.8 dBm (T = 298 K) and  
No measured in 1 Hz bandwidth and expressed in dBm.  
For the OQ2538HP, in the differential configuration  
(including the 100 matching resistors), this yields a  
typical noise figure of 11 dB.  
While the performance of this measurement set-up cannot  
match that of a dedicated noise analysis system, the  
results are comparable for an amplifier with a noise figure  
of 11 dB.  
Si Ni  
N o  
N o  
F =  
=
=
-----------------  
--------------------------  
2 S21 Ni  
----------------------------  
2 S21 kT  
So No  
The factor 2 in the denominator is present to compensate  
for the fact that S21 is the single-ended power gain,  
SPECTRUM  
ANALYZER  
IN  
Z
= 50 Ω  
o
OQ2538HP  
test PCB  
100 pF  
100 pF  
100 Ω  
50 semi rigid  
50 semi rigid  
50 semi rigid  
IN  
OUT  
50 SMA  
termination  
50 semi rigid  
INQ  
OUTQ  
50 SMA  
termination  
50 SMA  
termination  
100 Ω  
100 Ω  
100 Ω  
V
= 4.5 V  
MGM112  
EE  
Fig.10 Noise figure measurement set-up.  
11  
2000 Sep 29  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
MGE747  
MGE746  
V
V  
V
V  
AGC  
AGCDC  
(mV)  
LOS  
LOSDC  
(mV)  
200  
100  
0
200  
100  
0
(2)  
(2)  
(1)  
(1)  
(3)  
(3)  
0
10  
20  
30  
40  
50  
IN  
60  
80  
0
1
2
3
4
5
6
7
8
9
10 11  
V
(mV p-p)  
V
(mV p-p)  
IN  
(1) Tamb = 20 °C.  
(2) Tamb = +25 °C.  
(3) Tamb = +85 °C.  
(1) Tamb = 20 °C.  
(2) Tamb = +25 °C.  
(3) Tamb = +85 °C.  
Fig.11 AGC transfer characteristics.  
Fig.12 LOS detection characteristics.  
AGC and AGCDC level detection  
Grounding and power supply decoupling  
When using rectifier A as an input signal level detector, the  
AGC and AGCDC pins must be decoupled to ground with  
100 nF capacitors. The AGCDC output is intended as a  
reference voltage against which the actual AGC output  
voltage can be compared. This voltage difference,  
The ground connection on the PCB needs to be a large  
copper area fill connected to a common ground plane with  
as low inductance as possible, preferably positioned  
directly underneath the LQFP48 package. The large area  
fill will improve heat transfer to the PCB and thus aid IC  
cooling.  
VAGC VAGCDC, can be used as a control input in an AGC  
loop. A graph depicting output voltage difference as a  
function of the input signal level (typical) is shown in  
Fig.11. Note that an input signal with the specified  
peak-to-peak value is applied to both IN and INQ inputs,  
but with complementary phase.  
All VEE pins (two at each corner) need to be connected to  
a common supply plane with as low inductance as  
possible. This plane should be decoupled to ground.  
To avoid high frequency resonance, multiple bypass  
capacitors should not be mounted at the same location.  
To minimize low frequency switching noise in the vicinity of  
the OQ2538HP, the power supply line should be filtered  
once using an LC-circuit with a low cut-off frequency  
(see Fig.14).  
LOS and LOSDC level detection  
The output of rectifier B can be used for LOS detection.  
The LOSDC output provides a reference voltage against  
which the voltage at the LOS output can be compared.  
The voltage difference VLOS VLOSDC can be used as  
input to a LOS detection circuit. Both outputs need to be  
decoupled using 100 nF capacitors. A graph depicting  
VLOS VLOSDC as a function of the input signal level  
(typical) is shown in Fig.12. Note that an input signal with  
the specified peak-to-peak value is applied to both IN and  
INQ inputs, but with complementary phase.  
2000 Sep 29  
12  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
Using alternative supply voltages  
ESD protection  
Although the OQ2538HP is intended to be used with a  
single 4.5 V supply voltage, a slightly modified 5 V  
supply can also be used. By connecting a Schottky diode  
between the VEE power supply line and the IC, an  
additional 0.5 V voltage drop is obtained, bringing the  
supply voltage on the pins of the OQ2538HP within the  
specified range. A BAS85 Schottky diode is  
recommended. A 5 V application schematic is shown in  
Fig.15.  
Exceptions have been made to the standard ESD  
protection scheme in order to achieve high frequency  
performance. The inputs IN and INQ and the outputs OUT  
and OUTQ have no protection against ESD. All other pins  
have a standard ESD protection structure, capable of  
withstanding 2 kV Human Body Model (HBM) zappings.  
Extrapolating from this case, a +5 V application is also  
possible. However, care should be taken with the RF  
transmission lines. The on-chip signals refer to the GND  
pins, which become the positive supply pins in a +5 V  
application. The external transmission lines will most likely  
be referenced to system ground (VEE pins). The RF signals  
will change from one reference plane to another at the  
interface to the RF input and output pins. The positive  
supply application is very vulnerable to interference at this  
point. For a successful +5 V application, special care  
should be taken when designing board layout to reduce  
the influence of interference and keep the positive supply  
as clean as possible.  
2000 Sep 29  
13  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
6.0  
MAX.  
+0.5  
UNIT  
VEE  
VI  
negative supply voltage  
input voltage difference  
input current  
V
note 1  
600  
2.0  
+600  
+2.0  
mV  
mA  
IIN, IINQ  
In  
DC current  
pins 30 and 32  
6  
3  
2  
1  
0.1  
+10  
+3  
mA  
mA  
mA  
mA  
mA  
pins 3, 18, 19 and 43  
pin 21  
+2  
pins 44 and 45  
+1  
pin 22  
+0.1  
380  
150  
+150  
Ptot  
Tj  
total power dissipation  
junction temperature  
storage temperature  
mW  
°C  
Tstg  
65  
°C  
Note  
1. VI = VIN VINQ (AC only). The DC level is internally controlled.  
HANDLING  
Precautions should be taken to avoid damage through electrostatic discharge. This is particularly important during  
assembly and handling of the bare die. Additional safety can be obtained by bonding the VEE and GND pads first, the  
remaining pads may then be bonded to their external connections in any order (see also Section “ESD protection”).  
THERMAL CHARACTERISTICS  
SYMBOL  
DESCRIPTION  
CONDITIONS  
VALUE  
UNIT  
Rth(j-s)  
Rth(j-a)  
thermal resistance from junction to solder point  
thermal resistance from junction to ambient  
15  
65  
K/W  
K/W  
note 1  
Note  
1. Rth(j-a) will be in the application from 15 to 65 K/W, dependent on the PCB layout.  
2000 Sep 29  
14  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
CHARACTERISTICS  
At nominal supply voltages; Tamb = 40 to +85 °C; 50 measuring environment.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
VEE  
IEE  
negative supply voltage  
4.725 4.5  
4.275  
80  
V
negative supply current  
60  
270  
mA  
mW  
°C  
Ptot  
Tamb  
Tj  
total power dissipation  
note 1  
note 2  
380  
operating ambient temperature  
operating junction temperature  
40  
40  
+85  
+120  
°C  
Main amplifier inputs: IN and INQ; note 3  
Vi(sens)  
Vi(p-p)  
input sensitivity  
note 4  
note 4  
0.5  
2.5  
mV  
mV  
signal voltage swing (peak-to-peak  
value)  
2.5  
600  
VI  
DC input voltage  
note 5  
note 6  
note 7  
note 8  
note 9  
2.4  
2.1  
0.2  
1.7  
V
VIO  
Zi  
input offset voltage  
single-ended input impedance  
single-ended small signal gain  
differential voltage gain  
output noise power  
noise figure  
mV  
100  
40  
S21  
Gv(dif)  
No  
34  
dB  
dB  
dBm  
dB  
GHz  
48.5  
120  
11  
note 10  
note 10  
F
B3dB  
3 dB bandwidth  
2.4  
3.0  
Rectifier outputs: AGC and AGCDC; note 11  
VO(ref)  
Vi(p-p)  
DC reference voltage  
open output  
3.3  
3.0  
2.5  
V
input voltages on pins IN and INQ for  
linear rectifier output (peak-to-peak  
value)  
12.5  
60  
mV  
V  
maximum input signal level related  
voltage difference  
note 12  
note 13  
400  
mV  
mV  
VOO  
output offset voltage  
5  
+5  
Rectifier outputs: LOS and LOSDC; note 11  
VO(ref)  
Vi(p-p)  
DC reference voltage  
open output  
3.4  
3.1  
2.6  
V
input voltages on pins IN and INQ for  
linear recitifier output (peak-to-peak  
value)  
2.5  
9
mV  
V  
maximum input signal level related  
voltage difference  
note 12  
note 13  
450  
mV  
mV  
VOO  
output offset voltage  
15  
+15  
Automatic offset compensation lowpass filter: COFF and COFFQ  
VO  
R
DC output voltage  
open output  
2.4  
2.1  
1.7  
V
offset compensation filter resistance  
1250  
Band gap reference: REF  
VO  
band gap voltage  
referenced to VEE  
;
1.1  
1.3  
1.5  
V
open output; note 14  
2000 Sep 29  
15  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
SYMBOL  
Band gap reference decoupling: CAPA  
VO decoupling voltage  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
referenced to VEE  
;
2.9  
V
open output  
Main amplifier outputs: OUT and OUTQ; note 15  
VOH  
VOL  
tr  
HIGH-level output voltage  
LOW-level output voltage  
differential output rise time  
differential output fall time  
single-ended output impedance  
20  
280  
5  
0
mV  
mV  
ps  
note 16  
200  
100  
100  
100  
140  
150  
150  
117  
input signal >2.5 mV (p-p)  
input signal >2.5 mV (p-p)  
see Fig.6  
tf  
ps  
Zo  
83  
Notes  
1. No special cooling is required in the application if the total thermal resistance Rth(j-a) is less than 90 K/W.  
2. The temperature of the PCB in the vicinity of the IC is taken to be the ambient temperature.  
3. The input signal must be AC-coupled to the inputs through a coupling capacitance >22 nF.  
4. Vi(p-p) is the input signal on IN and INQ for full output clipping. It is assumed that both inputs carry a complementary  
signal of the specified peak-to-peak value. The lower specified limit is usually called the input sensitivity. This value  
is defined as a 20% increase in rise and fall times when compared to rise and fall times with a complementary input  
signal of 10 mV (p-p) applied to IN and INQ.  
5. The DC voltage is fixed internally; only AC-coupling of the input signal is allowed.  
6. VIO = V IN V INQ  
7. See Section “RF input matching circuit” for detailed information.  
8. All signal ports are AC-matched to 50 and are measured at 1 GHz (see Fig.7). Flatness deviations are within ±3 dB  
over the entire bandwidth.  
9. See Section “RF gain and group delay measurements”.  
10. F is the noise figure for a differential application and is measured at 1 GHz. See Section “Noise figure  
measurements”.  
11. An external 100 nF capacitor is connected at each output to remove any spurious high frequency signals.  
Any circuitry driven from these pins must have an input impedance >50 k.  
12. Voltage difference between AGC (LOS) and AGCDC (LOSDC), measured with a differential square wave input  
signal of 600 mV (p-p) on IN and INQ.  
13. The offset is measured with inputs IN and INQ shorted together.  
14. The band gap voltage may not be used as an external reference.  
15. Both outputs are connected to ground through a 50 load resistance and carry complementary signals.  
16. The output levels are dependent on load impedance. The specified values assume an external load impedance of  
50 . If the external 100 matching resistors are connected at pins OUT and OUTQ, the output levels will fall to  
75% of the specified values (see also Section “RF gain and group delay measurements”).  
2000 Sep 29  
16  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
APPLICATION INFORMATION  
CGY2100  
OQ2541HP  
OQ2538HP  
R
FB  
data  
I
PHOTO  
to data and  
clock recovery unit  
FILTER  
recovered  
clock  
TRANS-  
IMPEDANCE  
AMPLIFIER  
DATA AND  
CLOCK  
RECOVERY  
LIMITING  
AMPLIFIER  
V
bias  
MGE748  
PHOTODIODE  
Fig.13 System application diagram.  
C
IN  
OUT  
IN  
8
32  
30  
IN  
OUTQ  
>22 nF  
200 Ω  
C
INQ  
INQ  
6
COFF  
INQ  
45  
>22 nF  
100  
nF  
OQ2538HP  
COFFQ  
44  
21  
22  
AGC  
3
GAIN  
REGULATION  
REF  
AGCDC  
43  
CAPA  
100  
nF  
100  
nF  
1 nF  
19  
LOS  
18  
LOSDC  
V
GND  
EE  
V
EE  
LOSS OF SIGNAL  
DETECTION  
10 µH  
4.5 V  
4.7  
µF  
100  
nF  
100  
nF  
33  
nF  
MGE749  
Fig.14 Typical application schematic.  
17  
2000 Sep 29  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
C
IN  
OUT  
32  
IN  
IN  
8
6
OUTQ  
30  
>22 nF  
200 Ω  
C
INQ  
INQ  
COFF  
45  
INQ  
>22 nF  
100  
nF  
OQ2538HP  
COFFQ  
44  
AGC  
3
GAIN  
REGULATION  
REF  
21  
AGCDC  
43  
CAPA  
22  
100  
nF  
100  
nF  
1 nF  
19  
LOS  
18  
LOSDC  
V
GND  
EE  
V
EE  
LOSS OF SIGNAL  
DETECTION  
BAS85  
10 µH  
5.0 V  
4.7  
µF  
100  
nF  
100  
nF  
33  
nF  
MGM113  
Fig.15 5 V application schematic.  
2000 Sep 29  
18  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
BONDING PAD LOCATIONS  
V
29  
30  
31  
32  
33  
34  
35  
36  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
n.c.  
EE  
AGC  
GND  
GND  
INQ  
GND  
GND  
OUT  
GND  
OUTQ  
GND  
GND  
(1)  
2.07  
mm  
x
0
0
y
GND  
IN  
OQ2538U  
GND  
GND  
V
EE  
V
2
3
4
5
6
7
8
9
10  
V
EE  
EE  
(1)  
2.07 mm  
MGR525  
(1) Typical value.  
Fig.16 Bonding pad locations of OQ2538U.  
2000 Sep 29  
19  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
Table 1 Bonding pad locations. All x/y coordinates  
represent the position of the centre of the pad  
with respect to the centre of the die (see  
Fig.16).  
COORDINATES  
COORDINATES  
PAD  
SYMBOL  
GND  
PAD  
SYMBOL  
GND  
x
y
x
y
1
2
900  
900  
700  
500  
300  
100  
+100  
+300  
+500  
+700  
+900  
+900  
+900  
+900  
+900  
+900  
+900  
+900  
700  
900  
900  
900  
900  
900  
900  
900  
900  
900  
900  
700  
500  
300  
100  
+100  
+300  
+500  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
+900  
+900  
+700  
+500  
+300  
+100  
100  
300  
500  
700  
900  
900  
900  
900  
900  
900  
900  
900  
+700  
+900  
+900  
+900  
+900  
+900  
+900  
+900  
+900  
+900  
+900  
+700  
+500  
+300  
+100  
100  
300  
500  
VEE  
n.c.  
VEE  
3
GND  
n.c.  
GND  
GND  
LOSDC  
LOS  
GND  
REF  
CAPA  
VEE  
4
5
GND  
GND  
AGCDC  
COFFQ  
COFF  
VEE  
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
VEE  
VEE  
AGC  
GND  
GND  
INQ  
GND  
GND  
OUTQ  
GND  
OUT  
GND  
GND  
IN  
GND  
Table 2 Physical characteristics of bare die  
PARAMETER  
VALUE  
0.8 µm silicon nitride on top of 0.9 µm PSG (PhosphoSilicate Glass)  
Glass passivation  
Bonding pad dimension  
Metallization  
Thickness  
minimum dimension of exposed metallization is 90 × 90 µm (pad size = 100 × 100 µm)  
1.8 µm AlCu (1% Cu)  
380 µm nominal  
Size  
2.070 × 2.070 mm (4.285 mm2)  
Backing  
silicon; electrically connected to VEE potential through substrate contacts  
<440 °C; recommended die attache is glue  
<15 s  
Attache temperature  
Attache time  
2000 Sep 29  
20  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
PACKAGE OUTLINE  
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm  
SOT313-2  
c
y
X
36  
25  
A
E
37  
24  
Z
E
e
H
E
A
2
A
(A )  
3
A
1
w M  
p
θ
pin 1 index  
b
L
p
L
13  
48  
detail X  
1
12  
Z
v M  
D
A
e
w M  
b
p
D
B
H
v
M
B
D
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.  
7o  
0o  
0.20 1.45  
0.05 1.35  
0.27 0.18 7.1  
0.17 0.12 6.9  
7.1  
6.9  
9.15 9.15  
8.85 8.85  
0.75  
0.45  
0.95 0.95  
0.55 0.55  
1.60  
mm  
0.25  
0.5  
1.0  
0.2 0.12 0.1  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
99-12-27  
00-01-19  
SOT313-2  
136E05  
MS-026  
2000 Sep 29  
21  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
SOLDERING  
Use a double-wave soldering method comprising a  
turbulent wave with high upward pressure followed by a  
smooth laminar wave.  
Introduction to soldering surface mount packages  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “Data Handbook IC26; Integrated Circuit Packages”  
(document order number 9398 652 90011).  
For packages with leads on two sides and a pitch (e):  
– larger than or equal to 1.27 mm, the footprint  
longitudinal axis is preferred to be parallel to the  
transport direction of the printed-circuit board;  
There is no soldering method that is ideal for all surface  
mount IC packages. Wave soldering can still be used for  
certain surface mount ICs, but it is not suitable for fine pitch  
SMDs. In these situations reflow soldering is  
recommended.  
– smaller than 1.27 mm, the footprint longitudinal axis  
must be parallel to the transport direction of the  
printed-circuit board.  
The footprint must incorporate solder thieves at the  
downstream end.  
Reflow soldering  
For packages with leads on four sides, the footprint must  
be placed at a 45° angle to the transport direction of the  
printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
Several methods exist for reflowing; for example,  
convection or convection/infrared heating in a conveyor  
type oven. Throughput times (preheating, soldering and  
cooling) vary between 100 and 200 seconds depending  
on heating method.  
Typical dwell time is 4 seconds at 250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
Typical reflow peak temperatures range from  
215 to 250 °C. The top-surface temperature of the  
packages should preferable be kept below 220 °C for  
thick/large packages, and below 235 °C for small/thin  
packages.  
Manual soldering  
Fix the component by first soldering two  
diagonally-opposite end leads. Use a low voltage (24 V or  
less) soldering iron applied to the flat part of the lead.  
Contact time must be limited to 10 seconds at up to  
300 °C.  
Wave soldering  
Conventional single wave soldering is not recommended  
for surface mount devices (SMDs) or printed-circuit boards  
with a high component density, as solder bridging and  
non-wetting can present major problems.  
When using a dedicated tool, all other leads can be  
soldered in one operation within 2 to 5 seconds between  
270 and 320 °C.  
To overcome these problems the double-wave soldering  
method was specifically developed.  
If wave soldering is used the following conditions must be  
observed for optimal results:  
2000 Sep 29  
22  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
Suitability of surface mount IC packages for wave and reflow soldering methods  
SOLDERING METHOD  
WAVE  
REFLOW(1)  
not suitable suitable  
PACKAGE  
BGA, LFBGA, SQFP, TFBGA  
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS  
PLCC(3), SO, SOJ  
not suitable(2)  
suitable  
suitable  
suitable  
LQFP, QFP, TQFP  
not recommended(3)(4) suitable  
not recommended(5)  
suitable  
SSOP, TSSOP, VSO  
Notes  
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum  
temperature (with respect to time) and body size of the package, there is a risk that internal or external package  
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the  
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.  
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink  
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).  
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.  
The package footprint must incorporate solder thieves downstream and at the side corners.  
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;  
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is  
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
2000 Sep 29  
23  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
DATA SHEET STATUS  
PRODUCT  
DATA SHEET STATUS  
STATUS  
DEFINITIONS (1)  
Objective specification  
Development This data sheet contains the design target or goal specifications for  
product development. Specification may change in any manner without  
notice.  
Preliminary specification Qualification  
This data sheet contains preliminary data, and supplementary data will be  
published at a later date. Philips Semiconductors reserves the right to  
make changes at any time without notice in order to improve design and  
supply the best possible product.  
Product specification  
Production  
This data sheet contains final specifications. Philips Semiconductors  
reserves the right to make changes at any time without notice in order to  
improve design and supply the best possible product.  
Note  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
DEFINITIONS  
DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes, without notice, in the  
products, including circuits, standard cells, and/or  
software, described or contained herein in order to  
improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for  
the use of any of these products, conveys no licence or title  
under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that  
these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified.  
Application information  
Applications that are  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2000 Sep 29  
24  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
NOTES  
2000 Sep 29  
25  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
NOTES  
2000 Sep 29  
26  
Philips Semiconductors  
Product specification  
SDH/SONET STM16/OC48 main amplifiers  
OQ2538HP; OQ2538U  
NOTES  
2000 Sep 29  
27  
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Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),  
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United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,  
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421  
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,  
Tel. +82 2 709 1412, Fax. +82 2 709 1415  
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Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,  
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Uruguay: see South America  
Vietnam: see Singapore  
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,  
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Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,  
Middle East: see Italy  
Tel. +381 11 3341 299, Fax.+381 11 3342 553  
For all other countries apply to: Philips Semiconductors,  
Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN,  
The Netherlands, Fax. +31 40 27 24825  
Internet: http://www.semiconductors.philips.com  
70  
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© Philips Electronics N.V. 2000  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
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Printed in The Netherlands  
403510/03/pp28  
Date of release: 2000 Sep 29  
Document order number: 9397 750 07553  
Philips Semiconductors: Product information on OQ2538HP; OQ2538U, SDH/SONET STM16/OC48 main amplifiers  
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The OQ2538HP is a limiting amplifier IC intended for use as the main amplifier in 2.5 Gbits/s Non-Return  
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Comprised of four amplifier stages with a total gain of 48.5 dB, it provides for a wide input signal dynamic  
range at a constant CML-compatible output level.  
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Two level-detection circuits are provided for monitoring AGC and LOS input signal levels. An internal  
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Differential 100 Ohm outputs for direct connection to Current-Mode Logic (CML) inputs  
Wide bandwidth (3 GHz)  
48.5 dB limiting gain  
Noise figure typically 11 dB  
Automatic offset compensation  
Input level-detection circuits for Automatic Gain Control (AGC) and Loss Of Signal (LOS) detection  
Low power dissipation (typically 270 mW)  
Single -4.5 V supply voltage  
Low cost LQFP48 plastic package.  
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Main amplifier in Synchronous Digital Hierarchy (SDH) and Synchronous Optical Network  
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