P7CC145AEW/XXXX [NXP]

IC MROM, 24 MHz, MICROCONTROLLER, WAFER, Microcontroller;
P7CC145AEW/XXXX
型号: P7CC145AEW/XXXX
厂家: NXP    NXP
描述:

IC MROM, 24 MHz, MICROCONTROLLER, WAFER, Microcontroller

时钟 微控制器 外围集成电路
文件: 总10页 (文件大小:152K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
SHORT FORM SPECIFICATION  
P7CC145  
SmartXA-Family  
Secure 16-bit Smart Card Controller  
Short Form Specification  
Revision 1.2  
2004 June 16  
Philips Semiconductors  
Short Form Specification Revision 1.2 2004 June 16  
SmartXA-Family  
Secure 16-bit Smart Card Controller  
P7CC145  
CONTENTS  
1
2
3
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
FEATURES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
3.1  
3.2  
3.3  
3.4  
FAMILY STANDARD FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
SECURITY FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
SUPPORT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
P7CC145 PRODUCT SPECIFIC FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
4
ORDERING INFORMATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
PINNING INFORMATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Smart Card contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
5
5.1  
Note:  
Specification may be changed without further notice.  
2
Philips Semiconductors  
Short Form Specification Revision 1.2 2004 June 16  
SmartXA-Family  
Secure 16-bit Smart Card Controller  
P7CC145  
1
DESCRIPTION  
Bi-directional half-duplex serial data transmission  
according to standard specification ISO/IEC 7816-3 plus a  
couple of proprietary enhancements are provided by the  
UART and two associated 1-bit I/O ports.  
Philips Semiconductors SmartXA (eXtended Architecture)  
is a secure 16-bit microcontroller, manufactured in an  
advanced CMOS process. It is a major part of Philips  
Smart Card Controller ICs family concept offering a  
complete product range suiting the different needs of up  
coming Smart Card generations.  
A DMA extension to the UART can be used to facilitate  
reception and transmission of data blocks with maximum  
serial I/O throughput at reduced CPU payload.  
The SmartXA 2nd generation with extended memory and  
enhanced security features fulfils the increasing  
requirements of secure multi-application in a  
multi-provider environment. It is designed for embedding  
into chip cards according to ISO 7816.  
Two 16-bit timers/counters can be used to control software  
task timing, or to count UART bit-time events for serial data  
transmission delay control or time-out detection.  
Seven vectorized hardware Event Interrupts from I/Os,  
timers/counters, EEPROM, FameX co-processor and  
UART interface provide real-time operation support and  
convenient system control with a minimum of CPU  
payload.  
The high performance of its true 16-bit CPU easily handles  
the requirements of high performance, high security  
applications. Furthermore it provides an optimum support  
for interpreter based languages taking into account the low  
power demand of e.g. mobile communication application.  
The SmartXA 2nd generation is an ideal base for future  
open software platform concepts.  
These on-chip peripherals are controlled via Special  
Function Registers (SFRs).  
Like the CPU registers, two 8-bit Byte-SFRs may be  
accessed as one 16-bit Word-SFR, where appropriate.  
Special attention was drawn to the design of the security  
architecture, in order to achieve the high degree of  
protection against attacks. Each security measure is  
designed to act as an integral part of the complete security  
system in order to strengthen the design as a whole. The  
security measures are solely controlled by hardware and  
do not allow for software guided exceptions.  
Two power-saving modes with reduced activity are  
provided: IDLE mode and SLEEP/CLOCK STOP mode.  
They are activated by software and terminated by certain  
hardware events.  
The P7CC145 operates with a single 1.8 V, 3 V or 5 V  
power supply, at externally sourced clock in the frequency  
range of 1 MHz to 6 MHz.  
The SmartXA 2nd generation is the right choice for users  
looking for high performance and secure multi application.  
Its unique hardware firewall concept, build on three  
operation modes and an extended Memory Management  
Unit (MMU) provides the integrity of multiple application  
and its data and also allows secure download of  
applications.  
Software development for the User ROM, and real-time  
testing of the firmware in application environments is  
supported by  
Ashling Ultra-Emulator platform, stand alone ROM  
prototyping boards and ISO 7816 card interface board  
(www.ashling.com)  
The EEPROM memory can be used as data memory or as  
program memory. It contains a high reliability cell which  
guarantees data integrity. This is especially important  
when the EEPROM is used as memory for native  
programs.  
Raisonance, RKitPXA, RKitEXA Development Suite  
(includes RIDE, C-Compiler, Assembler, Simulator,  
card interface board and Realtime Emulator)  
(www.raisonance.com)  
Tasking C-Compiler  
(www.tasking.com)  
The integrated co-processor FameX accelerates the  
encipherment for Public Key encryption algorithms. This  
widens the field of applications for this device, since it can  
be used as a tamper-resistant security tool for secured and  
authenticated communication in open networks.  
for real-time testing of the firmware especially in the Smart  
Card terminal environment.  
Prototyping is supported by a small-outline package  
(SO28).  
A Triple-DES co-processor together with a True Random  
Number Generator (TRNG) and a Cyclic Redundancy  
Code (CRC) unit complete the leading edge technology  
and security of the product family.  
3
Philips Semiconductors  
Short Form Specification Revision 1.2 2004 June 16  
SmartXA-Family  
Secure 16-bit Smart Card Controller  
P7CC145  
2
BLOCK DIAGRAM  
VSS  
VDD  
CLK  
EEPROM  
FameX  
RAM  
ROM  
POWER-ON/OFF  
RESET  
CLOCK  
INPUT  
FILTER  
144 Kbytes  
DATA &  
PROGRAM  
MEMORY  
REGISTER  
FILE  
7 Kbytes  
256 Kbytes  
PROGRAM  
MEMORY  
PUBLIC KEY  
CO-PROCESSOR  
DATA  
MEMORY  
EXCEPTION  
SENSORS  
RESET  
GENERATOR  
(1)  
(1)  
CODE MMU  
DATA MMU  
XA  
CPU  
CLOCK  
GENERATION  
TIMERS  
I/O  
TRIPLE-DES  
CO-  
PROCESSOR  
TRUE RANDOM  
NUMBER  
GENERATOR  
16 BIT 16 BIT  
PROGRAMMABLE  
I/O  
T0  
T1  
INTERRUPT  
SYSTEM  
I/O2  
I/O1  
RST  
(1) MMU = Memory Management Unit  
Fig.1 Block Diagram P7CC145.  
4
Philips Semiconductors  
Short Form Specification Revision 1.2 2004 June 16  
SmartXA-Family  
Secure 16-bit Smart Card Controller  
P7CC145  
3
FEATURES  
Multiple source vectorized interrupt system comprising  
– 16 software trap interrupts  
3.1  
FAMILY STANDARD FEATURES  
– 7 hardware event interrupts  
Full 16-bit architecture  
– 7 software interrupts  
– 16-bit fully static CPU  
– 7 system exception interrupts  
Multiple source reset system  
– Harvard architecture: separate data- and program  
memory  
Power-saving IDLE mode  
– user configurable support for an unified memory  
model  
Low-power SLEEP and CLOCK STOP mode  
– EEPROM for data storage and program execution  
I/O-interface for S/W, and H/W functions UART and  
External Interrupt  
Hardware firewall security providing System mode,  
Meta mode and User mode with memory protection  
Pad configuration according to ISO 7816-3: VSS, VDD,  
CLK, RST, I/O1  
Dynamic Memory Management Unit (MMU) for program  
and data memory  
Second 1-bit I/O port for full-duplex serial data  
communication; can be left unconnected if only one I/O  
is required.  
4 Mbytes program memory address range with ROM  
and EEPROM  
1 MByte data memory address range with RAM and  
EEPROM  
3.2  
SECURITY FEATURES  
Hardware firewall and dynamic MMU  
Power-on reset  
Versatile page mode EEPROM programming  
Byte/Wordwise EEPROM read access  
True Random Number Generator  
Low supply voltage sensor (LVS)  
High supply voltage sensor (HVS)  
Low clock frequency sensor (LFS)  
High clock frequency sensor (HFS)  
High temperature sensor (HTS)  
Low temperature sensor (LTS)  
UART for fast serial data transfer  
– according to ISO/IEC 7816-3, supporting protocol  
types T=0 and T=1  
with proprietary enhancements  
– to accomplish fast personalization  
– to provide fast application download capabilities  
21 16-bit CPU registers  
Clock input filter for protection against spikes  
On-chip self test utilizing signature techniques  
– 4 banks of R0 to R3 registers for fast context  
switching plus R4 to R7 registers, each capable of  
performing all arithmetic and logic operations  
EEPROM programming timing independent from  
external clock  
EEPROM programming operation controlled by  
2 separate stack pointers for  
– System mode and Meta mode (SSP)  
– User mode (USP)  
hardware sequencer  
On-chip EEPROM programming voltage generation  
Electronic fuses for safeguarded mode and write access  
control  
Complex instruction set  
64 EEPROM bytes for customer-defined security  
FabKey, featuring batch-, wafer- or die-individual  
security data  
– all commands scalable as 8 or 16-bit  
– tailored for high level languages  
– including bit-wise operations as well as fast 16 x 16  
multiply and 32/16 divide  
64 EEPROM bytes OTP (One-Time-Programmable)  
security data, featuring 512 program-only flags which  
can be used in System mode as irreversible event  
memory.  
Multi-tasking and real-time executive support with  
– flexible interrupt structure  
– segmented data memory  
– multiple stacks for easy context-switching  
5
Philips Semiconductors  
Short Form Specification Revision 1.2 2004 June 16  
SmartXA-Family  
Secure 16-bit Smart Card Controller  
P7CC145  
3.3  
NEW FEATURES  
– 2048 bits maximum key length for RSA with randomly  
chosen modulus  
Hardware extensions for the support of Interpreter  
based systems, e.g. Java Card ® Virtual Machines  
– 3 register banks for fast operation mode switching  
– < 400 ms typical encryption time of 1024-bit RSA  
with randomly chosen modulus  
Extended Registerfile  
– Additional 5 word registers  
– 32-bit key length increments  
All the registers are word-, byte and bit-addressable  
– boolean operations for acceleration of standard,  
symmetric cipher algorithms  
Additional Pointers can be used as Auxiliary Pointers,  
e.g. as Java ® Stackpointer  
High speed Triple-DES co-processor  
– DES3 calculation time (including key load) < 110 ms  
CRC Module  
Extended instruction set especially for the added  
registers  
Continuous range checking for one word registers in  
order to detect ‘Out of Range Violations’  
– CRC-16  
Additional word SFR for multi purpose value range  
– CRC-32  
checking  
– real-time CRC calculation without adding wait states  
– three different polynomials are supported  
Two additional Code Segment (CS) Registers for faster  
and easier addressing of code memory  
– three different sources selectable for CRC  
calculations:  
3.4  
P7CC145 PRODUCT SPECIFIC FEATURES  
- Data memory read & write  
256 Kbytes User ROM  
- Code memory read & write  
6144 bytes + 1056 bytes DATA RAM  
144 Kbytes EEPROM  
- Op-code bytes of instructions as they are executed  
Two 16-bit Timers/Counters  
Versatile page mode EEPROM programming of  
1 to 128 bytes at a time  
– individually configurable  
– internal CPU clock is the basic clock in timer modes  
Typical EEPROM page mode programming time:  
4.0 ms (with normal Program mode)  
2.0 ms (with Program Only mode) (1)  
– UART's bit-time (etu) events are sensed in the  
counter mode  
UART DMA  
32 ms/1 KByte, i.e. 2s for full 144 Kbytes EEPROM  
(normal program mode)  
– CPU independent transmission of data from UART to  
data memory and vice versa  
16 ms/1 KByte, i.e. 1s for full 144 Kbytes EEPROM  
(program only mode)  
– configurable for the entire addressable DATA RAM  
(6 Kbytes + 1056 bytes)  
EEPROM endurance: up to 500 k programming cycles  
per byte  
Software Configurable Clock System  
EEPROM data retention time: 20 years minimum  
– CPU clock  
- External CLK: 1 to 6 MHz  
- Internal clock: 1, 4, 6, 9, 12, 14, 18 or 24 MHz  
Crypto co-processor FameX (Fast Accelerator for  
Modular Exponentiation-eXtended) optimized for public  
key cryptographic calculations  
– Triple-DES clock  
is always 2 times the CPU clock  
– the major Public Key Cryptosystems like RSA,  
El’Gamal, DSS, Diffie-Hellmann, Guillou-Quisquater,  
Fiat-Shamir and elliptic curve cryptosystems (ECC)  
are supported  
– FameX clock  
is configured independent from the CPU clock  
- External CLK: 1 to 6 MHz  
- Internal clock: 9, 18, 36 or 48 MHz  
(1) requires EEPROM delivery with physically full erased state  
“Full Erase”  
6
Philips Semiconductors  
Short Form Specification Revision 1.2 2004 June 16  
SmartXA-Family  
Secure 16-bit Smart Card Controller  
P7CC145  
– Timers/Counters  
Wake-up from SLEEP and CLOCK STOP mode by  
Reset or External Interrupt (via I/O1 or I/O2)  
- Basic TIMER clock is always the CPU clock. Timer  
mode increment rate is configurable via prescalers,  
individually for Timer 0 and Timer 1, for basic clock  
frequency division by  
Wake-up from IDLE mode by Reset, External Interrupt,  
Timer or UART  
1.62 V to 5.5 V operating voltage range for ISO chip  
1
4
card UART operation  
• −25 to +85 °C operating ambient temperature range  
16  
64  
4 kV Electro Static Discharge (ESD) protection on ISO  
pads according to MIL Standard 883-C Method 3015  
- COUNTER mode  
provides counting of ISO UART etu events  
Controlled IDDQ test for enhanced product reliability  
– UART Baudrate  
Basic UART clock is always the external CLK:  
1 to 6 MHz. UART 'bit rate adjustment' and 'clock rate  
conversion' are configurable via  
- Baudrate timer overflow rate  
- UART prescaler for overflow rate division by  
4 (proprietary high-speed mode):  
up to 750.0 kbit/s @ fCLK = 6.0000 MHz  
31 (ISO/IEC 7816-3):  
9.6 to 115.2 kbit/s @ fCLK = 3.5712 MHz  
32 (ISO/IEC 7816-3):  
9.6 to 153.6 kbit/s @ fCLK = 4.9152 MHz  
4
ORDERING INFORMATION  
PACKAGE  
TEMPERATURE  
RANGE (°C)  
TYPE NUMBER  
NAME  
DESCRIPTION  
VERSION  
P7CC145AEW/x..x  
FFC  
sawn wafer on film frame carrier  
25 to +85  
7
Philips Semiconductors  
Short Form Specification Revision 1.2 2004 June 16  
SmartXA-Family  
Secure 16-bit Smart Card Controller  
P7CC145  
5
PINNING INFORMATION  
Smart Card contacts  
Contact Configuration in ISO 7816 UART Applications:  
Chip card power VCC is to be connected to card contact  
C1 (VDD).  
5.1  
Two different Chip Card contact assignments may be  
chosen. The characteristical differences are:  
Chip card ground GND is to be connected to card  
contact C5 (VSS).  
1. Standard ISO 7816 UART contact interface (see Fig.2)  
- IC pin I/O1 is bonded to card contact C7 (I/O)  
- C4 and C8 are not bonded  
C2 (RST) must be connected with chip card reset signal  
RST.  
C3 (CLK) must be connected with chip card clock signal  
2. ISO 7816 UART contact interface plus proprietary  
2nd I/O (see Fig.3)  
CLK.  
Bi-directional serial data line I/O is to be connected to  
- IC pin I/O1 is bonded to card contact C7 (I/O or I/O1)  
- IC pin I/O2 is bonded to card contact C8 (I/O2)  
- C4 is not bonded  
card contact C7 (I/O1).  
C6 (N.C.) is internally not connected to the IC. C6 should  
be left unconnected, or may be connected to VSS or  
VDD.  
VDD  
C1  
C5  
VSS  
N.C.  
I/O1  
RST  
CLK  
C2  
C3  
C6  
C7  
N.C.  
N.C.  
C4  
C8  
Fig.2 Standard Chip Card Contact Configuration according to ISO 7816.  
8
Philips Semiconductors  
Short Form Specification Revision 1.2 2004 June 16  
SmartXA-Family  
Secure 16-bit Smart Card Controller  
P7CC145  
VDD  
C1  
C5  
VSS  
N.C.  
I/O1  
RST  
CLK  
C2  
C3  
C6  
C7  
N.C.  
I/O2  
C4  
C8  
Fig.3 Chip Card Contact Configuration ISO7816 + 2nd I/O(1).  
Table 1 Bond pad assignments to Smart Card contacts according to ISO 7816-2  
ISO 7816  
ISO7816  
SYMBOL  
P7CC145  
CONTACTS  
SYMBOL  
DESCRIPTION  
C1  
C2  
C3  
C4  
C5  
C6  
C7  
C8  
VCC  
RST  
VDD  
RST  
CLK  
N.C.  
VSS  
N.C.  
I/O1  
N.C.  
Power supply voltage input  
Reset input, active LOW  
Clock input  
CLK  
reserved  
GND  
not connected, or  
Ground (reference voltage) input  
not connected  
VPP  
I/O  
ISO7816 Input/Output #1 for serial data  
not connected, or  
reserved  
C8  
reserved  
I/O2  
Input/Output #2 for serial data  
9
Philips Semiconductors – a worldwide company  
Contact information  
For additional information please visit http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.  
© Koninklijke Philips Electronics N.V. 2002  
SCA74  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  

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