PBRP113ZTT/R [NXP]
PRE-BIASED "DIGITAL" TRANSISTOR,40V V(BR)CEO,600MA I(C),SOT-23;型号: | PBRP113ZTT/R |
厂家: | NXP |
描述: | PRE-BIASED "DIGITAL" TRANSISTOR,40V V(BR)CEO,600MA I(C),SOT-23 晶体 小信号双极晶体管 开关 光电二极管 |
文件: | 总12页 (文件大小:112K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PBRP113ET
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
Rev. 01 — 17 December 2007
Product data sheet
1. Product profile
1.1 General description
800 mA PNP low VCEsat Breakthrough In Small Signal (BISS) Resistor-Equipped
Transistor (RET) in a small SOT23 (TO-236AB) Surface-Mounted Device (SMD) plastic
package.
NPN complement: PBRN113ET.
1.2 Features
I 800 mA repetitive peak output current
I Low collector-emitter saturation voltage
VCEsat
I High current gain hFE
I Built-in bias resistors
I Simplifies circuit design
I Reduces component count
I Reduces pick and place costs
I ±10 % resistor ratio tolerance
1.3 Applications
I Digital application in automotive and
industrial segments
I Switching loads
I Medium current peripheral driver
1.4 Quick reference data
Table 1.
Symbol
VCEO
IO
Quick reference data
Parameter
Conditions
Min
Typ
Max
−40
Unit
V
collector-emitter voltage
output current
open base
-
-
-
-
-
-
[1][2]
[3]
−600
−800
mA
mA
IORM
repetitive peak output current tp ≤ 1 ms;
δ ≤ 0.33
R1
bias resistor 1 (input)
bias resistor ratio
0.7
0.9
1
1
1.3
1.1
kΩ
R2/R1
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
collector 1 cm2.
[2] Device mounted on a ceramic PCB, Al2O3, standard footprint.
[3] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
2. Pinning information
Table 2.
Pinning
Pin
1
Description
Simplified outline
Symbol
input (base)
3
3
2
2
GND (emitter)
output (collector)
R1
1
3
1
2
R2
sym003
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
-
Description
Version
PBRP113ET
plastic surface-mounted package; 3 leads
SOT23
4. Marking
Table 4.
Marking codes
Type number
PBRP113ET
Marking code[1]
*7K
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VCBO
VCEO
VEBO
VI
Parameter
Conditions
open emitter
open base
Min
Max
−40
−40
−10
Unit
V
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
-
-
-
V
open collector
V
positive
-
-
-
-
+10
V
negative
−10
V
[1][2]
[3]
IO
output current
−600
−800
mA
mA
IORM
repetitive peak output current
tp ≤ 1 ms;
δ ≤ 0.33
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
2 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
Table 5.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
amb ≤ 25 °C
Min
Max
Unit
Ptot
total power dissipation
T
[3]
[1]
[2]
-
250
mW
mW
mW
°C
-
370
-
570
Tj
junction temperature
ambient temperature
storage temperature
-
150
Tamb
Tstg
−55
−65
+150
+150
°C
°C
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[2] Device mounted on a ceramic PCB, Al2O3, standard footprint.
[3] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
006aaa998
600
(1)
P
tot
(mW)
400
(2)
(3)
200
0
−75
−25
25
75
125
175
(°C)
T
amb
(1) Ceramic PCB, Al2O3 standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm2
(3) FR4 PCB, standard footprint
Fig 1. Power derating curves for SOT23 (TO-236AB)
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
3 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
6. Thermal characteristics
Table 6.
Symbol
Rth(j-a)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from
junction to ambient
in free air
[1]
[2]
[3]
-
-
-
-
-
-
-
-
500
338
219
105
K/W
K/W
K/W
K/W
Rth(j-sp)
thermal resistance from
junction to solder point
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
006aab000
3
10
Z
δ = 1
th(j-a)
0.75
0.33
(K/W)
0.50
2
10
0.20
0.10
0.05
10
0.02
0.01
0
1
−1
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23 (TO-236AB); typical values
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
4 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
006aab001
3
10
Z
th(j-a)
δ = 1
(K/W)
0.75
0.33
0.50
2
10
0.20
0.10
0.05
10
0.02
0.01
0
1
−1
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 1 cm2
Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23 (TO-236AB); typical values
006aab002
3
10
Z
th(j-a)
(K/W)
δ = 1
0.75
0.33
2
10
0.50
0.20
0.10
0.05
10
0.02
0.01
0
1
−1
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
Ceramic PCB, Al2O3 standard footprint
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for
SOT23 (TO-236AB); typical values
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
5 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
7. Characteristics
Table 7.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ICBO
collector-base cut-off
current
VCB = −30 V;
IE = 0 A
-
-
−100
nA
ICEO
IEBO
hFE
collector-emitter cut-off VCE = −30 V;
-
-
−0.5
−4
µA
current
IB = 0 A
emitter-base cut-off
current
VEB = −5 V;
IC = 0 A
-
-
mA
DC current gain
VCE = −5 V;
IC = −50 mA
40
130
140
-
65
-
[1]
[1]
VCE = −5 V;
IC = −300 mA
190
210
−35
−70
−200
−450
−1
-
VCE = −5 V;
IC = −600 mA
-
VCEsat
collector-emitter
saturation voltage
IC = −50 mA;
IB = −2.5 mA
−45
−100
−300
−750
−1.5
−1.8
mV
mV
mV
mV
V
IC = −200 mA;
IB = −10 mA
-
[1]
[1]
IC = −500 mA;
IB = −10 mA
-
IC = −600 mA;
IB = −6 mA
-
VI(off)
VI(on)
off-state input voltage
on-state input voltage
VCE = −5 V;
IC = −100 µA
−0.6
−1
VCE = −0.3 V;
IC = −20 mA
−1.3
V
R1
bias resistor 1 (input)
bias resistor ratio
0.7
0.9
-
1
1.3
1.1
-
kΩ
R2/R1
Cc
1
collector capacitance
VCB = −10 V;
IE = ie = 0 A;
f = 1 MHz
11
pF
[1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
6 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
006aab073
006aab074
3
−1
10
−10
(1)
(2)
(3)
h
FE
V
CEsat
(V)
2
10
(1)
(2)
(3)
10
1
−1
−2
10
−10
−1
2
3
2
3
−10
−1
−10
−10
−10
−10
−10
−10
I
(mA)
I (mA)
C
C
VCE = −5 V
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
Fig 5. DC current gain as a function of collector
current; typical values
Fig 6. Collector-emitter saturation voltage as a
function of collector current; typical values
006aab075
006aab076
−1
−1
V
V
CEsat
(V)
CEsat
(V)
(1)
(2)
(3)
−1
−10
(1)
(3)
(2)
−2
−1
−10
−10
2
3
2
3
−10
−10
−10
−10
−10
−10
I
(mA)
I (mA)
C
C
IC/IB = 50
IC/IB = 100
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
Fig 7. Collector-emitter saturation voltage as a
function of collector current; typical values
Fig 8. Collector-emitter saturation voltage as a
function of collector current; typical values
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
7 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
006aab077
006aab078
−10
−10
V
I(on)
V
I(off)
(V)
(V)
(1)
(2)
(1)
(2)
−1
−1
(3)
(3)
−1
−1
−10
−10
−1
2
3
−1
2
−10
−1
−10
−10
−10
−10
−1
−10
−10
I
(mA)
I (mA)
C
C
VCE = −0.3 V
VCE = −5 V
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig 9. On-state input voltage as a function of collector
current; typical values
Fig 10. Off-state input voltage as a function of collector
current; typical values
8. Package outline
3.0
2.8
1.1
0.9
3
0.45
0.15
2.5 1.4
2.1 1.2
1
2
0.48
0.38
0.15
0.09
1.9
Dimensions in mm
04-11-04
Fig 11. Package outline SOT23 (TO-236AB)
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
8 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
9. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package
Description
Packing quantity
3000
10000
PBRP113ET
SOT23
4 mm pitch, 8 mm tape and reel
-215
-235
[1] For further information and the availability of packing methods, see Section 13.
10. Soldering
2.90
2.50
2
1
0.85
0.85
solder lands
solder resist
3.00
1.30
2.70
solder paste
3
occupied area
Dimensions in mm
0.60
(3x)
0.50 (3x)
0.60 (3x)
1.00
3.30
sot023
Fig 12. Reflow soldering footprint SOT23 (TO-236AB)
3.40
1.20 (2x)
solder lands
solder resist
occupied area
2
1
4.60 4.00 1.20
3
Dimensions in mm
preferred transport direction during soldering
sot023
2.80
4.50
Fig 13. Wave soldering footprint SOT23 (TO-236AB)
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
9 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
11. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PBRP113ET_1
20071217
Product data sheet
-
-
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
10 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of an NXP Semiconductors product can reasonably be expected
12.2 Definitions
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
13. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
PBRP113ET_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2007
11 of 12
PBRP113ET
NXP Semiconductors
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
14. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
1.4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Packing information. . . . . . . . . . . . . . . . . . . . . . 9
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
3
4
5
6
7
8
9
10
11
12
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12.1
12.2
12.3
12.4
13
14
Contact information. . . . . . . . . . . . . . . . . . . . . 11
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 17 December 2007
Document identifier: PBRP113ET_1
相关型号:
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