PCA9957HN_技术文档

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED

driver

Rev. 2 — 25 February 2021

Product data sheet

1 General description

The PCA9957 is a daisy-chain SPI-compatible 4-wire serial bus controlled 24-channel

constant current LED driver optimized for dimming and blinking 32 mA Red/Green/Blue/

Amber (RGBA) LEDs.

Each LED output has its own 8-bit resolution (256 steps) fixed frequency individual

PWM controller that operates at 31.25 kHz with a duty cycle that is adjustable from 0 %

to 100 % to allow the LED to be set to a specific brightness value. An additional 8-bit

resolution (256 steps) group PWM controller has both a fixed frequency of 122 Hz and an

adjustable frequency between 15 Hz to once every 16.8 seconds with a duty cycle that is

adjustable from 0 % to 99.6 % that is used to either dim or blink all LEDs with the same

value.

Each LED output can be off, on (no PWM control), set at its individual PWM controller

value or at both individual and group PWM controller values. The PCA9957 operates with

a supply voltage range of 2.7 V to 5.5 V and the constant current sink LED outputs allow

up to 5 V for the LED supply. The output peak current is adjustable with an 8-bit linear

DAC from 125 µA to 31.875 mA with REXT = 2 kΩ.

Gradation control for all current sources is achieved via the 4-wire serial bus interface

and allows user to ramp current automatically without MCU intervention. 8-bit DACs

are available to adjust brightness levels for each LED current source. There are six

selectable gradation control groups and each group has four independent registers to

control ramp-up and ramp-down rate, step time, hold ON/OFF time and final hold ON

output current. Two gradation operation modes are available for each group: single shot

mode (output pattern once) and continuous mode (output pattern repeat). Each channel

can be set to either gradation mode or normal mode and assigned to any one of these six

gradation control groups.

This device has built-in open, short load and overtemperature detection circuitry. The

error information from the corresponding register can be read via the 4-wire serial bus.

Additionally, a thermal shutdown feature protects the device when internal junction

temperature exceeds the limit allowed for the process.

The PCA9957 device is designed to use 4-wire read/write serial bus with higher data

clock frequency (up to 10 MHz).

The active LOW output enable input pin (OE) blinks all the LED outputs and can be used

to externally PWM the outputs, which is useful when multiple devices need to be dimmed

or blinked together without using software control.

NXP Semiconductors

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

2 Features and benefits

• 24 LED drivers. Each output programmable at:

– Off

– On

– 8 bits programmable LED brightness

– 8 bits programmable group dimming/blinking mixed with individual LED brightness

– Programmable LED output delay to reduce EMI and surge currents

• Gradation control for all channels

– Each channel can be assigned to one of six gradation control groups

– Programmable gradation time and rate for ramp-up and/or ramp-down operations

– Programmable step time (6-bit) from 0.5 ms (minimum) to 512 ms (maximum)

– Programmable hold-on time after ramp-up and hold-off time after ramp-down (3-bit)

from 0 s to 6 s

– Programmable final ramp-up and hold-on current

– Programmable brightness current output adjustment, either linear or exponential

curve

• 24 constant current output channels can sink up to 32 mA, and tolerate up to 5.5 V

when OFF

• Output current adjusted through an external resistor (REXT input)

• Output current accuracy

– ±6.5 % absolute accuracy with 30 mA output current

– Maximum ±4 % channel to channel variation

– Maximum ±6 % device to device variation

• Open/short load/overtemperature detection mode to detect individual LED errors

• 4-wire serial bus interface with 10 MHz data clock rate

• 256-step (8-bit) linear programmable brightness per LED output varying from fully off

(default) to maximum brightness fully ON using a 31.25 kHz PWM signal

• 256-step group brightness control allows general dimming (using a 122 Hz PWM

signal) from fully off to maximum brightness (default)

• 256-step group blinking with frequency programmable from 15 Hz to 16.8 s and duty

cycle from 0 % to 99.6 %

• Active LOW Output Enable (OE) input pin allows for hardware blinking and dimming of

the LEDs

• 8 MHz internal oscillator requires no external components

• Internal power-on reset

• No glitch on LEDn outputs on power-up

• Low standby current

• Operating power supply voltage (V_DD) range of 2.7 V to 5.5 V

• 5.5 V tolerant inputs on non-LED pins

• -40 °C to +85 °C operation

• Latch-up performance exceeds 100 mA per JESD 78, Class II

• ESD protection exceeds per JESD22:

– 2 kV Human-Body Model (A114-A)

– 1 kV Charged-Device Model (C101)

• Package offered: HVQFN40

PCA9957

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Product data sheet

Rev. 2 — 25 February 2021

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NXP Semiconductors

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

3 Applications

• RGB or RGBA LED drivers

• LED status information

• LED displays

• LCD backlights

• Keypad backlights for cellular phones or handheld devices

• Fade-in and fade-out for breathlight control

4 Ordering information

Table 1.ꢀOrdering information

Type number

Topside mark

Package

Name

Description

Version

PCA9957HN

P9957

HVQFN40

Plastic thermal enhanced very thin quad flat

package; no leads; 40 terminals; body 5 x 5 x

0.85 mm

SOT1369-5

4.1 Ordering options

Table 2.ꢀOrdering options

Type number

Orderable part

Package

Packing method

Minimum Temperature

number

order

quantity

PCA9957HN

PCA9957HNMP

HVQFN40

Reel 13" Q2/T3 DP

6000

T_amb= -40 °C to +85 °C

PCA9957

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Product data sheet

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NXP Semiconductors

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

5 Block diagram

REXT

LED0

LED1

LED22

LED23

I/O

REGULATOR

PCA9957

V

DDIO

DAC0

SCLK

SDI

INPUT FILTER

DAC1

individual LED

current setting

8-bit DACs

CS

4-WIRE

SERIAL BUS

CONTROL

DAC

22

SDO

DAC

23

POWER-ON

RESET

V

DD

OUTPUT DRIVER, DELAY CONTROL,

AND THERMAL SHUTDOWN

V

SS

INPUT

FILTER

LED STATE

SELECT

RESET

REGISTER

PWM

GRADATION

CONTROL

REGISTER X

BRIGHTNESS

CONTROL

MUX/

CONTROL

÷ 256

31.25 kHz

GRPFREQ

REGISTER

GRPPWM

8 MHz

REGISTER

OSCILLATOR

DIM CLOCK

'0' - permanently OFF

'1' - permanently ON

OE

aaa-034472

Dim repetition rate = 122 Hz

Blink repetition rate = 15 Hz to every 16.8 seconds

Figure 1.ꢀBlock diagram of PCA9957

PCA9957

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Product data sheet

Rev. 2 — 25 February 2021

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NXP Semiconductors

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

6 Pinning information

6.1 Pinning

V

30

29

28

27

26

25

24

23

22

21

1

2

LED15

LED14

LED13

LED12

LED11

LED10

LED9

DD

RESET

V

DDIO

3

SDO

4

SCLK

5

PCA9957

SDI

CS

OE

6

7

8

LED8

N/C

V

9

SS

V

N/C

10

SS

aaa-034474

1. Thermal pad; connected to V_SS

.

Figure 2.ꢀPin configuration for HVQFN40

6.2 Pin description

Table 3.ꢀPin description

Symbol

REXT

SDO

39

4

Type

I

Description

current set resistor input; resistor to ground

serial data output

active LOW chip select

active LOW output enable for LEDs

LED driver 0

O

I

CS

7

OE

8

I

LED0

LED1

LED2

LED3

LED4

LED5

LED6

LED7

LED8

LED9

LED10

LED11

LED12

13

14

15

16

17

18

19

20

23

24

25

26

27

O

LED driver 1

LED driver 2

LED driver 3

LED driver 4

LED driver 5

LED driver 6

LED driver 7

LED driver 8

LED driver 9

LED driver 10

LED driver 11

LED driver 12

PCA9957

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Product data sheet

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NXP Semiconductors

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 3.ꢀPin description...continued

Symbol

28

29

30

31

32

33

34

35

36

37

38

2

Type

O

I

Description

LED13

LED14

LED15

LED16

LED17

LED18

LED19

LED20

LED21

LED22

LED23

RESET

LED driver 13

LED driver 14

LED driver 15

LED driver 16

LED driver 17

LED driver 18

LED driver 19

LED driver 20

LED driver 21

LED driver 22

LED driver 23

active LOW reset input with external 10 kΩ

pull-up resistor

SCLK

SDI

5

I

serial clock line

serial data input

supply ground

6

I

V_SS

9, 21, 40 ^[1]

ground

V_DDIO

V_DD

3

power supply supply rail of SPI interface

power supply supply voltage

1

N/C

10, 12, 22

11

N/A

no connection

TEST

factory test

internal pull down - connect to GND or leave

floating

[1] HVQFN40 package supply ground is connected to both V_SSpins and exposed center pad. V_SSpins must be connected to

supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed

pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction

through the board, thermal vias need to be incorporated in the printed-circuit board in the thermal pad region.

7 Functional description

Refer to Figure 1.

7.1 Register address and data

Following a chip select (CS) asserted condition (from HIGH to LOW), the data transfers

are (16 × n) bits wide (where ‘n’ is the number of slaves in the chain) with MSB

transferred first. The first 7 bits are the address of the register to be accessed. The eighth

bit indicates the types of access — read (= 1) or write (= 0). The second group of 8 bits

consists of data as shown in Figure 3.

See Section 8 for more detail.

PCA9957

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Product data sheet

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PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

7-bit register address

data byte

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

(MSB)

(LSB)

R/W

aaa-011888

Figure 3.ꢀRegister address and data format for each slave

7.2 Register definitions

Table 4.ꢀRegister summary - default values

Register D7 D6 D5 D4 D3 D2 D1 D0 Name

# (hex)

Type

Function

00h

01h

02h

03h

04h

05h

06h

07h

08h

09h

0Ah

0Bh

0Ch

0Dh

0Eh

0Fh

10h

11h

12h

13h

14h

15h

16h

17h

18h

19h

1Ah

1Bh

1Ch

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

MODE1

MODE2

EFLAG0

EFLAG1

EFLAG2

EFLAG3

EFLAG4

EFLAG5

LEDOUT0

LEDOUT1

LEDOUT2

LEDOUT3

LEDOUT4

LEDOUT5

GRPPWM

GRPFREQ

PWM0

read/write Mode register 1

read/write Mode register 2

read only output error flag 0

read only output error flag 1

read only output error flag 2

read only output error flag 3

read only output error flag 4

read only output error flag 5

read/write LED output state 0

read/write LED output state 1

read/write LED output state 2

read/write LED output state 3

read/write LED output state 4

read/write LED output state 5

read/write group duty cycle control

read/write group frequency

read/write brightness control LED0

read/write brightness control LED1

read/write brightness control LED2

read/write brightness control LED3

read/write brightness control LED4

read/write brightness control LED5

read/write brightness control LED6

read/write brightness control LED7

read/write brightness control LED8

read/write brightness control LED9

read/write brightness control LED10

read/write brightness control LED11

read/write brightness control LED12

PWM1

PWM2

PWM3

PWM4

PWM5

PWM6

PWM7

PWM8

PWM9

PWM10

PWM11

PWM12

PCA9957

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Product data sheet

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NXP Semiconductors

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 4.ꢀRegister summary - default values...continued

Register D7 D6 D5 D4 D3 D2 D1 D0 Name

# (hex)

Type

Function

1Dh

1Eh

1Fh

20h

21h

22h

23h

24h

25h

26h

27h

28h

29h

2Ah

2Bh

2Ch

2Dh

2Eh

2Fh

30h

31h

32h

33h

34h

35h

36h

37h

38h

39h

3Ah

3Bh

3Ch

3Dh

3Eh

3Fh

0

PWM13

PWM14

PWM15

PWM16

PWM17

PWM18

PWM19

PWM20

PWM21

PWM22

PWM23

IREF0

read/write brightness control LED13

read/write brightness control LED14

read/write brightness control LED15

read/write brightness control LED16

read/write brightness control LED17

read/write brightness control LED18

read/write brightness control LED19

read/write brightness control LED20

read/write brightness control LED21

read/write brightness control LED22

read/write brightness control LED23

read/write output gain control register 0

read/write output gain control register 1

read/write output gain control register 2

read/write output gain control register 3

read/write output gain control register 4

read/write output gain control register 5

read/write output gain control register 6

read/write output gain control register 7

read/write output gain control register 8

read/write output gain control register 9

read/write output gain control register 10

read/write output gain control register 11

read/write output gain control register 12

read/write output gain control register 13

read/write output gain control register 14

read/write output gain control register 15

read/write output gain control register 16

read/write output gain control register 17

read/write output gain control register 18

read/write output gain control register 19

read/write output gain control register 20

read/write output gain control register 21

read/write output gain control register 22

read/write output gain control register 23

IREF1

IREF2

IREF3

IREF4

IREF5

IREF6

IREF7

IREF8

IREF9

IREF10

IREF11

IREF12

IREF13

IREF14

IREF15

IREF16

IREF17

IREF18

IREF19

IREF20

IREF21

IREF22

IREF23

PCA9957

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PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 4.ꢀRegister summary - default values...continued

Register D7 D6 D5 D4 D3 D2 D1 D0 Name

# (hex)

Type

Function

40h

0

RAMP_RATE_GRP0 read/write ramp enable and rate control for

group 0

41h

42h

0

STEP_TIME_GRP0 read/write step time control for group 0

HOLD_CNTL_GRP0 read/write hold ON/OFF time control for

group 0

43h

44h

0

IREF_GRP0

read/write output gain control for group 0

RAMP_RATE_GRP1 read/write ramp enable and rate control for

group 1

45h

46h

0

STEP_TIME_GRP1 read/write step time control for group 1

HOLD_CNTL_GRP1 read/write hold ON/OFF time control for

group 1

47h

48h

0

IREF_GRP1

read/write output gain control for group 1

RAMP_RATE_GRP2 read/write ramp enable and rate control for

group 2

49h

4Ah

0

STEP_TIME_GRP2 read/write step time control for group 2

HOLD_CNTL_GRP2 read/write hold ON/OFF time control for

group 2

4Bh

4Ch

0

IREF_GRP2

read/write output gain control for group 2

RAMP_RATE_GRP3 read/write ramp enable and rate control for

group 3

4Dh

4Eh

0

STEP_TIME_GRP3 read/write step time control for group 3

HOLD_CNTL_GRP3 read/write hold ON/OFF time control for

group 3

4Fh

50h

0

IREF_GRP3

read/write output gain control for group 3

RAMP_RATE_GRP4 read/write ramp enable and rate control for

group 4

51h

52h

0

STEP_TIME_GRP4 read/write step time control for group 4

HOLD_CNTL_GRP4 read/write hold ON/OFF time control for

group 4

53h

54h

0

IREF_GRP4

read/write output gain control for group 4

RAMP_RATE_GRP5 read/write ramp enable and rate control for

group 5

55h

56h

0

STEP_TIME_GRP5 read/write step time control for group 5

HOLD_CNTL_GRP5 read/write hold ON/OFF time control for

group 5

57h

58h

0

IREF_GRP5

read/write output gain control for group 5

GRAD_MODE_SEL0 read/write gradation mode select register

for channel 7 to channel 0

59h

0

GRAD_MODE_SEL1 read/write gradation mode select register

for channel 15 to channel 8

PCA9957

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PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 4.ꢀRegister summary - default values...continued

Register D7 D6 D5 D4 D3 D2 D1 D0 Name

# (hex)

Type

Function

5Ah

5Bh

5Ch

5Dh

5Eh

5Fh

60h

61h

62h

63h

64h

65h

66h

67h

68h

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

GRAD_MODE_SEL2 read/write gradation mode select register

for channel 23 to channel 16

GRAD_GRP_SEL0

GRAD_GRP_SEL1

GRAD_GRP_SEL2

GRAD_GRP_SEL3

GRAD_GRP_SEL4

GRAD_GRP_SEL5

GRAD_GRP_SEL6

GRAD_GRP_SEL7

GRAD_GRP_SEL8

GRAD_GRP_SEL9

read/write gradation group select for

channel 1 to channel 0

read/write gradation group select for

channel 3 to channel 2

read/write gradation group select for

channel 5 to channel 4

read/write gradation group select for

channel 7 to channel 6

read/write gradation group select for

channel 9 to channel 8

read/write gradation group select for

channel 11 to channel 10

read/write gradation group select for

channel 13 to channel 12

read/write gradation group select for

channel 15 to channel 14

read/write gradation group select for

channel 17 to channel 16

read/write gradation group select for

channel 19 to channel 18

GRAD_GRP_SEL10 read/write gradation group select for

channel 21 to channel 20

GRAD_GRP_SEL11 read/write gradation group select for

channel 23 to channel 22

GRAD_CNTL0

read/write gradation control register for

group 3 to group 0

GRAD_CNTL1

read/write gradation control register for

group 5 to group 4

69h

6Ah

6Bh

0

1

0

OFFSET

PWMALL

IREFALL

read/write Offset/delay on LEDn outputs

write only brightness control for all LEDn

write only output gain control for all

registers IREF0 to IREF23

6Ch

to

:

reserved^[1]

read only not used

7Fh

[1] Reserved registers should not be written to - default is 0

PCA9957

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Product data sheet

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PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

7.2.1 MODE1 — Mode register 1

Table 5.ꢀMODE1 - Mode register 1 (address 00h) bit description

Legend: * default value.

Bit

7

Symbol

Access

Value

Description

reserved

-

read only 0*

6

-

R/W

0*

1

reserved

5

-

reserved

4

SLEEP

Normal mode^[1].

Low-power mode. Oscillator off^[2][3]

reserved

.

3

2

1

0

-

R/W

0*

reserved

[1] It takes 500 µs max. for the oscillator to be up and running once SLEEP bit has been set to logic 0. Timings on LEDn

outputs are not guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the 500 µs window.

[2] No blinking, dimming or gradation control is possible when the oscillator is off.

[3] The device must be reset if the LED driver output state is set to LDRx=11 after the device is set back to Normal mode.

7.2.2 MODE2 — Mode register 2

Table 6.ꢀMODE2 - Mode register 2 (address 01h) bit description

Legend: * default value.

Bit Symbol

Access

Value Description

7

OVERTEMP

read only

0*

1

O.K.

overtemperature condition

no error at LED outputs

6

ERROR

read only

R/W

0*

1

any open or short-circuit detected in error flag

registers (EFLAGn)

5

4

DMBLNK

CLRERR

0*

1

group control = dimming

group control = blinking

self clear after write ‘1’

write only 0*

1

Write ‘1’ to clear all error status bits in EFLAGn

register and ERROR (bit 6). The EFLAGn and

ERROR bit will set to ‘1’ if open or short-circuit is

detected again.

3

2

AUTO_

SWITCHOFF_

DIS

R/W

0*

Disable the channel for which open or short error

is detected and enable it again when write 1 to

CLRERR, clears all error status bits in EFLAGn

registers and ERROR bit

1

The channel won’t be turned off when open/short

detected

EXP_EN

0*

1

linear adjustment for gradation control

exponential adjustment for gradation control

PCA9957

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PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 6.ꢀMODE2 - Mode register 2 (address 01h) bit description...continued

Legend: * default value.

Bit Symbol

Access

Value Description

1

0

-

read only

0*

1*

reserved

Brightness adjustment for gradation control is either linear or exponential by setting the

EXP_EN bit as shown in Figure 4. When EXP_EN = 0, linear adjustment scale is used.

When EXP_EN = 1, exponential scale is used.

002aah635

255

IREF_OUT

200

EXP_EN = 0

150

100

EXP_EN = 1

50

0

50

100

150

200

255

IREF_IN

Figure 4.ꢀLinear and exponential adjustment curves

7.2.3 LEDOUT0 to LEDOUT5, LED driver output state

Table 7.ꢀLEDOUT0 to LEDOUT5 - LED driver output state registers (address 08h to 0Dh) bit

description

Legend: * default value.

Address Register

Bit Symbol

7:6 LDR3

5:4 LDR2

3:2 LDR1

1:0 LDR0

7:6 LDR7

5:4 LDR6

3:2 LDR5

1:0 LDR4

7:6 LDR11

Access

R/W

Value

10*

Description

08h

09h

0Ah

LEDOUT0

LEDOUT1

LEDOUT2

LED3 output state control

LED2 output state control

LED1 output state control

LED0 output state control

LED7 output state control

LED6 output state control

LED5 output state control

LED4 output state control

LED11 output state control

PCA9957

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PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 7.ꢀLEDOUT0 to LEDOUT5 - LED driver output state registers (address 08h to 0Dh) bit

description...continued

Legend: * default value.

Address Register

Bit Symbol

5:4 LDR10

3:2 LDR9

1:0 LDR8

7:6 LDR15

5:4 LDR14

3:2 LDR13

1:0 LDR12

7:6 LDR19

5:4 LDR18

3:2 LDR17

1:0 LDR16

7:6 LDR23

5:4 LDR22

3:2 LDR21

1:0 LDR20

Access

R/W

Value

10*

Description

LED10 output state control

LED9 output state control

LED8 output state control

LED15 output state control

LED14 output state control

LED13 output state control

LED12 output state control

LED19 output state control

LED18 output state control

LED17 output state control

LED16 output state control

LED23 output state control

LED22 output state control

LED21 output state control

LED20 output state control

0Bh

0Ch

0Dh

LEDOUT3

LEDOUT4

LEDOUT5

LDRx = 00

LED driver x is off (x = 0 to 23).

LDRx = 01

LED driver x is fully on (individual brightness and group dimming/blinking not controlled).

The OE pin can be used as external dimming/blinking control in this state.

LDRx = 10

LED driver x individual brightness can be controlled through its PWMx register (default

power-up state) or PWMALL register for all LEDn outputs.

LDRx = 11

LED driver x individual brightness and group dimming/blinking can be controlled through

its PWMx register and the GRPPWM registers.

Remark: Setting the device in low power mode while being on group dimming/blinking

mode (LDRx = 11) may cause the LED output state to be in an unknown state after the

device is set back to normal mode. The device must be reset and all register values

reprogrammed.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

7.2.4 GRPPWM, group duty cycle control

Table 8.ꢀGRPPWM - Group brightness control register (address 0Eh) bit

description

Legend: * default value

Address Register

0Eh GRPPWM

Bit Symbol

Access

Value

Description

7:0 GDC[7:0]

R/W

1111 1111* GRPPWM register

When DMBLNK bit (MODE2 register) is programmed with logic 0, a 122 Hz fixed

frequency signal is superimposed with the 31.25 kHz individual brightness control signal.

GRPPWM is then used as a global brightness control allowing the LED outputs to be

dimmed with the same value. The value in GRPFREQ is then a ‘Don’t care’.

General brightness for the 24 outputs is controlled through 255 linear steps from 00h

(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = maximum brightness).

Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3

registers).

When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers

define a global blinking pattern, where GRPFREQ contains the blinking period (from

67 ms to 16.8 s) and GRPPWM the duty cycle (ON/OFF ratio in %).

(1)

7.2.5 GRPFREQ, group frequency

Table 9.ꢀGRPFREQ - Group frequency register (address 0Fh) bit description

Legend: * default value.

Address Register

Bit Symbol

Access

Value

Description

0Fh GRPFREQ 7:0 GFRQ[7:0] R/W

0000 0000* GRPFREQ register

GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2

register) is equal to 1. Value in this register is a ‘Don’t care’ when DMBLNK = 0.

Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3

registers).

Blinking period is controlled through 256 linear steps from 00h (67 ms, frequency 15 Hz)

to FFh (16.8 s).

(2)

7.2.6 PWM0 to PWM23, individual brightness control

Table 10.ꢀPWM0 to PWM23 - PWM registers 0 to 23 (address 10h to 27h) bit

description

Legend: * default value.

Address Register Bit

Symbol

Access Value

Description

10h

11h

12h

PWM0

PWM1

PWM2

7:0

IDC0[7:0]

IDC1[7:0]

IDC2[7:0]

R/W

0000 0000* PWM0 Individual Duty Cycle

0000 0000* PWM1 Individual Duty Cycle

0000 0000* PWM2 Individual Duty Cycle

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 10.ꢀPWM0 to PWM23 - PWM registers 0 to 23 (address 10h to 27h) bit

description...continued

Legend: * default value.

Address Register Bit

Symbol

Access Value

Description

13h

14h

15h

16h

17h

18h

19h

1Ah

1Bh

1Ch

1Dh

1Eh

1Fh

20h

21h

22h

23h

24h

25h

26h

27h

PWM3

PWM4

PWM5

PWM6

PWM7

PWM8

PWM9

7:0

IDC3[7:0]

IDC4[7:0]

IDC5[7:0]

IDC6[7:0]

IDC7[7:0]

IDC8[7:0]

IDC9[7:0]

R/W

0000 0000* PWM3 Individual Duty Cycle

0000 0000* PWM4 Individual Duty Cycle

0000 0000* PWM5 Individual Duty Cycle

0000 0000* PWM6 Individual Duty Cycle

0000 0000* PWM7 Individual Duty Cycle

0000 0000* PWM8 Individual Duty Cycle

0000 0000* PWM9 Individual Duty Cycle

0000 0000* PWM10 Individual Duty Cycle

0000 0000* PWM11 Individual Duty Cycle

0000 0000* PWM12 Individual Duty Cycle

0000 0000* PWM13 Individual Duty Cycle

0000 0000* PWM14 Individual Duty Cycle

0000 0000* PWM15 Individual Duty Cycle

0000 0000* PWM16 Individual Duty Cycle

0000 0000* PWM17 Individual Duty Cycle

0000 0000* PWM18 Individual Duty Cycle

0000 0000* PWM19 Individual Duty Cycle

0000 0000* PWM20 Individual Duty Cycle

0000 0000* PWM21 Individual Duty Cycle

0000 0000* PWM22 Individual Duty Cycle

0000 0000* PWM23 Individual Duty Cycle

PWM10 7:0

PWM11 7:0

IDC10[7:0] R/W

IDC11[7:0] R/W

IDC12[7:0] R/W

IDC13[7:0] R/W

IDC14[7:0] R/W

IDC15[7:0] R/W

PWM12 7:0

PWM13 7:0

PWM14 7:0

PWM15 7:0

PWM16 7:0

PWM17 7:0

PWM18 7:0

PWM19 7:0

PWM20 7:0

PWM21 7:0

PWM22 7:0

PWM23 7:0

IDC8[7:0]

IDC9[7:0]

R/W

IDC10[7:0] R/W

IDC11[7:0] R/W

IDC12[7:0] R/W

IDC13[7:0] R/W

IDC14[7:0] R/W

IDC15[7:0] R/W

A 31.25 kHz fixed frequency signal is used for each output. Duty cycle is controlled

through 255 linear steps from 00h (0 % duty cycle = LED output off) to FEh (99.2 % duty

cycle = LED output at maximum brightness) and FFh (100 % duty cycle = LED output

completed ON). Applicable to LED outputs programmed with LDRx = 10 or 11 (LEDOUT0

to LEDOUT3 registers).

(3)

Remark: The first lower end 8 steps of PWM and the last (higher end) steps of PWM will

not have effective brightness control of LEDs due to edge rate control of LED output pins.

7.2.7 IREF0 to IREF23, LED output current value registers

These registers reflect the gain settings for output current for LED0 to LED23.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 11.ꢀIREF0 to IREF23 - LED output gain control registers (address 28h to 3Fh) bit

description

Legend: * default value.

Address Register Bit

Access

R/W

Value

00h*

Description

28h

29h

2Ah

2Bh

2Ch

2Dh

2Eh

2Fh

30h

31h

32h

33h

34h

35h

36h

37h

38h

39h

3Ah

3Bh

3Ch

3Dh

3Eh

3Fh

IREF0

7:0

LED0 output current setting

LED1 output current setting

LED2 output current setting

LED3 output current setting

LED4 output current setting

LED5 output current setting

LED6 output current setting

LED7 output current setting

LED8 output current setting

LED9 output current setting

LED10 output current setting

LED11 output current setting

LED12 output current setting

LED13 output current setting

LED14 output current setting

LED15 output current setting

LED16 output current setting

LED17 output current setting

LED18 output current setting

LED19 output current setting

LED20 output current setting

LED21 output current setting

LED22 output current setting

LED23 output current setting

IREF1

IREF2

IREF3

IREF4

IREF5

IREF6

IREF7

IREF8

IREF9

IREF10

IREF11

IREF12

IREF13

IREF14

IREF15

IREF16

IREF17

IREF18

IREF19

IREF20

IREF21

IREF22

IREF23

7.2.8 Gradation control

Gradation control is designed to use six independent groups of registers to program the

full cycle of the gradation timing to implement on each selected channel. Each group has

four registers to define the ramp rate, step time, hold ON/OFF time, and final hold ON

current, as shown in Figure 5.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

output current

(mA)

hold ON

final current

set in

IREF_GRPx

ramp-up

ramp-down

hold OFF

T4

time (second)

T1

T2

T3

T1

full cycle

002aah636

Figure 5.ꢀGradation timing

• The ‘final’ and ‘hold ON’ current is defined in IREF_GRPx register value × (125 µA if

REXT = 2 kΩ).

• Ramp rate value and enable/disable ramp operation is defined in RAMP_RATE_GRPx

register.

• Total number of ramp steps (or level changes) is calculated as ‘IREF_GRPx value’ ÷

‘ramp rate value in RAMP_RATE_GRPx’. Rounds a number up to the next integer if the

total number is not an integer.

• Time for each step is calculated as ‘cycle time’ × ‘multiple factor’ bits in

STEP_TIME_GRPx register. Minimum time for one step is 0.5 ms (0.5 ms × 1) and

maximum time is 512 ms (8 ms × 64).

• The ramp-up or ramp-down time (T1 or T3) is calculated as ‘(total steps + 1)’ × ‘step

time’.

• Hold ON or OFF time (T2 or T4) is defined in HOLD_CNTL_GRPx register in the range

of 0/0.25/0.5/0.75/1/2/4/6 seconds.

• Gradation start or stop with single shot mode (one full cycle only) or continuous mode

(repeat full cycle) is defined in the GRAD_CNTL register for all groups.

• Each channel can be assigned to one of these six groups in the GRAD_GRP_SELx

register.

• Each channel can set either normal mode or gradation mode operation in the

GRAD_MODE_SELx register.

To enable the gradation operation, the following steps are required:

1. Program all gradation control registers except the gradation start bit in GRAD_CNTL

register.

2. Program either LDRx = 01 (LED fully ON mode) only, or LDRx = 10 or 11 (PWM

control mode) with individual brightness control PWMx register for duty cycle.

3. Program output current value IREFx register to non-zero, which enables LED output.

4. Set the gradation start bit in GRAD_CNTL register for enabling gradation operation.

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PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

7.2.8.1 RAMP_RATE_GRP0 to RAMP_RATE_GRP5, ramp rate control registers

Table 12.ꢀRAMP_RATE_GRP[0:3] - Ramp enable and rate control registers (address 40h,

44h, 48h, 4Ch, 50h, 54h) for each group bit description

Legend: * default value.

Address Register

Bit Access

Value Description

40h

44h

48h

4Ch

50h

54h

RAMP_RATE_GRP0

7

R/W

0*

1

Ramp-up disable

RAMP_RATE_GRP1

RAMP_RATE_GRP2

RAMP_RATE_GRP3

RAMP_RATE_GRP4

RAMP_RATE_GRP5

Ramp-up enable

6

R/W

0*

1

Ramp-down disable

Ramp-down enable

5:0 R/W

0x00* Ramp rate value per step is defined

from 1 (00h) to 64 (3Fh)^[1][2]

[1] Total number of ramp steps is defined as ‘IREF_GRP[7:0]’ ÷ ‘ramp_rate[5:0]’. (Round up to next integer if it is not an

integer number.)

[2] Per step current increment or decrement is calculated by the (ramp_rate × I_ref), where the I_refreference current is 125 µA

(REXT = 2 kΩ).

7.2.8.2 STEP_TIME_GRP0 to STEP_TIME_GRP5, step time control registers

Table 13.ꢀSTEP_TIME_GRP[0:3] - Step time control registers (address 41h, 45h, 49h, 4Dh,

51h, 55h) for each group bit description

Legend: * default value.

Address Register

Bit

7

Access

Value Description

41h

45h

49h

4Dh

51h

55h

STEP_TIME_GRP0

read only 0*

reserved

STEP_TIME_GRP1

STEP_TIME_GRP2

STEP_TIME_GRP3

STEP_TIME_GRP4

STEP_TIME_GRP5

6

R/W

0*

1

Cycle time is set to 0.5 ms

Cycle time is set to 8 ms

5:0

0x00* Multiple factor per step, the

multiple factor is defined from 1

(00h) to 64 (3Fh)^[1]

[1] Step time = cycle time (0.5 ms or 8 ms) × multiple factor (1 ~ 64); minimum step time is 0.5 ms and maximum step time is

512 ms.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

7.2.8.3 HOLD_CNTL_GRP0 to HOLD_CNTL_GRP5, hold ON and OFF control registers

Table 14.ꢀHOLD_CNTL_GRP[0:3] - Hold ON and OFF enable and time control registers

(address 42h, 46h, 4Ah, 4Eh, 52h, 56h) for each group bit description

Legend: * default value.

Address Register

Bit

Access

Value Description

42h

46h

4Ah

4Eh

52h

56h

HOLD_CNTL_GRP0

7

R/W

0*

1

Hold ON disable

Hold ON enable

Hold OFF disable

Hold OFF enable

Hold ON time select:^[1]

000: 0 s

HOLD_CNTL_GRP1

HOLD_CNTL_GRP2

HOLD_CNTL_GRP3

HOLD_CNTL_GRP4

HOLD_CNTL_GRP5

6

R/W

0*

1

5:3

000*

001: 0.25 s

010: 0.5 s

011: 0.75 s

100: 1 s

101: 2 s

110: 4 s

111: 6 s

2:0

R/W

000*

Hold OFF time select:^[1]

000: 0 s

001: 0.25 s

010: 0.5 s

011: 0.75 s

100: 1 s

101: 2 s

110: 4 s

111: 6 s

[1] Hold ON or OFF minimum time is 0 s and maximum time is 6 s.

7.2.8.4 IREF_GRP0 to IREF_GRP5, output gain control

Table 15.ꢀIREF_GRP[0:3] - Final and hold ON output gain setting registers (address 43h,

47h, 4Bh, 4Fh, 53h, 57h) for each group bit description

Legend: * default value.

Address Register

Bit

Access

Value Description

00h* Final ramp-up and hold ON output

43h

47h

4Bh

4Fh

53h

57h

IREF_GRP0

7:0

R/W

current gain setting^[1]

IREF_GRP1

IREF_GRP2

IREF_GRP3

IREF_GRP4

IREF_GRP5

[1] Output current = I_ref× IREF_GRPx[7:0], where I_refis reference current. I_ref= 125 µA if REXT = 2 kΩ,

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PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

7.2.8.5 GRAD_MODE_SEL0 to GRAD_MODE_SEL2, Gradation mode select registers

Table 16.ꢀGRAD_MODE_SEL[0:1] - Gradation mode select register for channel 23 to channel

0 (address 58h, 59h, 5Ah) bit description

Legend: * default value.

Address Register

Bit

Access

Value Description^[1][2]

58h

59h

5Ah

GRAD_MODE_SEL0 7:0

GRAD_MODE_SEL1 7:0

GRAD_MODE_SEL2 7:0

R/W

00*

FFh

00*

FFh

00*

FFh

Normal operation mode for

channel 7 to channel 0

Gradation operation mode for

channel 7 to channel 0

R/W

Normal operation mode for

channel 15 to channel 8

Gradation operation mode for

channel 15 to channel 8

Normal operation mode for

channel 23 to channel 16

Gradation operation mode for

channel 23 to channel 16

[1] Each bit represents one channel that can set either 0 for normal mode (use IREFx to set individual LED output current), or

1 for gradation mode (use IREF_GRPx to set group LEDs output current.).

[2] In gradation mode, it only affects the source of the IREF current level and does not affect the PWMx operation or

LEDOUTx registers’ function. It is possible to use the gradation feature, individual PWMx and group PWM simultaneously.

7.2.8.6 GRAD_GRP_SEL0 to GRAD_GRP_SEL11, Gradation group select registers

Table 17.ꢀGRAD_GRP_SEL[0:3] - Gradation group select register for channel 23 to

channel 0 (address 5Bh, 5Ch, 5Dh, 5Eh, 5Fh, 60h, 61h, 62h, 63h, 64h, 65h, 66h) bit

description

Legend: * default value.

Address Register

GRAD_GRP_SEL0

Bit Access Value Description^[1]

5Bh

5Ch

5Dh

5Eh

7

R/W

6:4 R/W

R/W

2:0 R/W

R/W

6:4 R/W

R/W

2:0 R/W

R/W

6:4 R/W

R/W

2:0 R/W

R/W

6:4 R/W

R/W

0*

Reserved

000*

0*

Gradation group select for LED1 output

Reserved

3

000*

0*

Gradation group select for LED0 output

Reserved

GRAD_GRP_SEL1

GRAD_GRP_SEL2

GRAD_GRP_SEL3

7

000*

0*

Gradation group select for LED3 output

Reserved

3

000*

0*

Gradation group select for LED2 output

Reserved

7

001*

0*

Gradation group select for LED5 output

Reserved

3

001*

0*

Gradation group select for LED4 output

Reserved

7

001*

0*

Gradation group select for LED7 output

Reserved

3

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 17.ꢀGRAD_GRP_SEL[0:3] - Gradation group select register for channel 23 to

channel 0 (address 5Bh, 5Ch, 5Dh, 5Eh, 5Fh, 60h, 61h, 62h, 63h, 64h, 65h, 66h) bit

description...continued

Legend: * default value.

Address Register

Bit Access Value Description^[1]

2:0 R/W

R/W

6:4 R/W

R/W

2:0 R/W

R/W

6:4 R/W

R/W

2:0 R/W

R/W

6:4 R/W

R/W

2:0 R/W

R/W

6:4 R/W

R/W

2:0 R/W

R/W

6:4 R/W

R/W

2:0 R/W

R/W

6:4 R/W

R/W

2:0 R/W

GRAD_GRP_SEL10 7 R/W

6:4 R/W

R/W

2:0 R/W

R/W

6:4 R/W

R/W

2:0 R/W

001*

0*

Gradation group select for LED6 output

Reserved

5Fh

60h

61h

62h

63h

64h

65h

66h

GRAD_GRP_SEL4

7

010*

0*

Gradation group select for LED9 output

Reserved

3

010*

0*

Gradation group select for LED8 output

Reserved

GRAD_GRP_SEL5

GRAD_GRP_SEL6

GRAD_GRP_SEL7

GRAD_GRP_SEL8

GRAD_GRP_SEL9

7

010*

0*

Gradation group select for LED11 output

Reserved

3

010*

0*

Gradation group select for LED10 output

Reserved

7

011*

0*

Gradation group select for LED13 output

Reserved

3

011*

0*

Gradation group select for LED12 output

Reserved

7

011*

0*

Gradation group select for LED15 output

Reserved

3

011*

0*

Gradation group select for LED14 output

Reserved

7

100*

0*

Gradation group select for LED17 output

Reserved

3

100*

0*

Gradation group select for LED16 output

Reserved

7

100*

0*

Gradation group select for LED19 output

Reserved

3

100*

0*

Gradation group select for LED18 output

Reserved

101*

0*

Gradation group select for LED21 output

Reserved

3

101*

0*

Gradation group select for LED20 output

Reserved

GRAD_GRP_SEL11

7

101*

0*

Gradation group select for LED23 output

Reserved

3

101*

Gradation group select for LED22 output

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

[1] LED[3:0] outputs default assigned to group 0; LED[7:4] outputs default assigned to group 1; LED[11:8] outputs default

assigned to group 2; LED[15:12] outputs default assigned to group 3;

LED[19:16] outputs default assigned to group 4; LED[23:20] outputs default assigned to

group 5.

7.2.8.7 GRAD_CNTL, Gradation control register

Table 18.ꢀGRAD_CNTL[0:1] - Gradation control register for group 5 to group 0 (address 67h,

68h) bit description

Legend: * default value.

Address Register

67h GRAD_CNTL0

Bit

Access

Value Description

7

R/W

0*

1

Gradation stop or done for group 3^[1]

Gradation start for group 3^[2]

6

R/W

R

0*

1

Single shot operation for group 3

Continuous operation for group 3

Gradation stop or done for group 2^[1]

Gradation start for group 2^[2]

5

0*

1

4

0*

1

Single shot operation for group 2

Continuous operation for group 2

Gradation stop or done for group 1^[1]

Gradation start for group 1^[2]

3

0*

1

2

0*

1

Single shot operation for group 1

Continuous operation for group 1

Gradation stop or done for group 0^[1]

Gradation start for group 0^[2]

1

0*

1

0

0*

1

Single shot operation for group 0

Continuous operation for group 0

Gradation stop or done for group 5^[1]

Gradation start for group 5^[2]

68h

GRAD_CNTL1

7

0*

1

6

0*

1

Single shot operation for group 5

Continuous operation for group 5

Gradation stop or done for group 4^[1]

Gradation start for group 4^[2]

5

0*

1

4

0*

1

Single shot operation for group 4

Continuous operation for group 4

Reserved

3:0

0*

[1] When the gradation operation is forced to stop, the output current stops immediately and is frozen at the last output level.

[2] This bit will be self-cleared when single mode is completed, and writing 0 to this bit will force to stop the gradation

operation when single mode is not completed or continuous mode is running.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

7.2.8.8 Ramp control — equation and calculation example

IREF_GRPx

(max. = 255)

125 µA × 250 = 31.25 mA

250

200

150

100

50

(step current)

(6.25 mA)

s1

End with

current zero

(step time)

(32 ms)

t1

0

time

ramp-up

hold ON

(0.25 s)

ramp-down

hold OFF

(0.5 s)

(T = 192 ms)

Start from

current zero

full cycle

aaa-034477

Figure 6.ꢀRamp calculation example 1

• t1 (step time) = cycle time × multiple factor, where:

– Cycle time = 0.5 ms (fast ramp) or 8 ms (slow ramp) in STEP_TIME_GRPx[6]

– Multiple factor = 6-bit, from 1 (00h) to 64 (3Fh) counts in STEP_TIME_GRPx[5:0]

• s1 (step current) = ramp_rate × I_ref, where:

– ramp_rate = 6-bit, from 1 (00h) to 64 (3Fh) counts in RAMP_RATE_GRPx[5:0]

– I_ref= reference current of 125 µA if REXT = 2 kΩ

• S (total steps) = (IREF_GRPx / ramp_rate), where:

– IREF_GRPx = output current gain setting, 8-bit, up to 255 counts

– ramp_rate = 6-bit, up to 64 counts in RAMP_RATE_GRPx[5:0]

– If it is not an integer, then round up to next integer number.

• T (ramp time) = (S (total steps) + 1) × t1 (step time)

– Ramp-up time starts from zero current and ends at the maximum current

– Ramp-down time starts from the maximum current and ends at the zero current

Calculation example 1 (Figure 6):

• Assumption:

– I_ref= 125 µA if REXT = 2 kΩ

– Output hold ON current = 125 µA × 250 = 31.25 mA (IREF_GRPx[7:0] = FAh)

– Cycle time = 0.5 ms (STEP_TIME_GRPx[6] = 0)

– Multiple factor = 64 (STEP_TIME_GRPx[5:0] = 3Fh)

– Ramp rate = 50 (RAMP_RATE_GRPx[5:0] = 31h)

– Hold ON = 0.25 s (HOLD_CNTL_GRPx[5:3] = 001)

– Hold OFF = 0.5 s (HOLD_CNTL_GRPx[2:0] = 010)

• t1 (step time) = cycle time (0.5 ms) × multiple (64) = 32 ms

• Step current = ramp_rate × I_ref= 50 × 125 µA = 6.25 mA

• S (total steps) = (IREF_GRPx ÷ ramp_rate) = (250 ÷ 50) = 5 steps

• T (ramp time) = (S + 1) × t1 = 6 × 32 ms = 192 ms

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

IREF_GRPx

(max. = 255)

240

(step time)

t1

(30 mA)

(32 ms)

190

200

150

100

140

s1

(step current)

90

40

50

(6.25 mA)

0

time

ramp-up

hold ON

(0.25 s)

ramp-down

hold OFF

(0.5 s)

(T = 192 ms)

full cycle

aaa-034484

Figure 7.ꢀRamp calculation example 2

Calculation example 2:

• Assumption:

– I_ref= 125 µA if REXT = 2 kΩ

– Output hold ON current = 125 µA × 240 = 30 mA (IREF_GRPx[7:0] = F0h)

– Cycle time = 0.5 ms (STEP_TIME_GRPx[6] = 0)

– Multiple factor = 64 (STEP_TIME_GRPx[5:0] = 3Fh)

– Ramp rate = 50 (RAMP_RATE_GRPx[5:0] = 31h)

– Hold ON = 0.25 s (HOLD_CNTL_GRPx[5:3] = 001)

– Hold OFF = 0.5 s (HOLD_CNTL_GRPx[2:0] = 010)

• t1 (step time) = cycle time (0.5 ms) × multiple (64) = 32 ms

• Step current = ramp_rate × I_ref= 50 × 125 µA = 6.25 mA (except the last one)

• S (total steps) = IREF_GRPx ÷ ramp_rate = 240 ÷ 50 = 4.8 steps (round up to next

integer) = 5 steps

• T (ramp time) = (S + 1) × t1 = 6 × 32 ms = 192 ms

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

(enable bit)

Ramp UP

(enable bit)

Hold ON

(enable bit)

Ramp DOWN

(enable bit)

Hold OFF

Single shot waveform

Continuous waveform

1

2

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

3

4

5

6

7

8

9

10

11

12

13

14

15

16

wavefrom when initial current is not zero

the moment when START bit changes to 0 (single shot sequence ends)

aaa-009234

Figure 8.ꢀGradation output waveform in single shot or continuous mode

7.2.9 OFFSET — LEDn output delay offset register

Table 19.ꢀOFFSET - LEDn output delay offset register (address 69h) bit description

Legend: * default value.

Address Register Bit

Access

read only

R/W

Value

0000*

1000*

Description

69h

OFFSET 7:4

3:0

not used

LEDn output delay offset factor (0000 -

1011)

The PCA9957 can be programmed to have turn-on delay between LED outputs. This

helps to reduce peak current for the V_DDsupply and reduces EMI.

This turn-on delay also applies to OE pin when becomes low.

The order in which the LED outputs are enabled will always be the same (channel 0 will

enable first and channel 23 will enable last).

OFFSET control register bits [3:0] determine the delay used between the turn-on times

as follows, and the valid number is 0000 – 1011. The number greater than 1011 (such as

1100 - 1111) will have the same turn-on delay as 1011 setting (1.375 µS), and read back

value will be changed to 1011:

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

0000 = no delay between outputs (all on, all off at the same time)

0001 = delay of 1 clock cycle (125 ns) between successive outputs

0010 = delay of 2 clock cycles (250 ns) between successive outputs

0011 = delay of 3 clock cycles (375 ns) between successive outputs

:

1011 = delay of 11 clock cycles (1.375 µs) between successive outputs

:

1111 = delay of 11 clock cycles (1.375 µs) between successive outputs

Example: If the value in the OFFSET register is 1000, the corresponding delay = 8 ×

125 ns = 1 µs delay between successive outputs.

channel 0 turns on at time 0 µs

channel 1 turns on at time 1 µs

channel 2 turns on at time 2 µs

channel 3 turns on at time 3 µs

channel 4 turns on at time 4 µs

channel 5 turns on at time 5 µs

channel 6 turns on at time 6 µs

channel 7 turns on at time 7 µs

channel 8 turns on at time 8 µs

channel 9 turns on at time 9 µs

channel 10 turns on at time 10 µs

channel 11 turns on at time 11 µs

channel 12 turns on at time 12 µs

channel 13 turns on at time 13 µs

channel 14 turns on at time 14 µs

channel 15 turns on at time 15 µs

channel 16 turns on at time 16 µs

channel 17 turns on at time 17 µs

channel 18 turns on at time 18 µs

channel 19 turns on at time 19 µs

channel 20 turns on at time 20 µs

channel 21 turns on at time 21 µs

channel 22 turns on at time 22 µs

channel 23 turns on at time 23 µs

7.2.10 PWMALL — brightness control for all LEDn outputs

When programmed, the value in this register will be used for PWM duty cycle for all the

LEDn outputs and will be reflected in PWM0 through PWM23 registers.

Table 20.ꢀPWMALL - brightness control for all LEDn outputs register (address 6Ah) bit

description

Legend: * default value.

Address Register Bit

6Ah PWMALL 7:0

Access

Value

Description

write only

0000 0000*

duty cycle for all LEDn outputs

Remark: Write to any of the PWM0 to PWM23 registers will overwrite the value in

corresponding PWMn register programmed by PWMALL.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

7.2.11 IREFALL register: output current value for all LED outputs

The output current setting for all outputs is held in this register. When this register is

written to or updated, all LED outputs will be set to a current corresponding to this

register value.

Writes to IREF0 to IREF23 will overwrite the output current settings.

Table 21.ꢀIREFALL - Output gain control for all LED outputs (address 6Bh) bit

description

Legend: * default value.

Address Register Bit

6Bh IREFALL 7:0

Access

Value

Description

write only

00h*

Current gain setting for all LED outputs.

7.2.12 LED driver constant current outputs

In LED display applications, PCA9957 provides nearly no current variations, the absolute

accuracy is less than ± 6.5 %.

7.2.12.1 Adjusting output current

The PCA9957 scales up the reference current (I_ref) set by the external resistor (R_ext

)

to sink the output current (I_O) at each output port. The maximum output current for the

outputs can be set using R_ext. In addition, the constant value for current drive at each of

the outputs is independently programmable using command registers IREF0 to IREF23.

Alternatively, programming the IREFALL register allows all outputs to be set at one

current value determined by the value in IREFALL register.

Equation 4 and Equation 5 can be used to calculate the minimum and maximum constant

current values that can be programmed for the outputs for a chosen R_ext

.

(4)

(5)

For a given IREFx setting:

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

aaa-034486

80

O(LEDn)

IREFx = 255

I

(mA)

30

20

10

0

1

2

3

4

5

6

7

8

9

10

)

R

ext

(k

I_O(LEDn)(mA) = IREFx × (1 / 4) / R_ext(kΩ)

maximum I_O(LEDn)(mA) = 255 × (1 / 4) / R_ext(kΩ)

Remark: Default IREFx at power-up = 0.

Figure 9.ꢀMaximum I_LEDversus R_ext

Example 1: If R_ext= 2 kΩ, I_O_LED_MIN = 125.0 µA, I_O_LED_MAX = 31.875 mA (as

shown in Figure 10).

So each channel can be programmed with its individual IREFx in 256 steps and in

125 µA increments to a maximum output current of 31.875 mA independently.

aaa-034487

32

30

I

O(target)

(mA)

25

20

15

10

5

0

31

63

95

127

159

191

223

255

IREF[7:0] value

Figure 10.ꢀI_O(target)versus IREFx value with R_ext= 2 kΩ

7.2.13 LED error detection

The PCA9957 is capable of detecting an LED open or a short condition at its open-drain

LED outputs. Users will recognize these faults by reading the status of a pair of error bits

(ERRx) in error flag registers (EFLAGn) for each channel. Both LDRx value in LEDOUTx

registers and IREFx value must be set to ‘00’ for those unused LED output channels.

If the output is selected to be fully on, individual dim, or individual and group dim, that

channel will be tested.

The user can poll the ERROR status bit (bit 6 in MODE2 register) to check if there

is a fault condition in any of the 24 channels. The EFLAGn registers can then be

read to determine which channels are at fault and the type of fault in those channels.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

The error status reported by the EFLAGn register is real time information, when

AUTO_SWITCHOFF_DIS = 1, it will get self cleared once the error is fixed or write ‘1’ to

CLRERR bit (bit 4 in MODE2 register), when AUTO_SWITCHOFF_DIS = 0, PCA9957

will stop detection once error occurs, the EFLAGn register will keep the last error status

until write ‘1’ to CLRERR bit or get reset.

Remark: When LED outputs programmed with LDRx = 10 or 11 in LEDOUT[3:0]

registers, checks for open and short-circuit will not occur if the PWM value in PWM0 to

PWM23 registers is less than 8 or 255 (100 % duty cycle).

Table 22.ꢀEFLAG0 to EFLAG5 - Error flag registers (address 02h to 07h) bit

description

Legend: * default value.

Address Register Bit

Symbol Access Value

Description

02h

03h

04h

05h

06h

07h

EFLAG0

EFLAG1

EFLAG2

EFLAG3

EFLAG4

EFLAG5

7:6

5:4

3:2

1:0

7:6

5:4

3:2

1:0

7:6

5:4

3:2

1:0

7:6

5:4

3:2

1:0

7:6

5:4

3:2

1:0

7:6

5:4

3:2

1:0

ERR3

R only

00*

Error status for LED3 output

Error status for LED2 output

Error status for LED1 output

Error status for LED0 output

Error status for LED7 output

Error status for LED6 output

Error status for LED5 output

Error status for LED4 output

Error status for LED11 output

Error status for LED10 output

Error status for LED9 output

Error status for LED8 output

Error status for LED15 output

Error status for LED14 output

Error status for LED13 output

Error status for LED12 output

Error status for LED19 output

Error status for LED18 output

Error status for LED17 output

Error status for LED16 output

Error status for LED23 output

Error status for LED22 output

Error status for LED21 output

Error status for LED20 output

ERR2

ERR1

ERR0

ERR7

ERR6

ERR5

ERR4

ERR11

ERR10

ERR9

ERR8

ERR15

ERR14

ERR13

ERR12

ERR19

ERR18

ERR17

ERR16

ERR23

ERR22

ERR21

ERR20

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 23.ꢀERRx bit description

LED error detection

status

ERRx

Description

Bit 1

Bit 0

No error

0

1

0

1

0

1

In normal operation and no error

Detected LED short-circuit condition

Detected LED open-circuit condition

This condition does not exist

Short-circuit

Open-circuit

DNE (Do Not Exist)

7.2.13.1 Open-circuit detection principle

The PCA9957 LED open-circuit detection compares the effective current level I_Owith

the open load detection threshold current I_th(det). If I_Ois below the threshold I_th(det), the

PCA9957 detects an open load condition. This error status can be read out as an error

flag through the EFLAGn registers. For open-circuit error detection of an output channel,

that channel must be ON.

Table 24.ꢀOpen-circuit detection

State of output Condition of output Error status code

Description

port

OFF

ON

current

I_O= 0 mA

I_O< I_th(det)

I_O≥ I_th(det)

0

1

detection not possible

open-circuit

[1]

this channel open error status normal

bit is 0

[1] I_th(det)= 0.5 × I_O(target)(typical). This threshold may be different for each I/O and only depends on IREFx and R_ext

.

7.2.13.2 Short-circuit detection principle

The LED short-circuit detection compares the effective output voltage level (V_O) with the

shorted-load detection threshold voltages V_th(trig). If V_Ois above the V_th(trig)threshold, the

PCA9957 detects a shorted-load condition. If V_Ois below the V_th(trig)threshold, no error

is detected and error bit is set to ‘0’. This error status can be read out as an error flag

through the EFLAGn registers. For short-circuit error detection of an output channel, that

channel must be ON.

Table 25.ꢀShort-circuit detection

State of output Condition of output Error status code

Description

port

OFF

ON

voltage

-

0

1

detection not possible

short-circuit

[1]

V_O≥ V_th(trig)

V_O< V_th(trig)

this channel short error status normal

bit is 0

[1] V_th1.96 V.

≅

Remark: The error status distinguishes between an LED short condition and an LED

open condition. Upon detecting an LED short or open, the corresponding LED outputs

should be turned OFF to prevent heat dissipation for a short in the chip. Although an

open event will not be harmful, the outputs should be turned OFF for both occasions to

repair the LED string.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

7.2.14 Overtemperature protection

If the PCA9957 chip temperature exceeds its limit (T_th(otp)(rising) maximum, see

Table 28), all output channels will be disabled until the temperature drops below its

limit minus a small hysteresis (T_th(otp)(hysteresis) maximum, see Table 28). When

an overtemperature situation is encountered, the OVERTEMP flag (bit 7) is set in the

MODE2 register. Once the die temperature reduces below the T_th(otp)rising - T_th(otp)

hysteresis, the chip will return to the same condition it was prior to the overtemperature

event and the OVERTEMP flag will be cleared.

7.3 Active LOW output enable input

The active LOW output enable (OE) pin on PCA9957 allows to enable or disable all the

LED outputs at the same time.

• When a LOW level is applied to OE pin, all the LED outputs are enabled, LEDn output

delay applies to this sequence.

• When a HIGH level is applied to OE pin, all the LED outputs are high-impedance.

The OE pin can be used as a synchronization signal to switch on/off several PCA9957

devices at the same time when LED drive output state is set fully ON (LDRx = 01 in

LEDOUTx register) in these devices. This requires an external clock reference that

provides blinking period and the duty cycle.

The OE pin can also be used as an external dimming control signal. The frequency of the

external clock must be high enough not to be seen by the human eye, and the duty cycle

value determines the brightness of the LEDs.

LEDn output delay controlled by register OFFSET also applies OE control.

Remark: Do not use OE as an external blinking control signal when internal global

blinking is selected (DMBLNK = 1, MODE2 register) since it will result in an undefined

blinking pattern. Do not use OE as an external dimming control signal when internal

global dimming is selected (DMBLNK = 0, MODE2 register) since it will result in an

undefined dimming pattern.

7.4 Power-on reset

When power is applied to V_DD, an internal power-on reset holds the PCA9957 in a reset

condition until V_DDhas reached V_POR. At this point, the reset condition is released and

the PCA9957 registers and serial bus state machine are initialized to their default states

(all zeroes) causing all the channels to be deselected. Thereafter, V_DDmust be pulled

lower than 1 V and stay LOW for longer than 20 µs. The device will reset itself, and allow

2 ms for the device to fully wake up.

7.5 Hardware reset recovery

When a reset of PCA9957 is activated using an active LOW input on the RESET pin, a

reset pulse width of 2.5 µs minimum is required. The maximum wait time after RESET pin

is released is 1.5 ms.

7.6 Individual brightness control with group dimming/blinking

A 31.25 kHz fixed frequency signal with programmable duty cycle (8 bits, 256 steps) is

used to control individually the brightness for each LED.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

On top of this signal, one of the following signals can be superimposed (this signal can

be applied to the 24 LED outputs LED0 to LED23).

• A lower 122 Hz fixed frequency signal with programmable duty cycle (8 bits, 256 steps)

is used to provide a global brightness control.

• A programmable frequency signal from 15 Hz to every 16.8 seconds (8 bits, 256 steps)

with programmable duty cycle (8 bits, 256 steps) is used to provide a global blinking

control.

252

254

256

1

2

3

4

5

6

7

8

9

10 11 12

251

253

255

1

2

3

4

5

6

7

8

9

10 11

Brightness Control signal (LEDn)

N × 125 ns

with N = (0 to 255)

(PWMx Register)

M × 256 × 125 ns

with M = (0 to 255)

(GRPPWM Register)

256 × 125 ns = 32 µs

(31.25 kHz)

Group Dimming signal

256 × 256 × 125 ns = 8.19 ms (122 Hz)

8

1

2

3

4

5

6

7

1

2

3

4

5

6

7

8

002aaf935

resulting Brightness + Group Dimming signal

Minimum pulse width for LEDn Brightness Control is 125 ns.

Minimum pulse width for Group Dimming is 32 µs.

When M = 1 (GRPPWM register value), the resulting LEDn Brightness Control + Group Dimming signal will have 1 pulse

of the LED Brightness Control signal (pulse width = N × 125 ns, with ‘N’ defined in PWMx register).

This resulting Brightness + Group Dimming signal above shows a resulting Control signal with M = 8.

Figure 11.ꢀBrightness + Group Dimming signals

8 Characteristics of the 4-wire SPI serial-bus interface

The PCA9957 communicates through a daisy-chain SPI-compatible 4-wire serial

interface. The interface has three inputs and one output: serial clock (SCLK), active LOW

chip select (CS), serial data in (SDI) and serial data output (SDO). CS must be LOW to

clock data into the device, and SDI must be stable when sampled on the rising edge of

SCLK. The PCA9957 ignores all activity on SCLK and SDI except when CS is LOW.

8.1 SPI-compatible 4-wire serial interface signals

CS

The active LOW chip select line is used to activate and access the SPI slaves. As long as

CS is HIGH, all slaves will not accept the clock signal or data, and the output SDO is in

high-impedance state. Whenever this pin is in a logic LOW state, data can be transferred

between the master and all slaves.

SCLK

Serial clock is provided by SPI master and determines the speed of the data transfer. All

receiving and sending data are done synchronously (clocks the internal SPI shift register

and the output driver) to this clock.

SDI

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Serial Data In is read on the rising edge of SCLK into the internal 16-bit shift registers.

On the rising edge of CS, the input data is latched into the internal registers of the device.

The device ignores all activity on SDI when CS is de-asserted.

SDO

Serial Data Out is the pin on which the internal 16-bit shift registers data is shifted out

serially. SDO is in a high-impedance state until the CS pin goes to a logic LOW state.

New data will appear at the SDO pin following the falling edge of SCLK.

All slave devices can be daisy-chained by connecting the SDO of one device to the SDI

of the next device, and driving SCLK and CS lines in parallel. Figure 12 depicts how

the slaves are connected to the master. All slave devices are accessed at the same

time with CS. An access requires (16 × n) clock cycles, where ‘n’ is the number of slave

devices. As long as CS is LOW, the SPI registers are working as simple shift registers

and shifting through the SDI data without interpreting the different control and data bits.

When CS goes back to HIGH, the bits in the SPI registers are interpreted and the SPI

logic is activated.

Only the first slave in the chain receives the control and data bits directly from the SPI

Master. Every other slave in the network receives its SDI data from the SDO output of the

preceding slave in the chain, and the SDO of the last slave is then connected to the data

input (MISO) of SPI Master. Each slave has 16-bit shift registers shifted in from SDI and

shifted out to SDO, along with the SCLK clock. The whole chain acts as a 48-bit (n × 16-

bit, where ‘n’ is number of slaves) big shift register.

CS

SPI

MASTER

CS

PCA9957

(slave 1)

PCA9957

(slave 2)

PCA9957

(slave 3)

SCLK

MOSI

MISO

SCLK

SDI

SCLK

SDI

SCLK

SDI

SDO

aaa-034488

Figure 12.ꢀSystem level connection

8.2 Data format

As shown in Figure 13, the data transfers are 16-bit × n bits wide (where ‘n’ is the number

of slaves) with MSB transferred first. The first 7 bits, D[15:9], form the address of the

register to be accessed, the eighth bit (D8) indicates the types of access, either read

(= 1) or write (= 0), and the last 8 bits, D[7:0], consist of data. Register read and write

sequences (described in the following sections) always begin from the bus idle condition.

The bus idle condition refers to CS being HIGH and SCLK being in a LOW state.

first byte

second byte

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

MSB

LSB

MSB

LSB

register address

data

R/W

aaa-011890

Figure 13.ꢀData format

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

8.3 Write access sequence

The registers are written using the following write sequence (from a bus idle condition)

when the system has three slaves daisy-chained together:

1. All the slave devices in chain will be involved in a write or read operation. Every slave

device in the chain is a portion of one big shift register.

2. Drive CS LOW. This enables the internal 16-bit shift register.

3. Shift 16 × n bits of data (where ‘n’ is the number of slaves) into the first slave device

in a MSB-first fashion. Data is shifted on the rising edge of SCLK and must be stable

during the rising edge of SCLK.

4. The 8th bit of the data for every 16 bits (each device) must be a ‘0’, indicating it is a

write transfer.

5. After the last bit of data is transferred, drive SCLK LOW and de-assert CS (drive it

HIGH).

6. When CS goes from LOW to HIGH, the data in the shift register is latched into the

device registers.

If fewer than 16 bits of data are transferred before de-asserting CS, then the data is

ignored and the register will not be updated. The write transfer format is shown in

Figure 14.

CS

SCLK

16 clocks

WR (slave 3)

SDI

WR (slave 2)

WR (slave 1)

SDO

WR (slave 3)

WR (slave 2)

WR (slave 3)

(slave 1)

SDO

(slave 2)

SDO

(slave 3)

aaa-011891

Figure 14.ꢀWrite access

8.4 Read access sequence

The registers are read using the following read sequence (from a bus idle condition)

when the system has three slaves daisy-chained as shown in Figure 15.

1. The master sends the first three 2-byte read instructions with 48 clocks, where the first

byte is a 7-bit register address, an eighth bit set to one, followed by dummy data byte

(all ones).

2. The Read instruction is decoded when CS is de-asserted (from LOW to HIGH).

3. The read data is shifted out on SDO when CS is asserted again (from HIGH to LOW).

4. The master sends the second three 2-byte ‘No Operation’ (NOP) operations (all ones)

with 48 clocks and reads the requested data on MISO in sequence where the first

byte is dummy data (don’t care), followed by the read data byte.

5. A read cycle consists of asserting and de-asserting of CS twice.

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

11111111

(NOP)

11111111

(NOP)

11111111

(NOP)

11111111

(NOP)

11111111

(NOP)

11111111

(NOP)

MOSI

MISO XXXXXXXX

Data 3

XXXXXXXX

Data 2

XXXXXXXX

Data 1

CS

SCLK

16 clocks

NOP

16 clocks

MOSI

MISO

RD slave 3

NOP

RD slave 2

RD slave 1

NOP

Slave 3 OUT

Slave 2 OUT

Slave 1 OUT

aaa-011892

Figure 15.ꢀRead access

8.5 Overlapped read and write access sequence

The registers are read and write overlapped using the following sequence (from a bus

idle condition) when the system has three slaves daisy-chained as shown in Figure 16.

1. The second phase of the read cycle can be used to send in write data or the next read

instruction. This increases the bus utility and hence efficiency.

2. The master sends the first three 2-byte read instructions with 48 clocks, where the first

byte is a 7-bit register address, the eighth bit is set to one, followed by dummy data

byte (all ones).

3. The read instruction is decoded when CS is de-asserted (from LOW to HIGH).

4. Start to shift read data out on SDO when CS is asserted again (from HIGH to LOW)

and start to send in the next read or write instruction on the SDI line.

MOSI

Write 3

WR Data 3

Write 2

WR Data 2

Write 1

WR Data 1

MISO XXXXXXXX RD Data 3 XXXXXXXX RD Data 2 XXXXXXXX RD Data 1

CS

SCLK

16 clocks

MOSI

MISO

RD slave 3

WR slave 3

RD slave 2

RD slave 1

WR slave 2

WR slave 1

Slave 3 OUT

Slave 2 OUT

Slave 1 OUT

aaa-011893

Figure 16.ꢀOverlapped read and write access

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

9 Application design-in information

V

= 1.65 V ~ 5.5 V

DDIO

V

= 2.7 V ~ 5.5 V

DD

(2)

(1)

10 k

up to 5.5 V

SPI

SERIAL BUS

MASTER

V

DDIO DD

LED0

LED1

LED2

LED3

LED4

LED5

CS

MISO

MOSI

SCLK

SDO

SDI

SCLK

OE

RESET

PCA9957

LED6

LED7

REXT

LED8

ISET

LED9

LED10

LED11

LED12

LED13

LED n

LED23

V

SS

V

C

10 µF

SS

aaa-034489

1. OE requires pull-up resistor if control signal from the master is open-drain

2. RESET requires a pull-up resistor of <100 kΩ if not used or connected to open-drain output

Figure 17.ꢀTypical application

9.1 Thermal considerations

Since the PCA9957 device integrates 24 linear current sources, thermal considerations

should be taken into account to prevent overheating, which can cause the device to go

into thermal shutdown.

Perhaps the major contributor for device’s overheating is the LED forward voltage

mismatch. This is because it can cause significant voltage differences between the

LED of the same type (for example, 2 V to 3 V), which ultimately translates into higher

power dissipation in the device. The voltage drop across the LED channels of the device

is given by the difference between the supply voltage and the LED forward voltage of

each LED. Reducing this to a minimum (for example, 0.4 V) helps to keep the power

dissipation down. Therefore LEDs binning is recommended to minimize LED voltage

forward variation and reduce power dissipation in the device.

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In order to ensure that the device will not go into thermal shutdown when operating under

certain application conditions, its junction temperature (T_j) should be calculated to ensure

that is below the overtemperature threshold limit (130 °C). The T_jof the device depends

on the ambient temperature (T_amb), device’s total power dissipation (P_tot), and thermal

resistance.

The device junction temperature can be calculated by using the following equation:

(6)

where:

T_j= junction temperature

T_amb= ambient temperature

R_th(j-a)= junction to ambient thermal resistance

P_tot= (device) total power dissipation

An example of this calculation is show below:

Conditions:

T_amb= 50 °C

R_th(j-a)= 39 °C/W (per JEDEC 51 standard for multilayer PCB)

I_LED= 30 mA / channel

I_DD(max)= 20 mA

V_DD= 3.3 V

LEDs per channel = 1 LEDs / channel

LED V_F(typ)= 3 V per LED

LED V_Fmismatch = 0.2 V per LED

V_reg(drv)= 0.4 V (This will be present only in the LED string with the highest LED

forward voltage.)

V_sup= LED V_F(typ)+ LED V_Fmismatch + V_reg(drv)= 3 V + 0.2 V + 0.4 V = 3.6 V

P_totcalculation:

P_tot= IC_power + LED drivers_power;

IC_power = (I_DD× V_DD

)

IC_power = (0.02 A × 3.3 V) = 0.066 W

LED drivers_power = [(24 - 1) × (I_LED) × (LED V_Fmismatch + V_reg(drv))] + (I_LED

×

V_reg(drv)

)

LED drivers_power = [23 × 0.03 A × (0.2 V + 0.4 V)] + (0.03 A × 0.4 V)] = 0.426 W

P_tot= 0.66 W + 0.426 W = 0.492 W

T_jcalculation:

T_j= T_amb+ R_th(j-a)× P_tot

T_j= 50 °C + (30 °C/W × 0.492 W) = 64.76 °C

This confirms that the junction temperature is below the minimum overtemperature

threshold of 130 °C, which ensures the device will not go into thermal shutdown under

these conditions.

It is important to mention that the value of the thermal resistance junction-to-ambient

(R_th(j-a)) strongly depends in the PCB design. Therefore, the thermal pad of the device

should be attached to a big enough PCB copper area to ensure proper thermal

dissipation (similar to JEDEC 51 standard). Several thermal vias in the PCB thermal pad

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should be used as well to increase the effectiveness of the heat dissipation (for example,

15 thermal vias). The thermal vias should be distributed evenly in the PCB thermal pad.

Finally, it is important to point out that this calculation should be taken as a reference only

and therefore evaluations should still be performed under the application environment

and conditions to confirm proper system operation.

10 Limiting values

Table 26.ꢀLimiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_DD

Parameter

Conditions

Min

Max

+6.0

5.5

Unit

V

supply voltage

-0.5

V_DDIO

V_I/O

supply voltage of interface

voltage on an input/output pin

LED driver voltage

-0.5

V

V_SS- 0.5

V

V_drv(LED)

I_O(LEDn)

I_SS

V_SS- 0.5

+6.0

40

V

output current on pin LEDn

ground supply current

total power dissipation

-

mA

A

-

1.0

P_tot

T_amb= 25 °C

T_amb= 85 °C

-

3.3

W

°C

-

1.3

T_stg

T_amb

T_j

storage temperature

ambient temperature

junction temperature

-65

-40

+150

+85

+125

operating for non AEC-Q100

11 Thermal characteristics

Table 27.ꢀThermal characteristics

Symbol

R_th(j-a)

Parameter

Conditions

Typ

Unit

[1]

thermal resistance from junction to ambient HVQFN40

35.6

°C/W

R_{th(j-case top)}

thermal resistance between the junction and HVQFN40

the case top

17.9

R_{th(j-case bottom)}thermal resistance between the junction and HVQFN40

the case bottom

8.5

°C/W

[1]

R_th(j-board)

thermal resistance between the junction and HVQFN40

the board

27.2

[1] Per JEDEC 51 standard for multilayer PCB and Wind Speed (m/s) = 0.

12 Static characteristics

Table 28.ꢀStatic characteristics

V_DD= 2.7 V to 5.5 V; V_SS= 0 V; T_amb= -40 °C to +85 °C; unless otherwise specified.

Symbol

Supply

Parameter

Conditions

Min

Typ ^[1]Max

Unit

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 28.ꢀStatic characteristics...continued

V_DD= 2.7 V to 5.5 V; V_SS= 0 V; T_amb= -40 °C to +85 °C; unless otherwise specified.

Symbol

V_DD

Parameter

Conditions

Min

2.7

Typ ^[1]Max

Unit

V

supply voltage

-

5.5

V_DDIO

supply voltage of SPI

interface

1.65

V

I_DD

supply current

on pin V_DD; operating mode; f_SCLK

= 10 MHz

R_ext= 2 kΩ; LED[23:0] = off;

IREFx = 00h

-

6.2

6.7

650

mA

µA

R_ext= 2 kΩ; LED[23:0] = on;

IREFx = FFh

I_DDIO

supply current

standby current

on pin V_DDIO; operating mode;

f_SCLK= 10 MHz; keep writing

mode register (01h) with 00h

I_stb

on pin V_DD; no load; f_SCLK= 0 Hz;

MODE1[4] = 1; V_I= V_DD

V_DD= 3.3 V

-

170

2

600

µA

V

V_DD= 5.5 V

700

V_POR

V_PDR

power-on reset voltage

no load; V_I= V_DDor V_SS

-

[2]

[3]

power-down reset voltage

1

V

Inputs CS, SDI, SCLK; output SDO

V_IL

V_IH

V_OH

V_OL

I_L

LOW-level input voltage

HIGH-level input voltage

HIGH-level output voltage

LOW-level output voltage

leakage current

-0.5

-

+0.3V_DDIO

V

0.7V_DDIO

-

5.5

V

I_OH= -3 mA at SDO

I_OL= 3 mA at SDO

V_I= V_DDIOor V_SS

V_I= V_SS

0.8V_DDIO

-

V

-

0.2V_DDIO

+1

V

-1

-

µA

pF

C_i

input capacitance

6

10

Current controlled outputs (LED[23:0])

I_O(LEDn)output current on pin LEDn

[3]

V_O= 0.4 V; IREFx = 80h; R_ext= 2

kΩ

15

30

16

32

17

mA

%

V_O= 0.4 V; IREFx = FFh; R_ext= 2

kΩ

34

ΔI_{O_Absolute}absolute output current

variation

V_O= 0.4 V; all channels on; IREFx

>= 20h R_ext= 2 kΩ; refer to ideal

value; guaranteed by design

±6.5

V_O= 0.4 V; all channels on; IREFx

< 20h; R_ext= 2 kΩ; refer to ideal

value; guaranteed by design

±8

±6

%

[4]

ΔI_{O_mis_p2p}part to part output current

mismatch

all channels on; IREFx = FFh.

R_ext= 2 kΩ; V_O= 0.4 V; average

value of 24 output current of each

device, comparing to ideal value

-

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Table 28.ꢀStatic characteristics...continued

V_DD= 2.7 V to 5.5 V; V_SS= 0 V; T_amb= -40 °C to +85 °C; unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ ^[1]Max

Unit

[5]

ΔI_{O_mis_c2c}channel to channel output

current mismatch

all channels on; IREFx = FFh. R_ext

= 2 kΩ; V_O= 0.4 V; each channel

current comparing to average

current of 24 channels

-

±4

%

V_reg(drv)

driver regulation voltage

minimum regulation voltage;

IREFx = FFh; R_ext= 2 kΩ

0.4

5.5

V

I_L(off)

V_trip

off-state leakage current

trip voltage

V_O= 5 V

-

1

-

µA

V

short LED protection; Error flag

1.85

1.96

trips during verification test if V_O

V_trip; R_ext= 2 kΩ

≥

OE input, RESET input

V_IL

V_IH

I_LI

LOW-level input voltage

-0.5

-

+0.3V_DDIO

V

HIGH-level input voltage

input leakage current

input capacitance

0.7V_DDIO

-

5.5

+1

5

V

-1

-

µA

pF

[3]

C_i

3.7

Overtemperature protection

[3]

T_th(otp)overtemperature protection

rising

130

15

-

150

30

°C

threshold temperature

hysteresis

[1] Typical limits at V_DD= 3.3 V, T_amb= 25 °C.

[2] V_DDmust be lowered to 1 V in order to reset part.

[3] Value not tested in production, but guaranteed by design and characterization.

[4] Part-to-part mismatch is calculated:

where ‘ideal output current’ = 31.875 mA (R_ext= 2 kΩ, IREFx = FFh).

[5] Channel-to-channel mismatch is calculated:

13 Dynamic characteristics

Table 29.ꢀDynamic characteristics^[1]

Symbol

f_SCLK

t_LOW

t_HIGH

t_DS

Parameter

Conditions

Min

Typ

Max

Unit

SCLK clock frequency

0

-

10

-

MHz

ns

LOW period of the SCLK clock

HIGH period of the SCLK clock

data set-up time

50

10

20

10

0

-

ns

-

ns

t_DH

data hold time

-

ns

t_CSS

chip select asserted to SCLK rise set-up time

SCLK fall to chip select de-asserted hold time

minimum chip select de-asserted HIGH time

-

ns

t_CSH

-

ns

t_{CS_HI}

40

-

ns

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Table 29.ꢀDynamic characteristics^[1]...continued

Symbol

t_d(SDO)

Parameter

Conditions

Min

Typ

Max

40

1^[2]

Unit

ns

SDO delay time

C_L= 50 pF

-

t_d(LED0)

The latency time between OE pin assertion to

LED channel 0 output on

µs

t_OE(disable)OE pin disable (HIGH) period time

t_OE(enable)OE pin enable (LOW) period time

250

-

ns

[1] All parameters tested at V_DD= 3 V to 5.5 V; V_SS= 0 V; T_amb= +25 °C. Specifications over temperature are guaranteed by design.

[2] Guaranteed by design.

50%

CS

t

CS_HI

LOW HIGH

CSS

CSH

50%

SCLK

t

DS

1 / f

DH

SCLK

D13

50%

D14

SDI

D15

D2

D1

D0

D15

t

d(SDO)

D1

SDO

D4

D3

D2

D0

50%

aaa-011895

Figure 18.ꢀDefinition of timing

LED0- 23

OE

t

OE(disable)

OE(enable)

aaa-040787

Figure 19.ꢀOE pin timing

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14 Test information

V or V

DD LED

open

V

SS

V

R

100

DD

L

V

O

I

PULSE

DUT

GENERATOR

C

50 pF

L

R

T

002aag359

R_L= Load resistor for LEDn.

C_L= Load capacitance includes jig and probe capacitance.

R_T= Termination resistance should be equal to the output impedance Z_oof the pulse generators.

Figure 20.ꢀTest circuitry for switching times

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15 Package outline

Figure 21.ꢀPackage outline SOT1369-5 (HVQFN40) (1 of 3)

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Figure 22.ꢀPackage outline SOT1369-5 (HVQFN40) (2 of 3)

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Figure 23.ꢀPackage outline SOT1369-5 (HVQFN40) (3 of 3)

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16 Handling information

All input and output pins are protected against ElectroStatic Discharge (ESD) under

normal handling. When handling ensure that the appropriate precautions are taken as

described in JESD625-A or equivalent standards.

17 Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering ICs can be found in Application Note AN10365 “Surface mount reflow

soldering description”.

17.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached

to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides

both the mechanical and the electrical connection. There is no single soldering method

that is ideal for all IC packages. Wave soldering is often preferred when through-hole

and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is

not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high

densities that come with increased miniaturization.

17.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming

from a standing wave of liquid solder. The wave soldering process is suitable for the

following:

• Through-hole components

• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board

Not all SMDs can be wave soldered. Packages with solder balls, and some leadless

packages which have solder lands underneath the body, cannot be wave soldered. Also,

leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,

due to an increased probability of bridging.

The reflow soldering process involves applying solder paste to a board, followed by

component placement and exposure to a temperature profile. Leaded packages,

packages with solder balls, and leadless packages are all reflow solderable.

Key characteristics in both wave and reflow soldering are:

• Board specifications, including the board finish, solder masks and vias

• Package footprints, including solder thieves and orientation

• The moisture sensitivity level of the packages

• Package placement

• Inspection and repair

• Lead-free soldering versus SnPb soldering

17.3 Wave soldering

Key characteristics in wave soldering are:

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

• Process issues, such as application of adhesive and flux, clinching of leads, board

transport, the solder wave parameters, and the time during which components are

exposed to the wave

• Solder bath specifications, including temperature and impurities

17.4 Reflow soldering

Key characteristics in reflow soldering are:

• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads

to higher minimum peak temperatures (see Figure 24) than a SnPb process, thus

reducing the process window

• Solder paste printing issues including smearing, release, and adjusting the process

window for a mix of large and small components on one board

• Reflow temperature profile; this profile includes preheat, reflow (in which the board

is heated to the peak temperature) and cooling down. It is imperative that the peak

temperature is high enough for the solder to make reliable solder joints (a solder

paste characteristic). In addition, the peak temperature must be low enough that the

packages and/or boards are not damaged. The peak temperature of the package

depends on package thickness and volume and is classified in accordance with

Table 30 and Table 31

Table 30.ꢀSnPb eutectic process (from J-STD-020D)

Package thickness (mm)

Package reflow temperature (°C)

Volume (mm³)

< 350

235

≥ 350

< 2.5

≥ 2.5

220

Table 31.ꢀLead-free process (from J-STD-020D)

Package thickness (mm)

Package reflow temperature (°C)

Volume (mm³)

< 350

260

350 to 2000

> 2000

260

< 1.6

260

250

245

1.6 to 2.5

> 2.5

260

245

250

245

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 24.

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maximum peak temperature

= MSL limit, damage level

temperature

minimum peak temperature

= minimum soldering temperature

peak

temperature

time

001aac844

MSL: Moisture Sensitivity Level

Figure 24.ꢀTemperature profiles for large and small components

For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.

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18 Soldering: PCB footprints

Figure 25.ꢀPCB footprint for SOT1369-5 (HVQFN40); solder mask opening pattern

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24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Figure 26.ꢀPCB footprint for SOT1369-5 (HVQFN40); I/O pads and solderable area

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Figure 27.ꢀPCB footprint for SOT1369-5 (HVQFN40); solder paste stencil

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19 Abbreviations

Table 32.ꢀAbbreviations

Acronym

Description

CDM

DAC

DUT

Charged-Device Model

Digital-to-Analog Converter

Device Under Test

ESD

ElectroStatic Discharge

Field-Effect Transistor

Human Body Model

FET

HBM

LED

Light Emitting Diode

LSB

Least Significant Bit

MCU

MISO

MOSI

MSB

NMOS

PCB

MicroController Unit

Master In, Slave Out

Master Out, Slave In

Most Significant Bit

Negative-channel Metal-Oxide Semiconductor

Printed-Circuit Board

PMOS

PWM

RGB

RGBA

SMBus

SPI

Positive-channel Metal-Oxide Semiconductor

Pulse Width Modulation

Red/Green/Blue

Red/Green/Blue/Amber

System Management Bus

Serial Peripheral Interface

20 Revision history

Table 33.ꢀRevision history

Document ID

PCA9957 v.2.0

Modifications:

Release date

20210225

Data sheet status

Change notice

Supersedes

Product data sheet

-

PCA9957 v.1.0

• Added V_tripminimum of 1.85 V

• Section 7.2.13 "LED error detection": Corrected "if there is a fault condition in any of the 16

channels" to "if there is a fault condition in any of the 24 channels"

• Section 7.2.9 "OFFSET — LEDn output delay offset register": Updated register description

information for bits 3:0

• Section 13 "Dynamic characteristics": Added OE pin enable/disable min time and chart

PCA9957 v.1.0

20191024

Product data sheet

-

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21 Legal information

21.1 Data sheet status

Document status^[1][2]

Product status^[3]

Definition

Objective [short] data sheet

Development

This document contains data from the objective specification for product

development.

Preliminary [short] data sheet

Product [short] data sheet

Qualification

Production

This document contains data from the preliminary specification.

This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple

devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

21.2 Definitions

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer’s own

risk.

Draft — A draft status on a document indicates that the content is still

under internal review and subject to formal approval, which may result

in modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included in a draft version of a document and shall have no

liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is

intended for quick reference only and should not be relied upon to contain

detailed and full information. For detailed and full information see the

relevant full data sheet, which is available on request via the local NXP

Semiconductors sales office. In case of any inconsistency or conflict with the

short data sheet, the full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes

no representation or warranty that such applications will be suitable

for the specified use without further testing or modification. Customers

are responsible for the design and operation of their applications and

products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications

and products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with

their applications and products. NXP Semiconductors does not accept any

liability related to any default, damage, costs or problem which is based

on any weakness or default in the customer’s applications or products, or

the application or use by customer’s third party customer(s). Customer is

responsible for doing all necessary testing for the customer’s applications

and products using NXP Semiconductors products in order to avoid a

default of the applications and the products or of the application or use by

customer’s third party customer(s). NXP does not accept any liability in this

respect.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product

is deemed to offer functions and qualities beyond those described in the

Product data sheet.

21.3 Disclaimers

Limited warranty and liability — Information in this document is believed

to be accurate and reliable. However, NXP Semiconductors does not

give any representations or warranties, expressed or implied, as to the

accuracy or completeness of such information and shall have no liability

for the consequences of use of such information. NXP Semiconductors

takes no responsibility for the content in this document if provided by an

information source outside of NXP Semiconductors. In no event shall NXP

Semiconductors be liable for any indirect, incidental, punitive, special or

consequential damages (including - without limitation - lost profits, lost

savings, business interruption, costs related to the removal or replacement

of any products or rework charges) whether or not such damages are based

on tort (including negligence), warranty, breach of contract or any other

legal theory. Notwithstanding any damages that customer might incur for

any reason whatsoever, NXP Semiconductors’ aggregate and cumulative

liability towards customer for the products described herein shall be limited

in accordance with the Terms and conditions of commercial sale of NXP

Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Right to make changes — NXP Semiconductors reserves the right to

make changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

PCA9957

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 25 February 2021

53 / 56

NXP Semiconductors

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or

the grant, conveyance or implication of any license under any copyrights,

patents or other industrial or intellectual property rights.

such automotive applications, use and specifications, and (b) whenever

customer uses the product for automotive applications beyond NXP

Semiconductors’ specifications such use shall be solely at customer’s own

risk, and (c) customer fully indemnifies NXP Semiconductors for any liability,

damages or failed product claims resulting from customer design and use

of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It is neither qualified nor

tested in accordance with automotive testing or application requirements.

NXP Semiconductors accepts no liability for inclusion and/or use of non-

automotive qualified products in automotive equipment or applications. In

the event that customer uses the product for design-in and use in automotive

applications to automotive specifications and standards, customer (a) shall

use the product without NXP Semiconductors’ warranty of the product for

21.4 Trademarks

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

PCA9957

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 25 February 2021

54 / 56

NXP Semiconductors

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Tables

Tab. 1.

Tab. 2.

Tab. 3.

Tab. 4.

Tab. 5.

Ordering information ..........................................3

Ordering options ................................................3

4Bh, 4Fh, 53h, 57h) for each group bit

description ....................................................... 19

Tab. 16. GRAD_MODE_SEL[0:1] - Gradation mode

select register for channel 23 to channel 0

(address 58h, 59h, 5Ah) bit description ...........20

Tab. 17. GRAD_GRP_SEL[0:3] - Gradation group

select register for channel 23 to channel

Pin description ...................................................5

Register summary - default values ....................7

MODE1 - Mode register 1 (address 00h) bit

description ....................................................... 11

MODE2 - Mode register 2 (address 01h) bit

description ....................................................... 11

LEDOUT0 to LEDOUT5 - LED driver output

state registers (address 08h to 0Dh) bit

description ....................................................... 12

GRPPWM - Group brightness control

register (address 0Eh) bit description ..............14

GRPFREQ - Group frequency register

Tab. 6.

Tab. 7.

0 (address 5Bh, 5Ch, 5Dh, 5Eh, 5Fh,

60h, 61h, 62h, 63h, 64h, 65h, 66h) bit

description ....................................................... 20

Tab. 18. GRAD_CNTL[0:1] - Gradation control

register for group 5 to group 0 (address

67h, 68h) bit description ..................................22

Tab. 19. OFFSET - LEDn output delay offset

Tab. 8.

Tab. 9.

(address 0Fh) bit description ...........................14

register (address 69h) bit description ..............25

Tab. 20. PWMALL - brightness control for all

Tab. 10. PWM0 to PWM23 - PWM registers 0 to 23

(address 10h to 27h) bit description ................14

Tab. 11. IREF0 to IREF23 - LED output gain

control registers (address 28h to 3Fh) bit

description ....................................................... 16

Tab. 12. RAMP_RATE_GRP[0:3] - Ramp enable

and rate control registers (address 40h,

44h, 48h, 4Ch, 50h, 54h) for each group bit

description ....................................................... 18

Tab. 13. STEP_TIME_GRP[0:3] - Step time control

registers (address 41h, 45h, 49h, 4Dh, 51h,

55h) for each group bit description ..................18

Tab. 14. HOLD_CNTL_GRP[0:3] - Hold ON and

OFF enable and time control registers

(address 42h, 46h, 4Ah, 4Eh, 52h, 56h) for

each group bit description ...............................19

Tab. 15. IREF_GRP[0:3] - Final and hold ON output

gain setting registers (address 43h, 47h,

LEDn outputs register (address 6Ah) bit

description ....................................................... 26

Tab. 21. IREFALL - Output gain control for all LED

outputs (address 6Bh) bit description ..............27

Tab. 22. EFLAG0 to EFLAG5 - Error flag registers

(address 02h to 07h) bit description ................29

Tab. 23. ERRx bit description ....................................... 30

Tab. 24. Open-circuit detection ..................................... 30

Tab. 25. Short-circuit detection ......................................30

Tab. 26. Limiting values ................................................ 38

Tab. 27. Thermal characteristics ................................... 38

Tab. 28. Static characteristics ....................................... 38

Tab. 29. Dynamic characteristics .................................. 40

Tab. 30. SnPb eutectic process (from J-STD-020D) ..... 47

Tab. 31. Lead-free process (from J-STD-020D) ............47

Tab. 32. Abbreviations ...................................................52

Tab. 33. Revision history ...............................................52

Figures

Fig. 1.

Fig. 2.

Fig. 3.

Block diagram of PCA9957 ...............................4

Pin configuration for HVQFN40 .........................5

Register address and data format for each

slave .................................................................. 7

Linear and exponential adjustment curves ...... 12

Gradation timing ..............................................17

Ramp calculation example 1 ...........................23

Ramp calculation example 2 ...........................24

Gradation output waveform in single shot

Fig. 17. Typical application ...........................................36

Fig. 18. Definition of timing .......................................... 41

Fig. 19. OE pin timing .................................................. 41

Fig. 20. Test circuitry for switching times ......................42

Fig. 21. Package outline SOT1369-5 (HVQFN40) (1

of 3) .................................................................43

Fig. 22. Package outline SOT1369-5 (HVQFN40) (2

of 3) .................................................................44

Fig. 23. Package outline SOT1369-5 (HVQFN40) (3

of 3) .................................................................45

Fig. 24. Temperature profiles for large and small

components .....................................................48

Fig. 25. PCB footprint for SOT1369-5 (HVQFN40);

solder mask opening pattern ...........................49

Fig. 26. PCB footprint for SOT1369-5 (HVQFN40);

I/O pads and solderable area ..........................50

Fig. 27. PCB footprint for SOT1369-5 (HVQFN40);

solder paste stencil ......................................... 51

Fig. 4.

Fig. 5.

Fig. 6.

Fig. 7.

Fig. 8.

or continuous mode ........................................ 25

Maximum ILED versus Rext ............................28

Fig. 9.

Fig. 10. IO(target) versus IREFx value with Rext = 2

kΩ ....................................................................28

Fig. 11.

Fig. 12. System level connection ................................. 33

Fig. 13. Data format ..................................................... 33

Fig. 14. Write access ....................................................34

Fig. 15. Read access ................................................... 35

Fig. 16. Overlapped read and write access ..................35

Brightness + Group Dimming signals ..............32

PCA9957

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 25 February 2021

55 / 56

NXP Semiconductors

PCA9957

24-channel SPI serial bus 32 mA/5.5 V constant current LED driver

Contents

1

2

3

4

4.1

5

6

6.1

6.2

7

7.1

7.2

7.2.1

7.2.2

7.2.3

General description ............................................ 1

7.6

8

Individual brightness control with group

Features and benefits .........................................2

Applications .........................................................3

Ordering information .......................................... 3

Ordering options ................................................ 3

Block diagram ..................................................... 4

Pinning information ............................................ 5

Pinning ...............................................................5

Pin description ...................................................5

Functional description ........................................6

Register address and data ................................ 6

Register definitions ............................................ 7

MODE1 — Mode register 1 .............................11

MODE2 — Mode register 2 .............................11

LEDOUT0 to LEDOUT5, LED driver output

state ................................................................. 12

GRPPWM, group duty cycle control ................ 14

GRPFREQ, group frequency ...........................14

PWM0 to PWM23, individual brightness

control .............................................................. 14

IREF0 to IREF23, LED output current value

registers ........................................................... 15

Gradation control ............................................. 16

RAMP_RATE_GRP0 to RAMP_RATE_

dimming/blinking .............................................. 31

Characteristics of the 4-wire SPI serial-bus

interface ............................................................. 32

SPI-compatible 4-wire serial interface

signals ..............................................................32

Data format ......................................................33

Write access sequence ................................... 34

Read access sequence ................................... 34

Overlapped read and write access

sequence ......................................................... 35

Application design-in information ...................36

Thermal considerations ................................... 36

Limiting values ..................................................38

Thermal characteristics ....................................38

Static characteristics ........................................38

Dynamic characteristics ...................................40

Test information ................................................ 42

Package outline .................................................43

Handling information ........................................46

Soldering of SMD packages .............................46

Introduction to soldering .............................

8.1

8.2

8.3

8.4

8.5

9

9.1

10

11

12

13

14

15

16

7.2.4

7.2.5

7.2.6

7.2.7

17

17.1

17.2

17.3

17.4

18

19

20

21

7.2.8

7.2.8.1

Wave and reflow soldering .........................

Wave soldering ...........................................

Reflow soldering .........................................

Soldering: PCB footprints ................................49

Abbreviations .................................................... 52

Revision history ................................................ 52

Legal information ..............................................53

GRP5, ramp rate control registers ...................18

STEP_TIME_GRP0 to STEP_TIME_GRP5,

step time control registers ............................... 18

HOLD_CNTL_GRP0 to HOLD_CNTL_

GRP5, hold ON and OFF control registers ...... 19

IREF_GRP0 to IREF_GRP5, output gain

7.2.8.2

7.2.8.3

7.2.8.4

7.2.8.5

7.2.8.6

control .............................................................. 19

GRAD_MODE_SEL0 to GRAD_MODE_

SEL2, Gradation mode select registers ........... 20

GRAD_GRP_SEL0 to GRAD_GRP_SEL11,

Gradation group select registers ......................20

GRAD_CNTL, Gradation control register .........22

Ramp control — equation and calculation

7.2.8.7

7.2.8.8

example ........................................................... 23

OFFSET — LEDn output delay offset

7.2.9

register .............................................................25

PWMALL — brightness control for all LEDn

outputs ............................................................. 26

IREFALL register: output current value for

all LED outputs ................................................27

LED driver constant current outputs ................ 27

7.2.10

7.2.11

7.2.12

7.2.12.1 Adjusting output current ...................................27

7.2.13 LED error detection ......................................... 28

7.2.13.1 Open-circuit detection principle ....................... 30

7.2.13.2 Short-circuit detection principle ........................30

7.2.14

7.3

7.4

Overtemperature protection .............................31

Active LOW output enable input ......................31

Power-on reset ................................................ 31

Hardware reset recovery ................................. 31

7.5

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section 'Legal information'.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 25 February 2021

Document identifier: PCA9957


型号：	PCA9957HN
厂家：	NXP
描述：	24-channel SPI serial bus 32 mA/5.5 V constant current LED driver
文件：	总56页 (文件大小：858K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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