PESD5V0L6US,118 [NXP]
PESD5V0L6UAS; PESD5V0L6US - Low capacitance 6-fold ESD protection diode arrays SOIC 8-Pin;
| 型号： | PESD5V0L6US,118 |
| 厂家： | 
NXP |
| 描述： | PESD5V0L6UAS; PESD5V0L6US - Low capacitance 6-fold ESD protection diode arrays SOIC 8-Pin 局域网 光电二极管 |
| 文件： | 总14页 (文件大小：104K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PESD5V0L6UAS;
PESD5V0L6US
Low capacitance 6-fold ESD protection diode arrays
Rev. 03 — 18 August 2009
Product data sheet
1. Product profile
1.1 General description
Low capacitance 6-fold ESD protection diode arrays in small plastic packages designed to
protect up to six transmission or data lines from the damage caused by ElectroStatic
Discharge (ESD) and other transients.
Table 1.
Product overview
Type number
Package
Name
NXP
PESD5V0L6UAS
PESD5V0L6US
TSSOP8
SO8
SOT505-1
SOT96-1
1.2 Features
I ESD protection of up to six lines
I Low diode capacitance
I Ultra low leakage current: IRM = 8 nA
I ESD protection of up to 20 kV
I IEC 61000-4-2, level 4 (ESD)
I Max. peak pulse power: PPP = 35 W
I Low clamping voltage: V(CL)R = 15 V
I IEC 61000-4-5 (surge); IPP = 2.5 A
1.3 Applications
I Computers and peripherals
I Communication systems
I Audio and video equipment
I High speed data lines
I Parallel ports
1.4 Quick reference data
Table 2.
Quick reference data
Symbol Parameter
Conditions
Min
Typ
-
Max
5
Unit
V
VRWM
Cd
reverse stand-off voltage
diode capacitance
-
-
VR = 0 V;
f = 1 MHz
16
19
pF
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
2. Pinning information
Table 3.
Discrete pinning
Pin
Description
Simplified outline
Symbol
TSSOP8
1
2
3
4
5
6
7
8
cathode 1
8
5
1
2
8
7
cathode 2
cathode 3
cathode 4
3
4
6
5
cathode 5
common anode
common anode
cathode 6
1
4
sym004
SO8
1
cathode 1
8
5
1
2
8
7
2
cathode 2
3
cathode 3
4
cathode 4
3
4
6
5
5
cathode 5
1
4
6
common anode
common anode
cathode 6
7
sym004
8
3. Ordering information
Table 4.
Ordering information
Type number
Package
Name
Description
Version
PESD5V0L6UAS
PESD5V0L6US
TSSOP8 plastic thin shrink small outline package; 8 leads; SOT505-1
body width 3 mm
SO8
plastic small outline package; 8 leads;
body width 3.9 mm
SOT96-1
4. Marking
Table 5.
Marking
Type number
PESD5V0L6UAS
PESD5V0L6US
Marking code
5V06U
5V06US
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
2 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Per diode
PPP
Parameter
Conditions
Min
Max
Unit
[1][2]
[1][2]
peak pulse power
8/20 µs pulse
8/20 µs pulse
-
35
W
A
IPP
peak pulse current
junction temperature
ambient temperature
storage temperature
-
2.5
Tj
-
150
+150
+150
°C
°C
°C
Tamb
Tstg
−65
−65
[1] Non-repetitive current pulse 8/20 µs exponentially decay waveform according to IEC 61000-4-5;
see Figure 1.
[2] Measured from pin 1, 2, 3, 4, 5 or 8 to pin 6 or 7.
Table 7.
Symbol
ESD
ESD maximum ratings
Parameter
Conditions
Min
Max
Unit
[1][2]
electrostatic discharge
capability
IEC 61000-4-2
(contact discharge)
-
20
kV
HBM MIL-STD883
-
10
kV
[1] Device stressed with ten non-repetitive ElectroStatic Discharge (ESD) pulses; see Figure 2.
[2] Measured from pin 1, 2, 3, 4, 5 or 8 to pin 6 or 7.
Table 8.
ESD standards compliance
Standard
Conditions
IEC 61000-4-2, level 4 (ESD); see Figure 2
HBM MIL-STD883, class 3
> 15 kV (air); > 8 kV (contact)
> 4 kV
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
3 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
001aaa191
I
pp
001aaa630
120
100 %
90 %
100 % I ; 8 µs
PP
I
PP
(%)
80
−t
e
50 % I ; 20 µs
PP
40
10 %
t
t = 0.7 to 1 ns
r
0
30 ns
0
10
20
30
40
t (µs)
60 ns
Fig 1. 8/20 µs pulse waveform according to
Fig 2. ElectroStatic Discharge (ESD) pulse waveform
according to IEC 61000-4-2
IEC 61000-4-5
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
4 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
6. Characteristics
Table 9.
Characteristics
Tamb = 25 °C unless otherwise specified
Symbol
Per diode
VRWM
Parameter
Conditions
Min
Typ
Max
Unit
reverse stand-off voltage
reverse leakage current
clamping voltage
-
-
5
V
IRM
VRWM = 5 V
IPP = 1 A
-
8
25
10
15
7.2
100
19
nA
V
[1][2]
[1][2]
V(CL)R
-
-
IPP = 2.5 A
IR = 1 mA
IR = 1 mA
-
-
V
V(BR)
rdif
breakdown voltage
differential resistance
diode capacitance
6.4
6.8
-
V
-
-
Ω
pF
Cd
VR = 0 V; f = 1 MHz;
see Figure 5
16
[1] Non-repetitive current pulse 8/20 µs exponentially decay waveform according to IEC 61000-4-5; see Figure 1.
[2] Measured between each cathode on pins 1, 2, 3, 4, 5 or 8 and anode on pin 6 or 7.
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
5 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
001aaa192
001aaa193
2
10
1.2
P
PP
P
PP(25°C)
P
pp
(W)
0.8
10
0.4
1
0
2
3
4
1
10
10
10
10
0
50
100
150
200
t
(µs)
T (°C)
j
p
Tamb = 25 °C
Fig 3. Peak pulse power as a function of exponential
pulse duration tp; typical values
Fig 4. Relative variation of peak pulse power as a
function of junction temperature; typical
values
001aaa194
001aaa195
18
10
C
d
(pF)
16
I
RM
I
RM(25˚C)
14
12
10
8
1
−1
10
0
1
2
3
4
5
−100
−50
0
50
100
150
V
(V)
T (°C)
j
R
Tamb = 25 °C; f = 1 MHz
Fig 5. Diode capacitance as a function of reverse
voltage; typical values
Fig 6. Relative variation of reverse leakage current
as a function of junction temperature; typical
values
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
6 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
ESD TESTER
RG 223/U
50 Ω coax
4 GHz DIGITIZING
OSCILLOSCOPE
R
Z
450 Ω
10×
ATTENUATOR
C
Z
50 Ω
IEC61000-4-2 network
= 150 pF; R = 330 Ω
C
Z
Z
DUT: PESD5V0L6UAS
PESD5V0L6US
vertical scale = 200 V/div
horizontal scale = 50 ns/div
vertical scale = 10 V/div
horizontal scale = 50 ns/div
GND
GND
unclamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
clamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
GND
GND
vertical scale = 10 V/div
horizontal scale = 50 ns/div
vertical scale = 200 V/div
horizontal scale = 50 ns/div
unclamped −1 kV ESD voltage waveform
(IEC61000-4-2 network)
clamped −1 kV ESD voltage waveform
(IEC61000-4-2 network)
006aaa064
Fig 7. ESD clamping test setup and waveforms
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
7 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
7. Application information
The PESD5V0L6UAS and the PESD5V0L6US are designed for protection of up to six
unidirectional data lines from the damage caused by ElectroStatic Discharge (ESD) and
surge pulses. The PESD5V0L6UAS and the PESD5V0L6US may be used on lines where
the signal polarity is above or below ground.
The PESD5V0L6UAS and the PESD5V0L6US provide a surge capability of 35 W per line
for a 8/20 µs waveform.
high speed
data lines
PESD5V0L6UAS
PESD5V0L6US
PESD5V0L6UAS
PESD5V0L6US
n.c.
n.c.
unidirectional protection of 6 lines
bidirectional protection of 5 lines
006aaa065
Fig 8. Typical application for ESD protection of data lines
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, EFT and surge transients. The
following guidelines are recommended:
1. Place the protection device as close to the input terminal or connector as possible.
2. The path length between the protection device and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protection conductors in parallel with unprotected conductor.
5. Minimize all printed-circuit board conductive loops including power and ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer printed-circuit
boards, use ground vias.
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
8 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
8. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm
SOT505-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
8
A
(A )
2
A
3
A
1
pin 1 index
θ
L
p
L
1
4
detail X
e
w M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
A
A
A
b
c
D
E
e
H
E
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
max.
0.15
0.05
0.95
0.80
0.45
0.25
0.28
0.15
3.1
2.9
3.1
2.9
5.1
4.7
0.7
0.4
0.70
0.35
6°
0°
mm
1.1
0.65
0.25
0.94
0.1
0.1
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-04-09
03-02-18
SOT505-1
Fig 9. Package outline SOT505-1 (TSSOP8)
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
9 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A
X
v
c
y
H
M
A
E
Z
5
8
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
4
e
w
M
detail X
b
p
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.20
0.014 0.0075 0.19
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches 0.069
0.01 0.004
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT96-1
076E03
MS-012
Fig 10. Package outline SOT96-1 (SO8/MS-012)
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
10 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
9. Packing information
Table 10. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number
Package
Description
Packing quantity
1000
-
2500
PESD5V0L6UAS
PESD5V0L6US
SOT505-1
SOT96-1
8 mm pitch, 12 mm tape and reel
8 mm pitch, 12 mm tape and reel
-118
-118
-115
[1] For further information and the availability of packing methods, see Section 12.
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
11 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
10. Revision history
Table 11. Revision history
Document ID
Release date
20090818
Data sheet status
Change notice
Supersedes
PESD5V06UAS_US_3
Modifications:
Product data sheet
-
PESD5V06UAS_US_2
• This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
• Table 3 “Discrete pinning”: amended
PESD5V06UAS_US_2
PESD5V0L6US_1
20041109
Product data sheet
-
-
PESD5V0L6US_1
-
20040315
Product specification
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
12 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
11. Legal information
11.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
11.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
11.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
11.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
12. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PESD5V0L6UAS_US_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 18 August 2009
13 of 14
PESD5V0L6UAS; PESD5V0L6US
NXP Semiconductors
Low capacitance 6-fold ESD protection diode arrays
13. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
1.4
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Application information. . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Packing information. . . . . . . . . . . . . . . . . . . . . 11
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
3
4
5
6
7
8
9
10
11
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
11.1
11.2
11.3
11.4
12
13
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 18 August 2009
Document identifier: PESD5V0L6UAS_US_3
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