PHP10N40E [NXP]
PowerMOS transistors Avalanche energy rated; 功率MOS晶体管的额定雪崩能量型号: | PHP10N40E |
厂家: | NXP |
描述: | PowerMOS transistors Avalanche energy rated |
文件: | 总7页 (文件大小:118K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHP10N60E
FEATURES
SYMBOL
QUICK REFERENCE DATA
d
• Repetitive Avalanche Rated
• Fast switching
VDSS = 600 V
ID = 9.6 A
• Stable off-state characteristics
• High thermal cycling performance
• Low thermal resistance
g
RDS(ON) ≤ 0.75 Ω
s
GENERAL DESCRIPTION
PINNING
SOT78 (TO220AB)
N-channel, enhancement mode
PIN
DESCRIPTION
tab
field-effect
power
transistor,
intended for use in off-line switched
mode power supplies, T.V. and
computer monitor power supplies,
d.c.tod.c. converters, motorcontrol
circuits and general purpose
switching applications.
1
2
3
gate
drain
source
case drain
1 2 3
The PHP10N60E is supplied in the
SOT78 (TO220AB) conventional
leaded package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDSS
VDGR
VGS
ID
Drain-source voltage
Tj = 25 ˚C to 150˚C
-
600
600
± 30
9.6
V
V
Drain-gate voltage
Tj = 25 ˚C to 150˚C; RGS = 20 kΩ
-
Gate-source voltage
Continuous drain current
-
V
Tmb = 25 ˚C; VGS = 10 V
Tmb = 100 ˚C; VGS = 10 V
Tmb = 25 ˚C
-
A
-
6.1
A
IDM
PD
Tj, Tstg
Pulsed drain current
Total dissipation
Operating junction and
storage temperature range
-
-
38
167
150
A
Tmb = 25 ˚C
W
˚C
- 55
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
EAS
Non-repetitive avalanche
energy
Unclamped inductive load, IAS = 9.4 A;
tp = 0.2 ms; Tj prior to avalanche = 25˚C;
-
731
mJ
V
DD ≤ 50 V; RGS = 50 Ω; VGS = 10 V
EAR
Repetitive avalanche energy1 IAR = 9.6 A; tp = 2.5 µs; Tj prior to
avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V
Repetitive and non-repetitive
-
-
18
mJ
A
IAS, IAR
9.6
avalanche current
1 pulse width and repetition rate limited by Tj max.
December 1998
1
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHP10N60E
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Rth j-mb
Rth j-a
Thermal resistance junction
to mounting base
Thermal resistance junction
to ambient
-
-
-
0.75 K/W
K/W
60
-
ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
V(BR)DSS Drain-source breakdown
CONDITIONS
MIN. TYP. MAX. UNIT
VGS = 0 V; ID = 0.25 mA
VDS = VGS; ID = 0.25 mA
600
-
-
-
-
V
voltage
∆V(BR)DSS / Drain-source breakdown
0.1
%/K
∆Tj
voltage temperature
coefficient
RDS(ON)
VGS(TO)
gfs
Drain-source on resistance
Gate threshold voltage
Forward transconductance
VGS = 10 V; ID = 5 A
VDS = VGS; ID = 0.25 mA
VDS = 30 V; ID = 5 A
-
2.0
4
0.68 0.75
Ω
V
3.0
6.5
2
4.0
-
S
IDSS
Drain-source leakage current VDS = 600 V; VGS = 0 V
-
100
1000
200
µA
µA
nA
VDS = 480 V; VGS = 0 V; Tj = 125 ˚C
-
-
80
10
IGSS
Gate-source leakage current VGS = ±30 V; VDS = 0 V
Qg(tot)
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
ID = 10 A; VDD = 480 V; VGS = 10 V
-
-
-
75
6.8
37
100
12
55
nC
nC
nC
td(on)
tr
td(off)
tf
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 300 V; RD = 30 Ω;
RG = 5.6 Ω
-
-
-
-
11
32
98
37
-
-
-
-
ns
ns
ns
ns
Ld
Ld
Ls
Internal drain inductance
Internal drain inductance
Internal source inductance
Measured from tab to centre of die
Measured from drain lead to centre of die
Measured from source lead to source
bond pad
-
-
-
3.5
4.5
7.5
-
-
-
nH
nH
nH
Ciss
Coss
Crss
Input capacitance
Output capacitance
Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
-
-
-
1295
163
86
-
-
-
pF
pF
pF
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
IS
Continuous source current
(body diode)
Tmb = 25˚C
-
-
-
-
-
-
9.6
38
A
A
V
ISM
Pulsed source current (body Tmb = 25˚C
diode)
VSD
Diode forward voltage
IS = 10 A; VGS = 0 V
1.2
trr
Qrr
Reverse recovery time
Reverse recovery charge
IS = 10 A; VGS = 0 V; dI/dt = 100 A/µs
-
-
600
6
-
-
ns
µC
December 1998
2
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHP10N60E
Normalised Power Derating
PD%
120
110
100
90
80
70
60
50
40
30
20
10
0
PHP10N60E
Transient Thermal Impedance, Zth j-a (K/W)
1
0.1
D = 0.5
0.2
0.1
0.05
0.02
P
D = tp/T
D
tp
0.01
Single pulse
t
T
0.001
1E-06 1E-05 1E-04 1E-03 1E-02 1E-01 1E+00 1E+01
pulse width, tp (s)
0
20
40
60
80
Tmb /
100
120
140
C
Fig.1. Normalised power dissipation.
PD% = 100 PD/PD 25 ˚C = f(Tmb)
Fig.4. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
Normalised Current Derating
ID%
120
110
100
90
80
70
60
50
40
30
20
10
0
Drain Current, ID (A)
Tj = 25 C
PHP10N60E
8
7
6
5
4
3
2
1
0
VGS = 10 V
5 V
4.8 V
4.6 V
4.4 V
4.2 V
4 V
0
1
2
3
4
5
0
20
40
60
80
Tmb /
100
120
140
Drain-Source Voltage, VDS (V)
C
Fig.2. Normalised continuous drain current.
ID% = 100 ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V
Fig.5. Typical output characteristics.
ID = f(VDS); parameter VGS
Drain-Source On Resistance, RDS(on) (Ohms)
1.4
1.2
1
PHP10N60E
tp = 10 us
Peak Pulsed Drain Current, IDM (A)
RDS(on) = VDS/ ID
4 V 4.2V
Tj = 25 C
100
10
1
4.4V
4.6V
4.8V
5V
VGS = 10 V
0.8
0.6
0.4
0.2
0
100 us
1 ms
d.c.
10 ms
100 ms
PHP10N60E
7
0.1
10
100
1000
0
1
2
3
4
5
6
8
Drain Current, ID (A)
Drain-Source Voltage, VDS (V)
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter tp
Fig.6. Typical on-state resistance.
RDS(ON) = f(ID); parameter VGS
December 1998
3
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHP10N60E
VGS(TO) / V
PHP10N60E
Drain current, ID (A)
20
max.
4
3
2
1
0
VDS > ID X RDS(ON)
18
Tj = 25 C
16
14
12
10
8
150 C
typ.
min.
6
4
2
0
0
1
2
3
4
5
6
7
-60 -40 -20
0
20
40
Tj /
60
C
80 100 120 140
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter Tj
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS
SUB-THRESHOLD CONDUCTION
ID / A
1E-01
1E-02
1E-03
1E-04
1E-05
1E-06
PHP10N60E
Tj = 25 C
Transconductance, gfs (S)
VDS > ID X RDS(ON)
12
10
8
150 C
2 %
typ
98 %
6
4
2
0
0
5
10
Drain current, ID (A)
15
20
0
1
2
3
4
VGS / V
Fig.8. Typical transconductance.
gfs = f(ID); parameter Tj
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
Normalised RDS(ON) = f(Tj)
a
Capacitances, Ciss, Coss, Crss (pF)
PHP10N60E
Ciss
10000
1000
100
2
1
0
Coss
Crss
10
0.1
1
10
100
-60 -40 -20
0
20 40 60 80 100 120 140
Tj /
Drain-source voltage, VDS (V)
C
Fig.9. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 5 A; VGS = 10 V
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
December 1998
4
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHP10N60E
Source-Drain Diode Current, IF (A)
PHP10N60E
20
18
16
14
12
10
8
PHP10N60E
Gate-source voltage, VGS (V)
15
14
13
12
11
10
9
ID = 10A
Tj = 25 C
200V
100 V
8
150 C
Tj = 25 C
VDD=480V
7
6
5
6
4
4
3
2
2
1
0
0
0
20
40
60
80
100
120
0
0.2
0.4
0.6
0.8
1
1.2
Gate charge, QG (nC)
Drain-Source Voltage, VSDS (V)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); parameter VDS
Fig.16. Source-Drain diode characteristic.
IF = f(VSDS); parameter Tj
Switching times, td(on), tr, td(off), tf (ns)
PHP10N60E
td(off)
Non-repetitive Avalanche current, IAS (A)
25 C
500
450
400
350
300
250
200
150
100
50
10
VDD = 300V
RD = 30 Ohms
Tj prior to avalanche = 125 C
1
VDS
tf
tp
tr
ID
PHP10N60E
td(on)
0.1
0
1E-06
1E-05
1E-04
1E-03
1E-02
0
10
20
30
40
50
Avalanche time, tp (s)
Gate resistance, RG (Ohms)
Fig.14. Typical switching times; td(on), tr, td(off), tf = f(RG)
Fig.17. Maximum permissible non-repetitive
avalanche current (IAS) versus avalanche time (tp);
unclamped inductive load
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
1.15
Maximum Repetitive Avalanche Current, IAR (A)
100
V(BR)DSS @ 25 C
1.1
10
1
Tj prior to avalanche = 25 C
125 C
1.05
1
0.95
0.9
0.1
PHP10N60E
0.01
1E-06
1E-05
1E-04
1E-03
1E-02
0.85
-100
-50
0
50
100
150
Avalanche time, tp (s)
Tj, Junction temperature (C)
Fig.15. Normalised drain-source breakdown voltage;
V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj)
Fig.18. Maximum permissible repetitive avalanche
current (IAR) versus avalanche time (tp)
December 1998
5
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHP10N60E
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
4,5
max
10,3
max
1,3
3,7
2,8
5,9
min
15,8
max
3,0 max
not tinned
3,0
13,5
min
1,3
1 2 3
max
(2x)
0,9 max (3x)
0,6
2,4
2,54 2,54
Fig.19. SOT78 (TO220AB); pin 2 connected to mounting base.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for SOT78 (TO220) envelopes.
3. Epoxy meets UL94 V0 at 1/8".
December 1998
6
Rev 1.000
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHP10N60E
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
December 1998
7
Rev 1.000
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