PHP165NQ08T [NXP]
N-channel TrenchMOS SiliconMAX standard level FET; N沟道的TrenchMOS SiliconMAX标准水平FET型号: | PHP165NQ08T |
厂家: | NXP |
描述: | N-channel TrenchMOS SiliconMAX standard level FET |
文件: | 总13页 (文件大小:183K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PHP165NQ08T
N-channel TrenchMOS SiliconMAX standard level FET
Rev. 02 — 27 March 2009
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology.
1.2 Features and benefits
Fast switching
Low recovered charge
Low on-state resistance
1.3 Applications
AC-to-DC converters secondary side
Class D amplifiers
DC-to-DC converters
Motion control
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C
Min
Typ
Max Unit
VDS
ID
-
-
-
-
75
75
V
A
drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1; see Figure 3
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
-
250
-
W
Source-drain diode
Qr
recovered charge
VGS = 0 V; IS = 5 A;
dIS/dt = 150 A/µs;
VDS = 12 V
56
nC
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 10 V; ID = 25 A;
Tj = 25 °C; see Figure 11;
see Figure 10
-
4.1
5
mΩ
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
2. Pinning information
Table 2.
Pinning information
Pin
1
Symbol Description
Simplified outline
Graphic symbol
G
D
S
D
gate
mb
D
2
drain
source
drain
3
G
mb
mbb076
S
1
2 3
SOT78
( T O - 2 2 0 A B ; S C - 4 6 )
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PHP165NQ08T
TO-220AB;
SC-46
plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78
TO-220AB
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
2 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
75
Unit
V
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 150 °C
Tj ≤ 150 °C; Tj ≥ 25 °C; RGS = 20 kΩ
-
VDGR
VGS
-
75
V
-20
20
V
ID
VGS = 10 V; Tmb = 100 °C; see Figure 1
-
-
75
A
VGS = 10 V; Tmb = 25 °C; see Figure 1;
see Figure 3
75
A
IDM
peak drain current
tp ≤ 10 µs; pulsed; Tmb = 25 °C;
-
400
A
see Figure 3
Ptot
Tstg
Tj
total power dissipation Tmb = 25 °C; see Figure 2
storage temperature
-
250
150
150
30
W
°C
°C
V
-55
-55
-30
junction temperature
VGSM
peak gate-source
voltage
pulsed; tp ≤ 50 µs; δ = 25 %; Tj ≤ 150 °C
Source-drain diode
IS
source current
peak source current
Tmb = 25 °C
-
-
75
A
A
ISM
tp ≤ 10 µs; pulsed; Tmb = 25 °C
400
Avalanche ruggedness
EDS(AL)S non-repetitive
VGS = 10 V; Tj(init) = 25 °C; ID = 75 A; Vsup = 15 V;
-
-
500
75
mJ
A
drain-source avalanche unclamped; tp = 0.1 ms; RGS = 50 Ω
energy
IDS(AL)S
non-repetitive
VGS = 10 V; Vsup = 15 V; RGS = 50 Ω;
drain-source avalanche Tj(init) = 25 °C; unclamped
current
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
3 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
003aac592
003aac591
125
120
Ider
Pder
(%)
(%)
100
75
50
25
0
80
40
0
0
50
100
150
200
0
50
100
150
200
T ( C)
°
j
T ( C)
°
j
Fig 1. Normalized continuous drain current as a
function of mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aac600
103
Limit RDSon = VDS / ID
ID
(A)
t =
10
s
s
μ
μ
102
p
100
1 ms
DC
10
1
10 ms
100 ms
10-1
10-1
1
10
102
VDS (V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
4 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from see Figure 4
junction to mounting
base
-
-
0.5
K/W
Rth(j-a)
thermal resistance from vertical in still air
junction to ambient
-
60
-
K/W
003aac601
1
Zth(j-mb)
(K/W)
0.5
0.2
10-1
0.1
tp
δ =
P
T
0.05
0.02
t
tp
single pulse
T
10-2
10-5
10-4
10-3
10-2
10-1
1
10
tp (s)
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
5 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
67
75
1.1
-
-
-
-
-
-
V
V
V
VGS(th)
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 150 °C;
voltage
see Figure 8
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 8; see Figure 9
2
-
3
-
4
V
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 8
4.4
IDSS
drain leakage current
gate leakage current
VDS = 75 V; VGS = 0 V; Tj = 25 °C
VDS = 75 V; VGS = 0 V; Tj = 150 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
-
-
-
-
-
0.02
-
1
µA
µA
nA
nA
mΩ
500
100
100
11
IGSS
10
10
8.9
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 25 A; Tj = 150 °C;
see Figure 10; see Figure 11
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 11; see Figure 10
-
4.1
5
mΩ
Dynamic characteristics
QG(tot)
QGS
QGD
Ciss
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
ID = 75 A; VDS = 60 V; VGS = 10 V;
Tj = 25 °C; see Figure 12;
see Figure 13
-
-
-
-
-
-
165
32
-
-
-
-
-
-
nC
nC
nC
pF
pF
pF
50
VDS = 25 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 14
8250
920
570
Coss
Crss
reverse transfer
capacitance
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 15 V; RL = 1.25 Ω; VGS = 10 V;
RG(ext) = 6 Ω; Tj = 25 °C
-
-
-
-
48
-
-
-
-
ns
ns
ns
ns
67
turn-off delay time
fall time
144
74
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 15
-
0.8
1.2
V
trr
reverse recovery time
recovered charge
IS = 5 A; dIS/dt = 150 A/µs; VGS = 0 V;
VDS = 12 V
-
-
49
56
-
-
ns
Qr
nC
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
6 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
003aac603
003aac593
300
100
ID
(A)
7.5 V
8 V
7 V
6.5 V
ID
(A)
240
180
120
60
8.5 V
10 V
20 V
75
50
6 V
T = 150
j
C
°
25
C
°
5.5 V
25
0
V
GS = 5 V
0
0
0.5
1
1.5
2
0
2
4
6
V
GS (V)
VDS (V)
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
003aac597
003aac594
105
5
VGS(th)
(V)
C
4
(pF)
max
3
Ciss
typ
104
Crss
2
1
0
min
103
10-1
1
10
-60
0
60
120
180
T ( C)
°
V
GS (V)
j
Fig 8. Gate-source threshold voltage as a function of
junction temperature
Fig 7. Input and reverse transfer capacitances as a
function of gate-source voltage; typical values
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
7 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
003aac595
003aac602
10-1
16
VGS = 5 V
RDSon
ID
(A)
(m
)
Ω
10-2
12
8
5.5 V
6 V
10-3
min
typ
max
6.5 V
10-4
10-5
4
7 V
10 V
8.5 V
8 V
7.5 V
0
0
2
4
6
0
60
120
180
240
300
VGS (V)
ID (A)
Fig 9. Sub-threshold drain current as a function of
gate-source voltage
Fig 10. Drain-source on-state resistance as a function
of drain current; typical values
03aj03
2.5
V
DS
a
I
2
D
V
GS(pl)
1.5
1
V
GS(th)
V
GS
Q
GS1
Q
GS2
Q
Q
GD
GS
0.5
0
Q
G(tot)
003aaa508
Fig 12. Gate charge waveform definitions
−60
0
60
120
180
T (°C)
j
Fig 11. Normalized drain-source on-state resistance
factor as a function of junction temperature
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
8 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
003aac599
003aac596
10
105
ID = 75A
T = 25
VGS
(V)
C
(pF)
C
°
j
14 V
7.5
104
Ciss
VDS = 60 V
5
2.5
0
103
Coss
Crss
102
10-1
0
50
100
150
200
1
10
102
Q
G (nC)
VDS (V)
Fig 13. Gate-source voltage as a function of gate
charge; typical values
Fig 14. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aac598
100
IS
(A)
75
50
25
0
T = 150
j
C
°
25
C
°
0
0.25
0.5
0.75
1
V
SD (V)
Fig 15. Source current as a function of source-drain voltage; typical values
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
9 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
7. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
SOT78
E
p
A
A
1
q
mounting
D
1
base
D
(1)
(1)
L
1
L
2
Q
(2)
b
1
L
(3×)
(2)
b
2
(2×)
1
2
3
b(3×)
c
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
L
2
(2)
(2)
(1)
1
UNIT
mm
A
A
b
b
b
c
D
D
1
E
e
L
L
p
q
Q
1
1
2
max.
4.7
4.1
1.40
1.25
0.9
0.6
1.6
1.0
1.3
1.0
0.7
0.4
16.0
15.2
6.6
5.9
10.3
9.7
15.0 3.30
12.8 2.79
3.8
3.5
3.0
2.7
2.6
2.2
2.54
3.0
Notes
1. Lead shoulder designs may vary.
2. Dimension includes excess dambar.
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
08-04-23
08-06-13
SOT78
SC-46
3-lead TO-220AB
Fig 16. Package outline SOT78 (TO-220AB)
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
10 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PHP165NQ08T_2
Modifications:
20090327
Product data sheet
-
PHP165NQ08T_1
• Maximum value of thermal resistance from junction to mounting base updated.
20090310 Product data sheet
PHP165NQ08T_1
-
-
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
11 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
9. Legal information
9.1 Data sheet status
Document status [1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Applications — Applications that are described herein for any of these
9.2 Definitions
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
9.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PHP165NQ08T_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 27 March 2009
12 of 13
PHP165NQ08T
NXP Semiconductors
N-channel TrenchMOS SiliconMAX standard level FET
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 27 March 2009
Document identifier: PHP165NQ08T_2
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