PHP212L [NXP]

Dual P-channel enhancement mode MOS transistor; 双P沟道增强型MOS晶体管


型号：	PHP212L
厂家：	NXP
描述：	Dual P-channel enhancement mode MOS transistor 双P沟道增强型MOS晶体管晶体小信号场效应晶体管开关光电二极管
文件：	总8页 (文件大小：65K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

DISCRETE SEMICONDUCTORS

DATA SHEET

PHP212L

Dual P-channel enhancement

mode MOS transistor

1997 Jun 20

Objective speciﬁcation

File under Discrete Semiconductors, SC13b

Philips Semiconductors

Objective speciﬁcation

Dual P-channel enhancement

mode MOS transistor

PHP212L

FEATURES

PINNING - SOT96-1 (SO8)

• High-speed switching

• No secondary breakdown

• Very low on-state resistance

• Low threshold.

SYMBOL

DESCRIPTION

s₁

g₁

s₂

g₂

d₂

d₁

source 1

gate 1

source 2

gate 2

APPLICATIONS

drain 2

drain 1

• Motor and actuator driver

• Power management

• Synchronized rectification.

DESCRIPTION

handbook, halfpage

Two P-channel enhancement mode MOS transistors in an

8-pin plastic SOT96-1 (SO8) package.

CAUTION

The device is supplied in an antistatic package.

The gate-source input must be protected against static

discharge during transport or handling.

MAM119

Fig.1 Simplified outline and symbol.

QUICK REFERENCE DATA

SYMBOL

V_DS

PARAMETER

CONDITIONS

MIN.

MAX.

−30

UNIT

drain-source voltage (DC)

source-drain diode forward voltage

gate-source voltage (DC)

gate-source threshold voltage

drain current (DC)

−

V_SD

V_GS

V_GSth

I_D

I_S= −1.25 A

−1.3

±12

−1.1

−4

Ω

I_D= −1 mA; V_DS= V_GS

T_s= 80 °C

−0.5

−

R_DSon

P_tot

drain-source on-state resistance

total power dissipation

I_D= −2 A; V_GS= −4.5 V

T_s= 80 °C

0.12

3.5

1997 Jun 20

Philips Semiconductors

Objective speciﬁcation

Dual P-channel enhancement

mode MOS transistor

PHP212L

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

Per P-channel

V_DS

V_GS

I_D

drain-source voltage (DC)

gate-source voltage (DC)

−

−30

±12

−4

drain current (DC)

peak drain current

total power dissipation

T_s= 80 °C; note 1

note 2

I_DM

P_tot

−16

3.5

T_s= 80 °C; note 3

°C

_amb= 25 °C; note 4

_amb= 25 °C; note 5

2.6

1.1

T_amb= 25 °C; note 6

1.5

T_stg

T_j

storage temperature

−55

+150

operating junction temperature

Source-drain diode

I_S

source current (DC)

peak pulsed source current

T_s= 80 °C

−

−2.6

−10

I_SM

note 2

Notes

1. T_sis the temperature at the soldering point of the drain lead.

2. Pulse width and duty cycle limited by maximum junction temperature.

3. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 3.5 W at the same time.

4. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R_{th a-tp}

(ambient to tie-point) of 27.5 K/W.

5. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R_{th a-tp}

(ambient to tie-point) of 90 K/W.

6. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with

an R_{th a-tp}(ambient to tie-point) of 90 K/W.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

VALUE

UNIT

R_{th j-s}

thermal resistance from junction to soldering point

K/W

1997 Jun 20

Philips Semiconductors

Objective speciﬁcation

Dual P-channel enhancement

mode MOS transistor

PHP212L

CHARACTERISTICS

T_j= 25 °C unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

Per P-channel

V_(BR)DSSdrain-source breakdown voltage

V_GS= 0; I_D= −10 µA

−30

−0.5

−

V_GSth

I_DSS

gate-source threshold voltage

drain-source leakage current

gate leakage current

V_GS= V_DS; I_D= −1 mA

V_GS= 0; V_DS= −24 V

V_GS= ±12 V; V_DS= 0

V_GS= −2.5 V; I_D= −1 A

−

−1.1

−100

±100

0.25

0.12

−

Ω

I_GSS

−

R_DSon

drain-source on-state resistance

−

_GS= −4.5 V; I_D= −2 A

−

Ω

C_iss

C_oss

C_rss

Q_G

input capacitance

V_GS= 0; V_DS= −24 V; f = 1 MHz

V_GS= −6 V; V_DD= −15 V; I_D= −1 A

−

450

200

100

output capacitance

reverse transfer capacitance

total gate charge

−

Q_GS

Q_GD

gate-source charge

gate-drain charge

−

Switching times

t_d(on)turn-on delay time

V_GS= 0 to −6 V; V_DD= −15 V;

I_D= −1 A; R_gen= 6 Ω

−

t_r

rise time

V_GS= 0 to −6 V; V_DD= −15 V;

I_D= −1 A; R_gen= 6 Ω

t_on

turn-on switching time

turn-off delay time

fall time

V_GS= 0 to −6 V; V_DD= −15 V;

I_D= −1 A; R_gen= 6 Ω

t_d(off)

t_f

V_GS= −6 to 0 V; V_DD= −15 V;

I_D= −1 A; R_gen= 6 Ω

V_GS= −6 to 0 V; V_DD= −15 V;

I_D= −1 A; R_gen= 6 Ω

t_off

turn-off switching time

V_GS= −6 to 0 V; V_DD= −15 V;

I_D= −1 A; R_gen= 6 Ω

Source-drain diode

V_SDsource-drain diode forward

V_GD= 0; I_S= −1.25 A

−

−1.3

voltage

t_rr

reverse recovery time

I_S= −1.25 A; di/dt = 100 A/µs

−

1997 Jun 20

Philips Semiconductors

Objective speciﬁcation

Dual P-channel enhancement

mode MOS transistor

PHP212L

PACKAGE OUTLINE

SO8: plastic small outline package; 8 leads; body width 3.9 mm

SOT96-1

(A )

pin 1 index

detail X

2.5

5 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

(1)

(2)

UNIT

max.

0.25

0.10

1.45

1.25

0.49

0.36

0.25

0.19

5.0

4.8

4.0

3.8

6.2

5.8

1.0

0.4

0.7

0.6

0.7

0.3

1.27

0.050

1.05

0.041

1.75

0.25

0.01

0.25

0.01

0.25

0.1

8^o

0^o

0.010 0.057

0.004 0.049

0.019 0.0100 0.20

0.014 0.0075 0.19

0.16

0.15

0.244

0.228

0.039 0.028

0.016 0.024

0.028

0.012

inches 0.069

0.01 0.004

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

EIAJ

95-02-04

97-05-22

SOT96-1

076E03S

MS-012AA

1997 Jun 20

Philips Semiconductors

Objective speciﬁcation

Dual P-channel enhancement

mode MOS transistor

PHP212L

DEFINITIONS

Data Sheet Status

Objective speciﬁcation

Preliminary speciﬁcation

Product speciﬁcation

This data sheet contains target or goal speciﬁcations for product development.

This data sheet contains preliminary data; supplementary data may be published later.

This data sheet contains ﬁnal product speciﬁcations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or

more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation

of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation

is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these

products can reasonably be expected to result in personal injury. Philips customers using or selling these products for

use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such

improper use or sale.

1997 Jun 20

Philips Semiconductors

Objective speciﬁcation

Dual P-channel enhancement

mode MOS transistor

PHP212L

NOTES

1997 Jun 20

Philips Semiconductors – a worldwide company

Argentina: see South America

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. +31 40 27 82785, Fax. +31 40 27 88399

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220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773

Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,

Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474

Belgium: see The Netherlands

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Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,

Tel. +48 22 612 2831, Fax. +48 22 612 2327

Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,

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Portugal: see Spain

Romania: see Italy

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,

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Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,

TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874

Indonesia: see Singapore

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Middle East: see Italy

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,

Internet: http://www.semiconductors.philips.com

Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

SCA54

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

137107/00/01/pp8

Date of release: 1997 Jun 20

Document order number: 9397 750 02354

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