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PHP3055E,127 [NXP]

N-channel TrenchMOS standard level FET TO-220 3-Pin;
PHP3055E,127
型号： PHP3055E,127
厂家： NXP    NXP
描述：

N-channel TrenchMOS standard level FET TO-220 3-Pin

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PHP/PHD3055E  
TrenchMOS™ standard level FET  
Rev. 06 — 25 March 2002  
Product data  
1. Description  
N-channel standard level field-effect power transistor in a plastic package using  
TrenchMOS™1 technology.  
Product availability:  
PHP3055E in SOT78 (TO-220AB)  
PHD3055E in SOT428 (D-PAK).  
2. Features  
■ Fast switching  
■ Low on-state resistance.  
3. Applications  
■ DC to DC converters  
■ Switch mode power supplies.  
4. Pinning information  
Table 1: Pinning - SOT78, SOT428 simplified outline and symbol  
Pin Description  
Simplified outline  
Symbol  
1
2
3
gate (g)  
d
s
mb  
mb  
[1]  
drain (d)  
source (s)  
g
mb mounting base,  
connected to drain (d)  
MBB076  
2
1
3
Top view  
MBK091  
MBK106  
1
2 3  
SOT78 (TO-220AB)  
SOT428 (D-PAK)  
[1] It is not possible to make connection to pin 2 of the SOT428 package.  
1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.  
 
 
 
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
5. Quick reference data  
Table 2: Quick reference data  
Symbol Parameter  
Conditions  
Typ  
Max  
60  
Unit  
V
VDS  
ID  
drain-source voltage (DC)  
drain current (DC)  
25 °C ≤ Tj ≤ 175 °C  
Tmb = 25 °C; VGS = 5 V  
Tmb = 25 °C  
-
-
10.3  
33  
A
Ptot  
Tj  
total power dissipation  
junction temperature  
-
W
-
175  
150  
°C  
mΩ  
RDSon  
drain-source on-state resistance  
Tj = 25 °C; VGS = 10 V; ID = 5.5 A  
120  
6. Limiting values  
Table 3: Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
60  
Unit  
V
VDS  
VDGR  
VGS  
ID  
drain-source voltage (DC)  
25 °C ≤ Tj ≤ 175 °C  
-
drain-gate voltage (DC)  
gate-source voltage (DC)  
drain current (DC)  
25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ  
-
60  
V
-
±20  
10.3  
7.3  
V
Tmb = 25 °C; VGS = 10 V; Figure 2 and 3  
Tmb = 100 °C; VGS = 10 V; Figure 2  
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3  
Tmb = 25 °C; Figure 1  
-
A
-
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
-
41  
A
total power dissipation  
storage temperature  
-
33  
W
°C  
°C  
−55  
−55  
+175  
+175  
operating junction temperature  
Source-drain diode  
IS  
source (diode forward) current (DC) Tmb = 25 °C  
-
-
10.3  
41  
A
A
ISM  
peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs  
Avalanche ruggedness  
EDS(AL)S non-repetitive drain-source  
avalanche energy  
unclamped inductive load; ID = 3.3 A;  
tAL = 0.22 ms; VDD ≤ 25 V; RGS = 50 Ω;  
VGS = 10 V; starting Tj = 25 °C  
-
-
25  
mJ  
A
IDS(AL)S non-repetitive avalanche current  
unclamped inductive load; VDD ≤ 25 V;  
RGS = 50 Ω; VGS = 10 V; Figure 4  
10.3  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
2 of 14  
 
 
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
03aa16  
03aa24  
120  
120  
der  
P
I
der  
(%)  
(%)  
80  
40  
0
80  
40  
0
0
50  
100  
150  
200  
(oC)  
0
50  
100  
150  
200  
(oC)  
T
mb  
T
mb  
Ptot  
ID  
Pder  
=
× 100%  
Ider  
=
× 100%  
----------------------  
------------------  
P
I
°
°
tot(25 C)  
D(25 C)  
Fig 1. Normalized total power dissipation as a  
function of mounting base temperature.  
Fig 2. Normalized continuous drain current as a  
function of mounting base temperature.  
2
10  
Limit R  
= V  
/ I  
DS D  
DS(on)  
I
D
(A)  
10  
t
= 10 µs  
p
100 µs  
DC  
1
1 ms  
10 ms  
-1  
10  
2
10  
1
10  
V
(V)  
DS  
Tmb = 25 °C; IDM is single pulse.  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
3 of 14  
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
2
10  
I
DS(AL)S  
(A)  
10  
25 ºC  
1
T prior to avalanche = 150 ºC  
j
-1  
10  
-3  
-2  
10  
-1  
10  
10  
1
10  
t
(ms)  
AL  
Unclamped inductive load; VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; starting Tj = 25 °C and 150 °C.  
Fig 4. Non-repetitive avalanche ruggedness current as a function of pulse duration.  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
4 of 14  
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
7. Thermal characteristics  
Table 4: Thermal characteristics  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
Rth(j-mb) thermal resistance from junction to mounting base Figure 5  
-
-
-
-
4.5 K/W  
Rth(j-a)  
thermal resistance from junction to ambient  
SOT78 package; vertical in still air  
60  
75  
-
-
K/W  
K/W  
SOT428 package;  
SOT428 minimum footprint;  
mounted on a PCB  
SOT428 packages;  
-
50  
-
K/W  
SOT404 minimum footprint;  
mounted on a PCB  
7.1 Transient thermal impedance  
10  
Z
th(j-mb)  
(K/W)  
δ = 0.5  
1
0.2  
0.1  
t
p
P
δ =  
T
0.05  
0.02  
t
t
p
T
single pulse  
10  
-1  
10  
-6  
-5  
-4  
10  
-3  
10  
-2  
10  
-1  
10  
10  
1
t
(s)  
p
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration.  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
5 of 14  
 
 
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
8. Characteristics  
Table 5: Characteristics  
Tj = 25 °C unless otherwise specified  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
Static characteristics  
V(BR)DSS drain-source breakdown voltage  
ID = 0.25 mA; VGS = 0 V  
Tj = 25 °C  
60  
55  
-
-
-
-
V
V
Tj = −55 °C  
VGS(th)  
gate-source threshold voltage  
drain-source leakage current  
ID = 1 mA; VDS = VGS; Figure 10  
Tj = 25 °C  
2
1
-
3
-
4
-
V
V
V
Tj = 175 °C  
Tj = −55 °C  
-
6
IDSS  
VDS = 55 V; VGS = 0 V  
Tj = 25 °C  
-
-
-
0.05 10  
µA  
Tj = 175 °C  
-
500 µA  
IGSS  
gate-source leakage current  
VGS = ±10 V; VDS = 0 V  
VGS = 10 V; ID = 5.5 A; Figure 8 and 9  
Tj = 25 °C  
10  
100 nA  
RDSon  
drain-source on-state resistance  
-
-
120 150 mΩ  
250 315 mΩ  
Tj = 175 °C  
Dynamic characteristics  
Qg(tot)  
Qgs  
Qgd  
Ciss  
Coss  
Crss  
td(on)  
tr  
total gate charge  
gate-source charge  
gate-drain (Miller) charge  
input capacitance  
output capacitance  
reverse transfer capacitance  
turn-on delay time  
rise time  
ID = 10 A; VDD = 44 V; VGS = 10 V; Figure 14  
VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12  
-
-
-
-
-
-
-
-
-
-
5.8  
1.5  
3.2  
-
-
-
nC  
nC  
nC  
190 250 pF  
55  
40  
3
80  
50  
10  
35  
15  
20  
pF  
pF  
ns  
ns  
ns  
ns  
VDD = 30 V; RL = 2.7 Ω; VGS = 10 V;  
RG = 5.6 Ω; resistive load  
26  
8
td(off)  
tf  
turn-off delay time  
fall time  
10  
Source-drain diode  
VSD  
trr  
source-drain (diode forward) voltage IS = 10 A; VGS = 0 V; Figure 13  
-
-
-
1.1  
32  
50  
1.5  
V
reverse recovery time  
recovered charge  
IS = 10 A; dIS/dt = −100 A/µs; VGS = 0 V  
-
-
ns  
nC  
Qr  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
6 of 14  
 
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
10  
10  
D
10 V 8 V  
I
I
T = 25 C  
j
D
V
> I x R  
DSon  
DS  
D
7 V  
(A)  
(A)  
8
8
6.5 V  
6
4
2
0
6
4
2
0
6 V  
5.5 V  
5 V  
175 ºC  
T = 25 ºC  
j
V
= 4.5 V  
GS  
0
0.4  
0.8  
1.2  
1.6  
2
(V)  
0
2
4
6
8
V
(V)  
V
GS  
DS  
Tj = 25 °C  
Tj = 25 °C and 175 °C; VDS > ID x RDSon  
Fig 6. Output characteristics: drain current as a  
function of drain-source voltage; typical values.  
Fig 7. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values.  
0.5  
2.4  
a
5.5V  
R
V
= 5 V  
T = 25 ºC  
j
DSon  
(Ω)  
GS  
0.4  
6 V  
1.8  
0.3  
0.2  
0.1  
0
6.5 V  
1.2  
0.6  
0
7 V  
8 V  
10 V  
-60  
0
60  
120  
180  
0
2
4
6
8
10  
T (oC)  
I
(A)  
D
j
Tj = 25 °C  
RDSon  
a =  
---------------------------  
RDSon(25 C)  
°
Fig 8. Drain-source on-state resistance as a function  
of drain current; typical values.  
Fig 9. Normalized drain-source on-state resistance  
factor as a function of junction temperature.  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
7 of 14  
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
03aa32  
03aa35  
-1  
-2  
-3  
-4  
-5  
-6  
5
10  
D
I
V
GS(th)  
(A)  
10  
(V)  
4
3
2
1
0
max  
typ  
min  
typ  
max  
10  
10  
10  
10  
min  
-60  
0
60  
120  
180  
0
2
4
6
T (oC)  
V
GS  
(V)  
j
ID = 1 mA; VDS = VGS  
Tj = 25 °C; VDS = 5 V  
Fig 10. Gate-source threshold voltage as a function of  
junction temperature.  
Fig 11. Sub-threshold drain current as a function of  
gate-source voltage.  
3
10  
C
(pF)  
C
iss  
2
10  
C
oss  
C
rss  
10  
-1  
2
10  
1
10  
10  
V
(V)  
DS  
VGS = 0 V; f = 1 MHz  
Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
8 of 14  
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
10  
I
15  
V
S
V
= 0 V  
GS  
(V)  
12  
I
= 10 A  
GS  
D
(A)  
T = 25 ºC  
8
j
V
= 11 V  
44 V  
DD  
9
6
3
0
6
4
2
0
175 ºC  
T = 25 ºC  
j
0
2
4
6
8
0
0.4  
0.8  
1.2  
V
(V)  
Q
(nC)  
G
SD  
Tj = 25 °C and 175 °C; VGS = 0 V  
ID = 10 A; VDD = 11 V and 44 V  
Fig 13. Source (diode forward) current as a function of  
source-drain (diode forward) voltage; typical  
values.  
Fig 14. Gate-source voltage as a function of gate  
charge; typical values.  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
9 of 14  
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
9. Package outline  
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB  
SOT78  
E
p
A
A
1
q
mounting  
base  
D
1
D
(1)  
L
L
2
1
Q
b
1
L
1
2
3
b
c
e
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
b
L
max.  
(1)  
2
e
A
b
D
E
L
D
L
1
A
c
UNIT  
p
q
Q
1
1
1
4.5  
4.1  
1.39  
1.27  
0.9  
0.7  
1.3  
1.0  
0.7  
0.4  
15.8  
15.2  
6.4  
5.9  
10.3  
9.7  
15.0  
13.5  
3.30  
2.79  
3.8  
3.6  
3.0  
2.7  
2.6  
2.2  
mm  
3.0  
2.54  
Note  
1. Terminals in this zone are not tinned.  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
SC-46  
00-09-07  
01-02-16  
SOT78  
3-lead TO-220AB  
Fig 15. SOT78 (TO-220AB).  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
10 of 14  
 
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads  
(one lead cropped)  
SOT428  
seating plane  
y
A
A
E
A
2
A
b
E
1
1
2
mounting  
base  
D
1
D
H
E
L
2
2
L
1
L
1
3
b
b
w
M
A
c
1
e
e
1
0
10  
20 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
D
L
y
1
1
A
A
A
b
D
E
E
H
UNIT  
b
b
c
e
e
1
L
L
w
2
1
2
1
E
1
2
max.  
min.  
min.  
0.65  
0.45  
0.89  
0.71  
0.9  
0.5  
2.38  
2.22  
0.93  
0.73  
1.1  
0.9  
5.46  
5.26  
0.4 6.22  
0.2 5.98  
6.73  
6.47  
10.4 2.95  
9.6  
2.55  
4.81  
4.45  
mm  
4.57  
0.2  
0.2  
4.0  
2.285  
0.5  
Note  
1. Measured from heatsink back to lead.  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
JEITA  
99-09-13  
01-12-11  
SOT428  
TO-252  
SC-63  
Fig 16. SOT428 (D-PAK).  
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
11 of 14  
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
10. Revision history  
Table 6: Revision history  
Rev Date  
CPCN  
-
Description  
06 20020325  
Product data; sixth version; supersedes PHD_PHP3055E_5 of 1 August 1999.  
Modifications:  
The format of this specification has been redesigned to comply with Philips  
Semiconductors’ new presentation and information standard  
•
9397 750 09354  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
Product data  
Rev. 06 — 25 March 2002  
12 of 14  
 
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
11. Data sheet status  
[1]  
[2]  
Data sheet status  
Product status  
Definition  
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips Semiconductors  
reserves the right to change the specification in any manner without notice.  
Preliminary data  
Product data  
Qualification  
Production  
This data sheet contains data from the preliminary specification. Supplementary data will be published at a  
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to  
improve the design and supply the best possible product.  
This data sheet contains data from the product specification. Philips Semiconductors reserves the right to  
make changes at any time in order to improve the design, manufacturing and supply. Changes will be  
communicated according to the Customer Product/Process Change Notification (CPCN) procedure  
SNW-SQ-650A.  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
12. Definitions  
13. Disclaimers  
Short-form specification — The data in  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
a
short-form specification is  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition — Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes, without notice, in the products, including circuits, standard  
cells, and/or software, described or contained herein in order to improve  
design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
licence or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Application information — Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
Contact information  
For additional information, please visit http://www.semiconductors.philips.com.  
For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.  
13 of 14  
9397 750 09354  
Product data  
Rev. 06 — 25 March 2002  
 
 
 
PHP3055E series  
TrenchMOS™ standard level FET  
Philips Semiconductors  
Contents  
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics. . . . . . . . . . . . . . . . . . . 5  
Transient thermal impedance . . . . . . . . . . . . . . 5  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 13  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
2
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© Koninklijke Philips Electronics N.V. 2002.  
Printed in The Netherlands  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or  
contract, is believed to be accurate and reliable and may be changed without notice. No  
liability will be accepted by the publisher for any consequence of its use. Publication  
thereof does not convey nor imply any license under patent- or other industrial or  
intellectual property rights.  
Date of release: 25 March 2002  
Document order number: 9397 750 09354  

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