PMBFJ112 [NXP]

N-channel junction FETs; N沟道FET的结
PMBFJ112
型号: PMBFJ112
厂家: NXP    NXP
描述:

N-channel junction FETs
N沟道FET的结

晶体 小信号场效应晶体管
文件: 总6页 (文件大小:40K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DISCRETE SEMICONDUCTORS  
DATA SHEET  
PMBFJ111;  
PMBFJ112; PMBFJ113  
N-channel junction FETs  
April 1995  
Product specification  
File under Discrete Semiconductors, SC07  
Philips Semiconductors  
Product specification  
PMBFJ111;  
PMBFJ112; PMBFJ113  
N-channel junction FETs  
FEATURES  
High-speed switching  
Interchangeability of drain and  
source connections  
3
handbook, halfpage  
Low RDSon at zero gate voltage  
( < 30 for PMBFJ111).  
d
g
s
DESCRIPTION  
1
2
Symmetrical N-channel junction  
FETs in a surface mount SOT23  
envelope. Intended for use in  
Top view  
MAM385  
applications such as analog switches,  
choppers, commutators, multiplexers  
and thin and thick film hybrids.  
Fig.1 Simplified outline and symbol.  
PINNING - SOT23  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
PIN  
1
DESCRIPTION  
drain  
SYMBOL  
PARAMETER  
drain-source voltage  
gate-source voltage  
drain-drain voltage  
CONDITIONS MIN. MAX. UNIT  
2
source  
gate  
VDS  
VGSO  
VGDO  
IG  
±40  
40  
40  
50  
V
3
V
Note  
V
1. Drain and source are  
interchangeable.  
forward gate current  
(DC)  
mA  
Ptot  
total power dissipation  
Tamb = 25 °C;  
300  
mW  
note 1  
Tstg  
Tj  
storage temperature  
65  
150  
150  
°C  
°C  
operating junction  
temperature  
April 1995  
2
Philips Semiconductors  
Product specification  
PMBFJ111;  
PMBFJ112; PMBFJ113  
N-channel junction FETs  
THERMAL CHARACTERISTICS  
Tj =P(Rth j-t + Rth ts + Rth s-a) + Tamb  
SYMBOL  
Rth j-a  
PARAMETER  
MAX.  
430  
500  
UNIT  
K/W  
K/W  
from junction to ambient (note 1)  
from junction to ambient (note 2)  
Rth j-a  
Notes  
1. Mounted on a ceramic substrate, 8 mm × 10 mm × 0.7 mm.  
2. Mounted on printed circuit board.  
STATIC CHARACTERISTICS  
Tj = 25 °C.  
SYMBOL  
IGSS  
PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
1 nA  
reverse gate current  
drain current  
PMBFJ111  
VGS = 15 V; VDS = 0  
IDSS  
VGS = 0; VDS = 15 V  
20  
5
mA  
PMBFJ112  
PMBFJ113  
2
V(BR)GSS  
VGS(off)  
gate-source breakdown voltage IG = 1 µA; VDS = 0  
40  
V  
gate-source cut-off voltage  
PMBFJ111  
ID = 1 µA; VDS = 5 V  
3
1
10 V  
PMBFJ112  
5
3
PMBFJ113  
0.5  
RDS(on)  
drain-source on-resistance  
PMBFJ111  
VGS = 0 V; VDS = 0.1 V  
30 Ω  
PMBFJ112  
50  
PMBFJ113  
100  
April 1995  
3
Philips Semiconductors  
Product specification  
PMBFJ111;  
PMBFJ112; PMBFJ113  
N-channel junction FETs  
DYNAMIC CHARACTERISTICS  
Tj = 25 °C.  
SYMBOL  
Ciss  
PARAMETER  
CONDITIONS  
VDS = 0  
TYP.  
MAX.  
UNIT  
pF  
input capacitance  
6
VGS = 10 V  
f = 1 MHz  
VDS = 0  
22  
3
28  
pF  
pF  
VGS = 0  
f = 1 MHz  
Tamb = 25 °C  
Crss  
feedback capacitance  
VDS = 0  
VGS = 10 V  
f = 1 MHz  
Switching times (see Fig.2)  
tr  
rise time  
note 1  
note 1  
note 1  
note 1  
6
13  
15  
35  
ns  
ns  
ns  
ns  
ton  
tf  
turn-on time  
fall time  
toff  
turn-off time  
Notes  
1. Test conditions for switching times are as follows:  
DD = 10 V, VGS = 0 to VGS(off) (all types);  
V
VGS(off) = 12 V, RL = 750 (PMBFJ111);  
VGS(off) = 7 V, RL = 1550 (PMBFJ112);  
VGS(off) = 5 V, RL = 3150 (PMBFJ113).  
V
V
= 0 V  
GS  
10%  
90%  
1 µF  
ok, halfpage  
50 Ω  
10 µF  
i
V
DD  
10 nF  
R
V  
L
GS off  
t
t
on  
off  
SAMPLING  
SCOPE  
50 Ω  
t
t
t
t
r
s
f
d
DUT  
90%  
10%  
50 Ω  
V
o
MBK289  
MBK294  
Fig.2 Switching circuit.  
Fig.3 Input and output waveforms.  
April 1995  
4
Philips Semiconductors  
Product specification  
PMBFJ111;  
PMBFJ112; PMBFJ113  
N-channel junction FETs  
PACKAGE OUTLINE  
Plastic surface mounted package; 3 leads  
SOT23  
D
B
E
A
X
H
v
M
A
E
3
Q
A
A
1
c
1
2
e
1
b
p
w M  
B
L
p
e
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
1
UNIT  
b
c
D
E
e
e
H
L
Q
v
w
A
p
p
1
E
max.  
1.1  
0.9  
0.48  
0.38  
0.15  
0.09  
3.0  
2.8  
1.4  
1.2  
2.5  
2.1  
0.45  
0.15  
0.55  
0.45  
mm  
0.1  
1.9  
0.95  
0.2  
0.1  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
97-02-28  
SOT23  
April 1995  
5
Philips Semiconductors  
Product specification  
PMBFJ111;  
PMBFJ112; PMBFJ113  
N-channel junction FETs  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
Short-form specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
The data in this specification is extracted from a full data sheet with the same type  
number and title. For detailed information see the relevant data sheet or data handbook.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
April 1995  
6

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