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PMF370XN,115 [NXP]

PMF370XN - N-channel TrenchMOS extremely low level FET SC-70 3-Pin;
PMF370XN,115
型号： PMF370XN,115
厂家： NXP    NXP
描述：

PMF370XN - N-channel TrenchMOS extremely low level FET SC-70 3-Pin

开关 光电二极管 晶体管
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PMF370XN  
N-channel TrenchMOS extremely low level FET  
Rev. 03 — 20 June 2008  
Product data sheet  
1. Product profile  
1.1 General description  
Extremely low level N-channel enhancement mode Field-Effect Transistor (FET) in a  
plastic package using TrenchMOS technology. This product is designed and qualified for  
use in computing, communications, consumer and industrial applications only.  
1.2 Features and benefits  
„ Low conduction losses due to low  
„ Low threshold voltage  
on-state resistance  
„ Saves PCB space due to small footprint „ Suitable for low gate drive sources  
(40 % smaller than SOT23)  
„ Surface-mounted package  
1.3 Applications  
„ Driver circuits  
„ Switching in portable appliances  
1.4 Quick reference data  
Table 1.  
Quick reference  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
VDS  
ID  
drain-source voltage  
drain current  
Tj ≥ 25 °C; Tj ≤ 150 °C  
-
-
-
-
30  
V
A
Tsp = 25 °C; VGS = 4.5 V;  
0.87  
see Figure 1 and 3  
Ptot  
total power dissipation Tsp = 25 °C; see Figure 2  
-
-
-
0.56  
W
Static characteristics  
RDSon drain-source on-state  
resistance  
VGS = 4.5 V; ID = 0.2 A;  
Tj = 25 °C; see Figure 9 and  
10  
370 440 mΩ  
 
 
 
 
 
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
2. Pinning information  
Table 2.  
Pinning  
Pin  
1
Symbol Description  
Simplified outline  
Graphic symbol  
G
S
D
gate  
D
3
2
source  
drain  
3
G
1
2
mbb076  
S
SOT323 (SC-70)  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
plastic surface-mounted package; 3 leads  
Version  
PMF370XN  
SC-70  
SOT323  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol Parameter  
Conditions  
Min  
Max  
30  
Unit  
V
VDS  
VDGR  
VGS  
ID  
drain-source voltage  
Tj ≥ 25 °C; Tj ≤ 150 °C  
Tj ≤ 150 °C; Tj ≥ 25 °C; RGS = 20 kΩ  
-
drain-gate voltage  
gate-source voltage  
drain current  
-
30  
V
-12  
12  
V
Tsp = 25 °C; VGS = 4.5 V; see Figure 1 and 3  
Tsp = 100 °C; VGS = 4.5 V; see Figure 1  
Tsp = 25 °C; tp ≤ 10 μs; pulsed; see Figure 3  
Tsp = 25 °C; see Figure 2  
-
0.87  
0.55  
1.74  
0.56  
150  
150  
A
-
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
-
A
total power dissipation  
storage temperature  
junction temperature  
-
W
°C  
°C  
-55  
-55  
Source-drain diode  
IS  
source current  
peak source current  
Tsp = 25 °C  
-
-
0.47  
0.94  
A
A
ISM  
Tsp = 25 °C; tp ≤ 10 μs; pulsed  
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
2 of 12  
 
 
 
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
03aa25  
03aa17  
120  
120  
I
P
der  
der  
(%)  
(%)  
80  
80  
40  
40  
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
sp  
(°C)  
T
sp  
(°C)  
I
P
tot  
D
I
=
× 100 %  
P
=
der  
× 100 %  
der  
I
P
tot 25°C  
(
)
(
)
D 25°C  
Fig 1. Normalized continuous drain current as a  
function of solder point temperature  
Fig 2. Normalized total power dissipation as a  
function of solder point temperature  
03an15  
10  
ID  
(A)  
Limit RDSon = VDS / ID  
tp = 10 μs  
1
100 μs  
1 ms  
10-1  
DC  
10 ms  
100 ms  
10-2  
10-1  
1
10  
102  
VDS (V)  
T
= 25°C; I  
is single pulse;V = 4.5V  
s p  
DM GS  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
3 of 12  
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-sp)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance  
from junction to solder  
point  
see Figure 4  
-
-
220  
K/W  
03an27  
103  
Zth(j-sp)  
(K/W)  
δ = 0.5  
102  
10  
1
0.2  
0.1  
0.05  
tp  
T
0.02  
P
δ =  
single pulse  
t
tp  
T
10-4  
10-3  
10-2  
10-1  
1
10  
tp (s)  
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS drain-source  
breakdown voltage  
ID = 1 μA; VGS = 0 V; Tj = -55 °C  
ID = 1 μA; VGS = 0 V; Tj = 25 °C  
27  
30  
-
-
-
-
-
V
V
V
-
VGS(th)  
gate-source threshold ID = 0.25 mA; VDS = VGS  
;
1.8  
voltage Tj = -55 °C; see Figure 7  
ID = 0.25 mA; VDS = VGS  
Tj = 150 °C; see Figure 7 and 8  
;
0.35  
0.5  
-
-
V
V
ID = 0.25 mA; VDS = VGS  
;
1
1.5  
Tj = 25 °C; see Figure 7 and 8  
IDSS  
drain leakage current VDS = 30 V; VGS = 0 V; Tj = 25 °C  
VDS = 30 V; VGS = 0 V; Tj = 70 °C  
-
-
-
-
-
-
1
μA  
μA  
μA  
2
VDS = 30 V; VGS = 0 V;  
10  
Tj = 150 °C  
IGSS  
gate leakage current VGS = 12 V; VDS = 0 V; Tj = 25 °C  
-
-
10  
10  
100  
100  
nA  
nA  
VGS = -12 V; VDS = 0 V;  
Tj = 25 °C  
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
4 of 12  
 
 
 
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
Table 6.  
Symbol  
RDSon  
Characteristics …continued  
Parameter Conditions  
drain-source on-state VGS = 2.5 V; ID = 0.1 A;  
resistance Tj = 25 °C; see Figure 9 and 10  
GS = 4.5 V; ID = 0.2 A;  
Min  
Typ  
Max  
Unit  
-
550  
650  
mΩ  
V
-
-
629  
370  
748  
440  
mΩ  
mΩ  
Tj = 150 °C; see Figure 10  
VGS = 4.5 V; ID = 0.2 A;  
Tj = 25 °C; see Figure 9 and 10  
Dynamic characteristics  
QG(tot)  
QGS  
QGD  
Ciss  
total gate charge  
ID = 1 A; VDS = 15 V;  
VGS = 4.5 V; Tj = 25 °C;  
see Figure 11 and 12  
-
-
-
-
-
-
0.65  
0.14  
0.18  
37  
-
-
-
-
-
-
nC  
nC  
nC  
pF  
pF  
pF  
gate-source charge  
gate-drain charge  
input capacitance  
output capacitance  
VDS = 25 V; VGS = 0 V;  
f = 1 MHz; Tj = 25 °C;  
see Figure 13  
Coss  
Crss  
8.5  
reverse transfer  
capacitance  
5.5  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
RG(ext) = 6 Ω; RL = 15 Ω;  
VDS = 15 V; VGS = 4.5 V;  
Tj = 25 °C  
-
-
-
-
6.5  
9.5  
14  
-
-
-
-
ns  
ns  
ns  
ns  
turn-off delay time  
fall time  
5.5  
Source-drain diode  
VSD source-drain voltage  
IS = 0.3 A; VGS = 0 V; Tj = 25 °C;  
-
0.81  
1.2  
V
see Figure 14  
03ao00  
03ao02  
2.5  
2.5  
V
GS  
(V) = 4.5  
3.5  
I
D
I
D
(A)  
(X)  
25 °C  
Tj = 150 °C  
2
2
3
1.5  
1
1.5  
1
2.5  
2
0.5  
0
0.5  
0
1.8  
0
0.5  
1
1.5  
2
0
1
2
3
4
5
V
DS  
(V)  
V
GS  
(V)  
T = 25°C  
T = 25°C and 150°C;V > I × R  
j DS D DSon  
j
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
Fig 6. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
5 of 12  
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
03al82  
03an65  
−3  
2
10  
V
GS (th)  
(V)  
I
D
(A)  
1.5  
max  
typ  
−4  
−5  
−6  
10  
10  
10  
1
min  
typ  
max  
min  
0.5  
0
−60  
0
60  
120  
180  
0
0.4  
0.8  
1.2  
1.6  
T (°C)  
j
V
(V)  
GS  
I
= 0.25A;V = V  
T = 25°C;V = 5V  
j DS  
D
DS  
GS  
Fig 7. Gate-source threshold voltage as a function of  
junction temperature  
Fig 8. Subthreshold drain current as a function of  
gate-source voltage  
03ao01  
03al00  
1
1.8  
V
GS  
(V) = 2.5  
3
R
DSon  
(Ω)  
a
0.8  
0.6  
0.4  
0.2  
0
3.5  
4.5  
1.2  
0.6  
0
−60  
0
0.5  
1
1.5  
2
2.5  
0
60  
120  
180  
I
(A)  
T (°C)  
j
D
R
DSon  
T = 25°C  
j
a =  
R
(
)
DSon 25°C  
Fig 9. Drain-source on-state resistance as a function  
of drain current; typical values  
Fig 10. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
6 of 12  
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
03ao05  
5
V
GS  
(V)  
I
= 1 A  
D
T = 25 °C  
j
4
3
2
1
0
V
= 15 V  
V
DS  
DS  
I
D
V
GS(pl)  
V
GS(th)  
V
GS  
Q
Q
GS1  
GS2  
Q
Q
GD  
GS  
Q
G(tot)  
0
0.2  
0.4  
0.6  
0.8  
Q
G
(nC)  
003aaa508  
I
= 1A;V = 15V  
DS  
D
Fig 11. Gate charge waveform definitions  
Fig 12. Gate-source voltage as a function of gate  
charge; typical values  
03ao04  
03ao03  
2
10  
1
V
GS  
= 0 V  
I
S
(A)  
0.8  
C
C
iss  
(pF)  
0.6  
0.4  
0.2  
0
10  
C
C
oss  
rss  
150 °C  
T = 25 °C  
j
1
10  
−1  
2
1
10  
10  
0
0.2  
0.4  
0.6  
0.8  
1
V
DS  
(V)  
V
SD  
(V)  
V
= 0V; f = 1MHz  
T = 25°C and 150°C;V = 0V  
j GS  
GS  
Fig 13. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
Fig 14. Source current as a function of source-drain  
voltage; typical values  
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
7 of 12  
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
7. Package outline  
Plastic surface-mounted package; 3 leads  
SOT323  
D
B
E
A
X
H
y
v M  
A
E
3
Q
A
A
1
c
1
2
L
p
e
b
w
M B  
1
p
e
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
1
A
UNIT  
b
c
D
E
e
e
H
E
L
Q
v
w
p
p
1
max  
1.1  
0.8  
0.4  
0.3  
0.25  
0.10  
2.2  
1.8  
1.35  
1.15  
2.2  
2.0  
0.45  
0.15  
0.23  
0.13  
mm  
0.1  
1.3  
0.65  
0.2  
0.2  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
04-11-04  
06-03-16  
SOT323  
SC-70  
Fig 15. Package outline SOT323 (SC-70)  
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
8 of 12  
 
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
8. Soldering  
2.65  
1.85  
1.325  
solder lands  
solder resist  
2
3
0.6  
2.35  
solder paste  
occupied area  
1.3  
(3×)  
0.5  
(3×)  
1
Dimensions in mm  
0.55  
(3×)  
sot323_fr  
Fig 16. SOT323 (SC-70)  
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
9 of 12  
 
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
9. Revision history  
Table 7.  
Revision history  
Document ID  
PMF370XN_3  
Modifications:  
Release date  
Data sheet status  
Change notice  
Supersedes  
20080620  
Product data sheet  
-
PMF370XN_2  
• The format of this data sheet has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
• Legal texts have been adapted to the new company name where appropriate  
PMF370XN_2  
PMF370XN-01  
20051206  
Product data sheet  
-
PMF370XN-01  
20040211  
Product data sheet  
-
-
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
10 of 12  
 
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
10. Legal information  
10.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
10.2 Definitions  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
10.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
10.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
TrenchMOS — is a trademark of NXP B.V.  
11. Contact information  
For additional information, please visit: http://www.nxp.com  
For sales office addresses, send an email to: salesaddresses@nxp.com  
PMF370XN_3  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 03 — 20 June 2008  
11 of 12  
 
 
 
 
 
 
PMF370XN  
NXP Semiconductors  
N-channel TrenchMOS extremely low level FET  
12. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits. . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . 1  
2
3
4
5
6
7
8
9
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics . . . . . . . . . . . . . . . . . . 4  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10  
10  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
10.1  
10.2  
10.3  
10.4  
11  
12  
Contact information. . . . . . . . . . . . . . . . . . . . . 11  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2008.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 20 June 2008  
Document identifier: PMF370XN_3  
 

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