PMWD20XN [NXP]
Dual N-channel UTrenchMOS extremely low level FET; 双N沟道UTrenchMOS极低水平FET
| 型号： | PMWD20XN |
| 厂家： | 
NXP |
| 描述： | Dual N-channel UTrenchMOS extremely low level FET |
| 文件： | 总12页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PMWD20XN
Dual N-channel µTrenchMOS™ extremely low level FET
Rev. 02 — 26 April 2005
Product data sheet
1. Product profile
1.1 General description
Dual common drain N-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package using TrenchMOS™ technology.
1.2 Features
■ Surface-mounted package
■ Extremely low threshold voltage
■ Low profile
■ Fast switching
1.3 Applications
■ Portable appliances
■ Battery management
1.4 Quick reference data
■ VDS ≤ 20 V
■ Ptot ≤ 4.2 W
■ ID ≤ 10.4 A
■ RDSon ≤ 24 mΩ
2. Pinning information
Table 1:
Pin
1, 8
2, 3
4
Pinning
Description
drain (D)
Simplified outline
Symbol
8
5
D
D
source1 (S1)
gate1 (G1)
gate2 (G2)
source2 (S2)
5
6, 7
G1
S1
G2
S2
mbl600
1
4
SOT530-1 (TSSOP8)
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
3. Ordering information
Table 2:
Ordering information
Type number
Package
Name
Description
plastic thin shrink small outline package; 8 leads; body width 4.4 mm
Version
PMWD20XN
TSSOP8
SOT530-1
4. Limiting values
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
V
VDS
VDGR
VGS
ID
drain-source voltage (DC)
25 °C ≤ Tj ≤ 150 °C
-
20
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ
-
20
V
-
±12
10.4
6.5
V
[1]
[1]
[1]
[1]
Tsp = 25 °C; VGS = 4.5 V; Figure 2 and 3
Tsp = 100 °C; VGS = 4.5 V; Figure 2
Tsp = 25 °C; pulsed; tp ≤ 10 µs; Figure 3
Tsp = 25 °C; Figure 1
-
A
-
A
IDM
Ptot
Tstg
Tj
peak drain current
-
41.7
4.2
A
total power dissipation
storage temperature
junction temperature
-
W
°C
°C
−55
−55
+150
+150
Source-drain diode
[1]
[1]
IS
source (diode forward) current (DC) Tsp = 25 °C
-
-
3.5
14
A
A
ISM
peak source (diode forward) current Tsp = 25 °C; pulsed; tp ≤ 10 µs
[1] Single device conducting.
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
2 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
03aa17
03aa25
120
120
Ider
Pder
(%)
(%)
80
40
0
80
40
0
0
50
100
150
200
0
50
100
150
200
Tsp ( C)
Tsp ( C)
°
°
V
GS ≥ 4.5 V
Ptot
Pder
=
× 100 %
------------------------
ID
P
°
tot(25 C)
Ider
=
× 100 %
--------------------
I
°
D(25 C)
Fig 1. Normalized total power dissipation as a
function of solder point temperature
Fig 2. Normalized continuous drain current as a
function of solder point temperature
03ap28
102
tp = 10 µs
ID
Limit RDSon = VDS / ID
(A)
100 µs
10
10 ms
100 ms
DC
1
1 s
10-1
10-1
1
10
102
VDS (V)
Tsp = 25 °C; IDM is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
3 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
5. Thermal characteristics
Table 4:
Thermal characteristics
Symbol Parameter
Conditions
Min
Typ
-
Max Unit
Rth(j-sp) thermal resistance from junction to solder point
Figure 4
-
-
30
-
K/W
K/W
Rth(j-a)
thermal resistance from junction to ambient
mounted on a printed-circuit
board; minimum footprint;
vertical in still air
100
03ap27
102
Zth(j-sp)
(K/W)
δ = 0.5
10
0.2
0.1
0.05
0.02
1
single pulse
tp
T
P
δ =
10-1
t
tp
T
10-2
10-5
10-4
10-3
10-2
10-1
1
10
tp (s)
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
4 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
6. Characteristics
Table 5:
Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max Unit
Static characteristics
V(BR)DSS drain-source breakdown voltage
ID = 250 µA; VGS = 0 V
Tj = 25 °C
20
18
0.5
-
-
-
-
V
V
V
Tj = −55 °C
-
VGS(th)
IDSS
gate-source threshold voltage
drain-source leakage current
ID = 1 mA; VDS = VGS; Figure 9 and 10
VDS = 20 V; VGS = 0 V
Tj = 25 °C
1.5
-
-
-
-
-
-
1
µA
µA
nA
Tj = 150 °C
100
100
IGSS
gate-source leakage current
VGS = ±12 V; VDS = 0 V
VGS = 4.5 V; ID = 4 A; Figure 7 and 8
Tj = 25 °C
RDSon
drain-source on-state resistance
-
-
-
-
20
32
27
18
24
mΩ
Tj = 150 °C
38.4 mΩ
VGS = 2.5 V; ID = 3 A; Figure 7 and 8
VGS = 10 V; ID = 4.2 A; Figure 7 and 8
34
22
mΩ
mΩ
Dynamic characteristics
Qg(tot)
Qgs
Qgd
Ciss
Coss
Crss
td(on)
tr
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
ID = 4 A; VDS = 10 V; VGS = 4.5 V;
Figure 13
-
-
-
-
-
-
-
-
-
-
11.6
1.8
3.7
740
200
135
21
-
-
-
-
-
-
-
-
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
VGS = 0 V; VDS = 16 V; f = 1 MHz;
Figure 11
VDS = 10 V; RL = 10 Ω; VGS = 4.5 V;
RG = 6 Ω
31
td(off)
tf
turn-off delay time
fall time
44
30
Source-drain diode
VSD
source-drain (diode forward) voltage IS = 5 A; VGS = 0 V; Figure 12
-
0.8
1.2
V
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
5 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
03ao92
03ao94
30
30
VGS (V) = 10
4.5
3
VDS > ID x RDSon
ID
ID
(A)
(A)
2.5
20
20
2.2
2
10
10
150
°C
Tj = 25 °C
1.8
0
0
0
0.2
0.4
0.6
0.8
1
0
1
2
3
V
GS (V)
V
DS (V)
Tj = 25 °C
Tj = 25 °C and 150 °C; VDS > ID × RDSon
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
03aa27
03ao93
2
50
RDSon
VGS (V) = 2.2
a
(mΩ)
40
2.5
3
1.5
30
20
10
0
1
0.5
0
4.5
10
-60
0
60
120
180
0
10
20
30
T ( C)
°
j
I
D (A)
Tj = 25 °C
RDSon
a =
------------------------------
RDSon(25
°
C)
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
6 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
03al82
03al83
10-3
2
VGS(th)
(V)
ID
(A)
1.5
typ
max
min
max
10-4
1
typ
1
0-5
min
0.5
0
-60
10-6
0
60
120
180
0
0.5
1
1.5
2
VGS (V)
Tj (°C)
ID = 1 mA; VDS = VGS
Tj = 25 °C; VDS = 5 V
Fig 9. Gate-source threshold voltage as a function of
junction temperature
Fig 10. Sub-threshold drain current as a function of
gate-source voltage
03ao95
03ao96
104
30
IS
C
(A)
(pF)
20
103
Ciss
10
150 °C
Tj = 25 °C
Coss
Crss
VDS (V)
102
10-1
0
1
10
102
0
0.3
0.6
0.9
1.2
V
SD (V)
VGS = 0 V; f = 1 MHz
Tj = 25 °C and 150 °C; VGS = 0 V
Fig 11. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
Fig 12. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
7 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
03ao97
5
4
3
2
1
0
VGS
(V)
0
5
10
15
QG (nC)
ID = 4 A; VDD = 10 V
Fig 13. Gate-source voltage as a function of gate charge; typical values
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
8 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
7. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm
SOT530-1
E
A
D
X
c
y
H
E
v
M
A
Z
8
5
A
2
(A )
A
3
A
1
pin 1 index
θ
L
p
L
detail X
1
4
e
w M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
A
A
A
b
c
D
E
e
H
L
L
UNIT
v
w
y
Z
θ
1
2
3
p
E
p
max.
0.15
0.05
0.95
0.85
0.30
0.19
0.20
0.13
3.1
2.9
4.5
4.3
6.5
6.3
0.7
0.5
0.70
0.35
8°
0°
mm
1.1
0.65
0.25
0.94
0.1
0.1
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
00-02-24
03-02-18
SOT530-1
MO-153
Fig 14. Package outline SOT530-1 (TSSOP8)
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
9 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
8. Revision history
Table 6:
Revision history
Document ID
PMWD20XN_2
Modifications:
Release date
Data sheet status
Change notice Doc. number
Supersedes
20050426
Product data sheet
-
9397 750 14721 PMWD20XN-01
• The format of this data sheet has been redesigned to comply with the new presentation and
information standard of Philips Semiconductors.
• ID and Ptot data revised in Section 1.4 “Quick reference data”.
• ID, DM
I
, Ptot, IS and ISM data revised in Table 3 “Limiting values”.
• Figure 3 revised in Section 4 “Limiting values”.
• Rth(j-sp) data revised in Table 4 “Thermal characteristics”.
• Figure 4 revised in Section 5 “Thermal characteristics”.
PMWD20XN-01
20040119
Product data
-
9397 750 12595
-
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
10 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
9. Data sheet status
Level Data sheet status[1] Product status[2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
10. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
12. Trademarks
TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V.
11. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
13. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14721
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 26 April 2005
11 of 12
PMWD20XN
Philips Semiconductors
Dual N-channel µTrenchMOS™ extremely low level FET
14. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
1.4
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Contact information . . . . . . . . . . . . . . . . . . . . 11
3
4
5
6
7
8
9
10
11
12
13
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 26 April 2005
Document number: 9397 750 14721
Published in The Netherlands
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